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Article

Parallel Ant Colony Algorithm for Sunway Many-Core Processors

1
School of Computer Science, Xi’an Polytechnic University, Xi’an 710600, China
2
Shaanxi Key Laboratory of Clothing Intelligence, Xi’an 710600, China
3
National Time Service Center, Chinese Academy of Sciences, Xi’an 710600, China
*
Author to whom correspondence should be addressed.
Electronics 2025, 14(12), 2332; https://doi.org/10.3390/electronics14122332
Submission received: 16 April 2025 / Revised: 3 June 2025 / Accepted: 5 June 2025 / Published: 7 June 2025
(This article belongs to the Special Issue Computer Architecture & Parallel and Distributed Computing)

Abstract

Ant colony optimization (ACO) has garnered significant attention because of its wide application in route planning problems. Nevertheless, ACO requires a long time to calculate when tackling complex issues. Parallelization emerges as an effective strategy to improve algorithm execution efficiency, and especially in large-scale computations, parallelization technology can significantly reduce execution time. In this study, we propose an ant colony algorithm (Sunway ant colony optimization, SWACO) based on a second-level parallel strategy and tailored to the hardware characteristics of Sunway many-core processors. The first level involves process-level parallelism, in which the initial ant colony is divided into multiple child ant colonies according to the number of processors, with each child ant colony independently performing computations on each island. The second level is thread-level parallelism, utilizing the computing power of the slave core to accelerate path selection and pheromone updates of the ants, thereby effectively improving algorithm execution efficiency. The experimental results demonstrate that, across multiple TSP datasets, the SWACO algorithm significantly reduces computation time, achieving an overall speedup ratio by 3–6 times, and maintains the gap within 5%. A substantial acceleration effect was achieved.
Keywords: parallel ant colony algorithm; path planning; high-performance computing; SW26010 processor parallel ant colony algorithm; path planning; high-performance computing; SW26010 processor
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MDPI and ACS Style

Han, C.; Xiong, H.; Yang, H.; Yang, C.; Xue, T.; Liu, F. Parallel Ant Colony Algorithm for Sunway Many-Core Processors. Electronics 2025, 14, 2332. https://doi.org/10.3390/electronics14122332

AMA Style

Han C, Xiong H, Yang H, Yang C, Xue T, Liu F. Parallel Ant Colony Algorithm for Sunway Many-Core Processors. Electronics. 2025; 14(12):2332. https://doi.org/10.3390/electronics14122332

Chicago/Turabian Style

Han, Chao, Hao Xiong, Haonan Yang, Chaozhong Yang, Tao Xue, and Feng Liu. 2025. "Parallel Ant Colony Algorithm for Sunway Many-Core Processors" Electronics 14, no. 12: 2332. https://doi.org/10.3390/electronics14122332

APA Style

Han, C., Xiong, H., Yang, H., Yang, C., Xue, T., & Liu, F. (2025). Parallel Ant Colony Algorithm for Sunway Many-Core Processors. Electronics, 14(12), 2332. https://doi.org/10.3390/electronics14122332

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