# Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults

^{1}

^{2}

^{3}

^{4}

^{*}

## Abstract

**:**

## 1. Introduction

^{2}, F being the feature size of the technology node [8], which enables the large-scale integration of memory units.

_{2}-based RRAM test chip may contain around 10% of RRAM faulty devices [21], so this is far from being a minor issue.

_{L}), the resistance window of the devices (R

_{ON}and R

_{OFF}), the device-to-device variability (D2D), as well as the inherent conducting features of CPAs such as the so-called sneakpath problem (see Figure 1a). Although the former refers to the increase in R

_{L}as the fabrication technology scales down [27,28], the latter relates to the non-negligible current flowing through unselected devices [28,29].

_{L}, CPA size, and mapping). Based on the obtained results, three different re-mapping algorithms for mitigating the impact of the SAFs on the inference accuracy are tested in an integral and realistic simulation environment. The rest of this paper is organized as follows: in Section 2 the available literature regarding the study of SAFs’ impact on RRAM-based ANNs and their possible mitigation is briefly reviewed. Section 3 describes the methods, essentially the QMM. Section 4 performs an exploratory investigation of the impact of SAFs on RRAM-based ANNs from the viewpoint of realistic electrical simulations, providing useful design considerations and trade-offs. Section 5 discusses the algorithms used for SAF mitigation and evaluates the obtained results. Finally, the conclusions of this paper are presented in Section 6.

## 2. Previous Related Works

#### 2.1. CPA Modelling

#### 2.2. Simulation Platform

^{6}synapses considered in the work of Xia et al. [26] (2017)), this approach is incapable of accounting for the electrical equivalent of the memristor-based CPA. Similar approaches have also been reported, considering a different simulation platform such as Python (Mehonic et al. [53] (2019) and Huang et al. [58] (2021)), but with similar limitations. Last but not least, neither C++, MATLAB, nor Python are circuit simulators, and therefore in a best-case scenario they are still limited to simulating only the CPA structure, and cannot deal with the CMOS blocks included in a typical RRAM neuromorphic circuit. In this context, the most suitable software for the electrical simulation of CPAs is SPICE (or any alternative language of this type), as it provides the versatility to add or remove parasitics by simply adding the required passive element to the CPA circuit netlist, while simultaneously supporting the simulation of the CMOS circuitry. Regarding the use of hardware approaches, although representing the most realistic scenario, they are costly and unpractical for the exploration of the wide parametric space of the CPA parasitics or RRAM characteristics. This is the case for the works by Chen et al. [21] (2015), Chen et al. [61] (2017), and Liu et al. [24] (2015).

#### 2.3. RRAM Models

#### 2.4. Alternative RRAM Integration Structures

^{2}). Nevertheless, they suffer from the so-called sneakpath effect, by which local current loops appear inside the CPA structure, producing errors in the total output current of each CPA bitline. Alternatives to this structure are the CPAs containing one transistor-one resistor (1T1R) structures. However, they have larger area requirements, which threatens the integration density achievable with simpler structures. 1T1R structures were investigated for the case of pattern recognition by Van Pham et al. [60] (2019) and Chen et al. [21] (2015) but considering a hardware approach. Another example is works by Cristiano et al. [62] (2019) and Romero et al. [63] (2019), in which the authors considered a 2T2R+3T1C structure and two pairs of conductances per synaptic weight, further compromising the maximum achievable integration density.

#### 2.5. Costs Associated with the Mitigation of SAF Effects

## 3. Materials and Methods

#### 3.1. Quasi-Static Memdiode Model

_{0}(λ) =I

_{min}(1 − λ) + I

_{max}λ is the diode current amplitude, α is a fitting constant, and R is a series resistance. Equation (1) is the solution of a diode with series resistance and W is the Lambert function. I

_{min}and I

_{max}are the minimum and maximum values of the current amplitude, respectively. abs(V) is the absolute value of the applied bias and sgn() is the sign function. As I

_{0}increases in Equation (1), the I-V curve changes its shape from exponential to linear through a continuum of states as experimentally observed for this kind of device. λ is a control parameter that runs between a lower limit λ

_{min}→0 (setting the device in HRS), the exact value of which will be discussed below, and λ

_{max}→1 (LRS) and is given by the recursive operator (Equation (2)):

^{+}(V) and Γ

^{−}(V), represent the transitions from HRS to LRS (SET) and vice versa (RESET) and can be physically linked to the completion and destruction of the CF [9,10], respectively. They are defined by Equations (3) and (4):

^{+}and η

^{−}are the transition rates and V

^{+}and V

^{−}the threshold voltages for SET and RESET, respectively. $\mathsf{\lambda}\left(V\right)$ defines the so-called logistic hysteron or memory map of the device and keeps track of the history of the device as a function of the applied voltage (see the λ-V curve in Figure 2a). λ, calculated from Equation (2), yields the transition from HRS to LRS and vice versa through a change in the properties of the diodes depicted in the left inset of Figure 2a. The combination of Equations (1) and (2) results in an I-V loop such as that superimposed to the logistic hysteron in Figure 2a, which starts in HRS (λ = λ

_{min}) and evolves as indicated by the blue arrows printed on top.

_{min}(e.g., ~10

^{−5}) to 1, I

_{0}in Equation (1) varies between I

_{min}and I

_{max}, gradually transitioning from linear-exponential to a linear regime as a consequence of a potential drop in series resistance. Additionally, this model can account for the transport mechanism in the pre-forming state, as well as the electroforming event. This is achieved by including two separate transport equations (namely, TE

_{formed}and TE

_{fresh}) and a second ridge function ${\Gamma}_{form}^{+}\left(V\right)$, defined as per Equation (3) but in terms of ${\eta}_{form}^{+}$ and ${V}_{form}^{+}$. The proposed model can be described by a simple HSPICE sub-circuit as shown in Supplementary Table S2. Fowler–Nordheim, Poole–Frenkel, or space-limited charge can be considered for the conduction mechanism through the pristine dielectric, but in this paper an ohmic I-V relationship was assumed for simplicity (see Figure 2a). The accuracy of the model is illustrated in Figure 2b by fitting experimental data corresponding to HfO

_{2}[64] and LCMO [65] structures measured at room temperature (details of these samples can be found in Section S1.1 of the Supplementary Materials).

#### 3.2. Procedure for SPICE CPA Creation, Training, and Simulation

## 4. Results and Discussion

#### 4.1. Impact of the CPA Parasitics on the Recognition Accuracy

_{ON}/R

_{OFF}), the device-to-device (D2D) variability, signal-to-noise Ratio (SNR) degradation, the presence of a non-negligible line resistance R

_{L}, and the influence of the image size, among others. For further details regarding these aspects, the reader is referred to the previous works by our group [28,42]. These were studied within the framework of CPA-based SLP creation, training, and SPICE simulation presented in Supplementary Figure S2, together with a simplified schematic representation of the generated SLP circuit. To account for the first issue (R

_{ON}/R

_{OFF}ratio), 12 different model plays for the QMM with a variety of R

_{ON}/R

_{OFF}ratios considered in the literature [43,44,45,66,67] were defined by (i) equally scaling the HRS and LRS curves by a factor of 10: A1 (R

_{OFF}~1 MΩ and R

_{ON}~100 kΩ), A2 (~100 kΩ and ~10 kΩ), A3 (~10 kΩ and ~1 kΩ), and A4 (~1 kΩ and ~100 Ω); (ii) scaling the HRS curve by a factor 10 while keeping the LRS fixed: B1 (~1 MΩ and ~100 Ω), B2 (~100 kΩ and ~100 Ω), B3 (~10 kΩ and ∼100 Ω), and B4 (~1 kΩ and ∼100 Ω); and (iii) scaling the LRS curve by a factor of 10 while keeping the HRS curve fixed: C1 (~1 MΩ and 100 ~kΩ), C2 (~1 MΩ and ~10 kΩ), C3 (~1 MΩ and ~1 kΩ), and C4 (~1 MΩ and ~100 Ω). The corresponding I-V loops are shown in Supplementary Figure S2a–c. The R

_{ON}/R

_{OFF}ratio’s influence on the inference accuracy was addressed by simulating a 784 × 10 SLP (using the original 28 × 28 px. MNIST images shown in Supplementary Figure S2d). V

_{read}was set to 300 mV and R

_{L}was fixed to 2 Ω. For this case, the SAF ratio was kept equal to 0. The simulation results are presented in Supplementary Figure S2e,f, indicating an accuracy loss corresponding to the upward shift in the resistance window for model plays A1–A4 (constant R

_{ON}/R

_{OFF}ratio) or the LRS curve for model plays C1–C4 (constant R

_{OFF}, increasing R

_{ON}/R

_{OFF}ratio). On the contrary, model plays B1–B4 (constant R

_{ON}, decreasing R

_{ON}/R

_{OFF}ratio) show a highly degraded accuracy that is almost independent of the model play considered. Therefore, the LRS characteristic (R

_{ON}) has a major impact on the inference accuracy. Significant differences arise between A1–A4 and C1–C4 model plays when their sensitivity to D2D variations is introduced, as shown in Supplementary Figure S2g. In this scenario, the larger R

_{ON}/R

_{OFF}ratio of the latter (particularly for C2–C4) allows one to minimise the susceptibility of the SLP-to-D2D variability.

_{L}. As each memristor is in series connection with a number of R

_{L}resistors, the fraction of the voltage effectively delivered to the memdiode decreases as the ratio R

_{L}/R

_{ON}tends towards unity, as shown in Supplementary Figure S2h, showing a common trend across the different C1–C4 model plays. Interestingly, when a smaller SLP is tested (64 × 10, using the MNIST images down-sampled to 8 × 8 px.) the same trend arises, but right-shifted. As the total resistance associated with the CPA wires is proportional to the CPA size, it is expected that downsizing the input patterns would boost the recognition accuracy. Nevertheless, when the resolution of the MNIST images is reduced below 12 × 12 px. the digit becomes practically illegible for the human eye (see Supplementary Figure S2d), indicating a trade-off between legibility and the voltage drop that defines the optimum size of the SLP for a given set of R

_{ON}, R

_{OFF}, and R

_{L}values (see Supplementary Figure S2i). Supplementary Figure S2i also shows a reduced R

_{L}dependency for smaller SLPs (i.e., CPAs with fewer devices) than in their larger counterparts. The realisation of larger CPAs by considering smaller partitions is shown to efficiently improve the inference accuracy [27,28,68]. Note that for this latter analysis, only model play C2 was considered. This is because this model play provides the best trade-off between SNR, inference accuracy, and tolerance to D2D variations. Model play C1, for instance, has a poor SNR as the high values of R

_{ON}and R

_{OFF}produce extremely low operating currents (see Supplementary Figure S2j).

#### 4.2. Impact of the Fault Ratio on the Inference Accuracy

_{min}to SA0 faults, and λ = 0 to SA0_nE faults). Given the stochastic nature of the spatial distribution of SAFs across the CPA [21,69], Monte Carlo (MC) simulations of the CPA were performed, assuming different ratios of faulty devices (FD ratio). In each MC run, faulty devices are randomly injected following a uniform distribution [22,69] into the CPA and, subsequently, the defective CPA is used to classify the images from the MNIST dataset. Faults are directly injected into the conductance matrices ${G}_{M}^{+}$ and ${G}_{M}^{-}$ (see the flowchart in Supplementary Figure S1a). The obtained inference accuracy is then averaged among all MC runs for a given FD ratio and presented in Figure 3. The inference accuracy for the three SAF cases are presented as a function of the FD ratio for two image sizes (8 × 8 px. and 16 × 16 px.), different values of R

_{L}(1 Ω, 10 Ω and 100 Ω), and considering model play C2 (See Supplementary Figure S3c). To minimise the impact of series resistance, for both the SLPs used to classify the 16 × 16 px. images and the MLPs studied, we have considered the use of small partitions (8 blocks in the SLP—4 for the positive synaptic weights and 4 for the negatives—and 30 in the MLP). For the SLP considered for the 8 × 8 px. no partitioning was considered given the rather small size of the crossbars involved. Different normalisation methods (NM) used to map ${W}_{M}$ to ${G}_{M}^{+}$ and ${G}_{M}^{-}$ were tested in terms of robustness against SAFs and their impact on the inference accuracy. Ten MC runs were considered for each combination or R

_{L}, NM, image size, and FD ratio, totalling ~4.3k simulation runs.

#### 4.2.1. Impact of the Normalisation Method (NM)

_{min}) an SA1 fault (λ=1) causes a significant departure from the target conductance, thus increasing SWV and degrading the inference accuracy. In order to mitigate both problems, an alternative approach (NM-3) based on the Gaussian-like distribution of the elements of ${W}_{M}$ is proposed in this work. In this context, an element ${w}_{i,j}\in {W}_{M}$ has a probability P

_{i}of being within the range ${\mu}_{{W}_{M}}\pm i{\sigma}_{{W}_{M}}$, where ${\mu}_{{W}_{M}}$ and ${\sigma}_{{W}_{M}}$ are the mean and standard deviation of the values of ${W}_{M}$. For i values ranging from 1 to 4, ~68.3%, ~95.5%, ~99.7%, and ~99.9% of the synaptic weights will be within this range, respectively [71]. Thus, values exceeding such limits are set as equal to ${\mu}_{{W}_{M}}\pm i{\sigma}_{{W}_{M}}$ and then ${W}_{M}$ is normalised to obtain ${W}_{{M}_{N3}}$. The histograms for the elements in ${W}_{{M}_{N3}}$ are presented in Figure 3d–f for 2, 3, and 4${\sigma}_{{W}_{M}}$, respectively.

_{L}was set to 10 Ω in all cases. As reported in the literature [45,53], SA1 faults have a much more significant impact on the inference accuracy than SA0 faults. Little, if any, difference exists between the SA0 and SA0_nE cases. A major influence of NM on the inference accuracy as a function of the FD ratio can be observed in Figure 3g for the case of injecting SA1 faults, with NM-3 showing the highest robustness against this kind of SAF. Unlike the rapid accuracy loss observed as the FD ratio increases for NM-1 and NM-2, the NM-3 cases have a greater tolerance to faulty devices. In fact, the more ${W}_{{M}_{N3}}$ departs from a Gaussian-like distribution, the smaller the impact of the FD ratio on the inference accuracy (see the difference between NM-3 with $2{\sigma}_{{W}_{M}}$ and with $4{\sigma}_{{W}_{M}}$). Nevertheless, this improvement comes at the cost of a higher power consumption (reaching roughly ~10 mW in an SLP comprising ~15.6k synapses) during the inference phase (see the inset of Figure 3h) and a slightly lower accuracy in the fault-free scenario (see the inset of Figure 3i). The increase in the power consumption is an expected side-effect of mapping a larger fraction of the ${W}_{M}$ elements closer to ${G}_{LRS}$, which inevitably increases the currents flowing through the CPAs. This also plays a role in the lower accuracy observed for higher values of R

_{L}in the fault-free SLP (inset of Figure 3i), which could be regarded as an increase in the R

_{L}/R

_{ON}ratio. Moreover, even for reduced values of R

_{L}, there is a sensible accuracy degradation caused by the re-distribution of the synaptic weights from ${W}_{M}$ to ${W}_{{M}_{N3}}$. Thereby, NM-3 is considered from here on, as it provides the highest robustness against SAFs and the lowest accuracy loss in the fault-free scenario.

_{L}= 10 Ω). The simulation results show that similar trends to the SLP case are obtained, showing a higher sensitivity to the SA1 faults in comparison with the SA0 faults. There is also a higher sensitivity to both SAFs when comparing these trends to those obtained for the SLP case. This can be attributed to the fact that the second (and following layers) not only induce errors in the output vector produced by the MVM operation, but also receive an erroneous input vector caused by the errors introduced by the previous layers. Finally, an increase in the ANN robustness by considering an alternative normalisation method is also observable for this scenario. Note that NM-3 achieves a more robust mapping, as was also observed in the SLP scenario.

#### 4.2.2. Influence of the Line Resistance (R_{L}) and Image Size (n × n)

_{L}values (1 Ω, 10 Ω and 100 Ω) and MNIST image sizes (8 × 8 px. and 16 × 16 px.). In both cases, the inference accuracy for FD ratio→0 is down-shifted as R

_{L}increases [28] from 1 Ω to 100 Ω, in agreement with the results shown in Supplementary Figure S2i. For the smaller images (8 × 8 px., SLP of size 64 × 10) and regardless of the SAF mode, the inference accuracy sensitivity on the FD ratio notably increases as R

_{L}decreases, which is most notable for the 1 Ω case, as illustrated in Figure 4a–c. Interestingly, for the SA0 faults, the inference accuracy becomes insensitive to the FD ratio for the maximal R

_{L}(100 Ω), as expected for a lower SWV metric [24]. When addressing the 16 × 16 px. MNIST images, very similar trends can be observed, but with a shallower dependence on the FD ratio. For comparison purposes, such trends are superimposed onto the previous ones in Figure 4a–c. Note that for the classification of the 16 × 16 px. MNIST images, the inference accuracy already becomes insensitive to the FD ratio for R

_{L}= 10 Ω if SA0 faults are injected.

_{read}) effectively delivered to the memory cells (V

_{cell}), i.e., V

_{cell}/V

_{read}) is jointly determined by R

_{L}and the memristor resistance (R

_{memd}, which varies between R

_{OFF}and R

_{ON}). In a very basic analysis, each memristor is part of a conductive path between the CPA’s input wordline i and output bitline j. For an N × M SLP, the average parasitic resistance associated with this path is R

_{L}[(N + M)/2 + 1] [28,45]. Within this simplified scenario, the V

_{cell}/V

_{read}ratio could be obtained from the voltage divider between R

_{memd}and R

_{L}[(N + M)/2 + 1]. The calculated values are shown in Table 1 for the two image sizes and different R

_{L}values, considering both SA0 and SA1 faults. Despite being a limitation when attempting to improve the inference accuracy in fault-free CPAs, the observed reduction of RM as R

_{L}increases has a positive side effect when considering SAFs as it results in lower voltages applied to defective devices. This is particularly noticeable for the case of SA1 in the 256 × 10 SLP used to classify the 16 × 16 px. MNIST images: only ~49% of the input voltage is applied to the faulty devices, which thereby reduces their contribution to the bitline output current in roughly the same amount.

^{2}× M SLP with the n × n test images, the fraction of unbiased RRAM cells in the CPA is found to increase with n. This is shown in the inset of Figure 4d. It can be seen that the number of unbiased devices in the CPA exhibits a steeper increase than the number of faulty devices for 1%, 5%, and 20% FD ratios. As the faulty devices are distributed uniformly all over the CPA, it is reasonable to expect that in a large CPA, a significant fraction of the faulty devices are unbiased and therefore play no role in the inference stage. To test this interpretation, the raw data (that is, the inference accuracy calculated in each MC run) obtained for R

_{L}= 10Ω from Figure 4a were represented in the scatterplot from Figure 4d as a function of the ratio of biased faulty devices (BFD ratio). For the sake of completeness, the full-sized 28 × 28 px. images were also included. The total number of synapses in the simulated SLP sizes are 1280 sys. (8 × 8 px. images (blue markers)), 5120 sys. (16 × 16 px. (red markers)), and 15,680 sys. (28 × 28 px. (black markers)). Two relevant observations can be made regarding Figure 4d: first, despite the clearly different trends exhibited in Figure 4a for the 8 × 8 px. and 16 × 16 px. image cases, a common overall behaviour is observed when considering the inference accuracy vs. the BFD ratio for multiple SLP sizes. Second, only a fraction of the faulty devices is effectively biased, and this fraction decreases as the CPA becomes larger (the case of 30% of faulty devices has been shaded as a guide to the eye).

## 5. CPA Remapping Procedures

#### 5.1. Algorithm 1: Fault-Tolerant Adaptative Mapping

_{Norm}is computed as W

_{Norm}

^{+}–W

_{Norm}

^{−}, with W

_{Norm}

^{+}and W

_{Norm}

^{−}being the positive and negative elements of W

_{Norm}, respectively. This technique allows one to implement a simple yet powerful remapping procedure to minimise the impact of SAFs. This implies that for a given faulty RRAM cell in the positive (negative) CPA denoted as ${g}_{i,j}^{+\left(-\right)}$, the corresponding RRAM cell in the negative (positive) CPA ${g}_{i,j}^{-\left(+\right)}$ is tuned so as to compensate the error in ${g}_{i,j}^{+\left(-\right)}.$ This can be summarised as follows (see Equation (5)):

Algorithm 1: Fault-tolerant adaptive mapping |

#### 5.2. Algorithm 2: SWV-Minimisation-Based Row Permutation

Algorithm 2: SWV-minimisation-based row permutation |

#### 5.3. Algorithm 3: Mean-Bias-Dependent Mapping

_{read}, we can obtain the mean brightness (voltage) for each pixel in the MNIST dataset. These two cases have been exemplified in Figure 5b: pixel i stands for a normally inactive pixel (e.g., pixels close to the image borders), whereas pixel j indicates a normally active pixel (e.g., a pixel located in the centre of the image). For the 12 × 12 px. image-size case, each of the resulting 144 px. is used to bias each of the rows in two (positive and negative weights) 144 × 10 CPAs. In the simplest possible scenario, the 1

^{st}pixel (the upper-left corner of the MNIST images) would be mapped to the 1

^{st}CPA row. Then the ith pixel would be mapped to the ith row, the jth pixel to the jth row, and lastly the 144th pixel (lower-right corner of the MNIST images) to the 144th row. Nevertheless, such mapping does not take into account the distribution of the faulty devices in the CPA. Knowing their spatial distribution, it is possible to determine how many faulty devices are connected to each CPA row, and then re-map the most active pixels to the ”less faulty” rows (rows with lower numbers of connected faulty devices) and the inactive pixels to the faultiest rows. This re-mapping procedure is schematically depicted by the row permutation in Figure 5b (bottom) for pixels i and j and in Algorithm 3.

Algorithm 3: Mean-bias-dependent mapping |

#### 5.4. Performance of the CPA-Remapping Algorithms

_{L}/R

_{ON}ratio considered. In this regard, techniques to help tolerate such faults are required to enable the reliable operation of CPA-based SLPs. Three different approaches were proposed in Section 5.1, Section 5.2 and Section 5.3, defined as re-mapping Algorithms 1–3, and their capability to mitigate the impact of SAFs is tested in this Section. Two possible scenarios are assumed. First, the classification of the 8 × 8 px. MNIST images by a partitioned (number of Partitions, NP=4, for each polarity of synaptic weights) 64 × 10 SLP is considered, as this case shows the highest sensitivity to SAFs in Figure 4. Second, a different image dataset was taken into account to provide a more representative test of the proposed algorithms. In this way, images from Yale Face Dataset B were downscaled to a 16 × 16 px. resolution and classified by means of a 256 × 38 SLP, where each of the ${G}_{M}^{+}$ and ${G}_{M}^{-}$ matrices are implemented by four (NP=4) 64 × 38 CPAs. Some image samples in this dataset are shown in Figure 6a. As for the previous simulations, the I-V characteristics of the memristors were represented by model play C2, R

_{L}was set to 10 Ω, ${G}_{M}^{+}$ and ${G}_{M}^{-}$ were obtained by NM-3, and 10 MC runs were performed for each FD ratio. Note that only SA1 and SA0 cases were considered, given the very similar outcomes of SA0 and SA0_nE presented in Figure 3 and Figure 4. In addition, the study is presented in terms of the extreme case of having only SA1 or SA0 faults, as assessing the combined effect of both would require multiple scenarios with different ratios of SA1 to SA0 faults. Finally, simulations (i)–(iv) are performed for a given kth sample of complete randomly distributed SAFs: (i) original mapping; (ii)–(iv) the fault-free cells are tuned based on Algorithms 1–3 while keeping the SAFs at the exact same locations. As such, ~1.7k simulation runs were executed.

## 6. Conclusions

_{L}, image sizes, and representation methods of the synaptic weights with the conductances of the CPAs. A higher sensitivity to SA1 faults was observed, which was accentuated by lower values of R

_{L}, and for images with low resolution. Similarly, the concentration of synaptic elements with conductance values close to the minimum one should be avoided, not only to exploit the entire conductance range of the RS devices, but also to reduce the impact of SA1 faults. Nevertheless, both an excessive increase in R

_{L}and a redistribution of synaptic weights may lead to a reduction in inference accuracy and an increase in power consumption, respectively. Thus, this implies a trade-off between accuracy–power consumption and robustness against SAFs.

## Supplementary Materials

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Acknowledgments

## Conflicts of Interest

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**Figure 1.**(

**a**) Sketch of the CPA structure. Red and blue arrows exemplify the electron flow through the memdiodes connecting the top (word lines (WL)) and bottom lines (bit lines (BL)). Different resistance states are schematically represented (high resistance state (HRS) to low resistance state (LRS)). The dashed blue line depicts the so-called sneakpath problem. The parasitic wire resistance is indicated for WL

_{i}and BL

_{i}. (

**b**) Schematic representation of the MIM structure where the RS mechanism takes place, before the forming step and during the LRS-to-HRS alternate transition. Blue and red balls represent the metal ions and oxygen vacancies (VOs), respectively.

**Figure 2.**(

**a**) Hysteron model with logistic ridge functions Γ

^{+}(Equation (3)) and Γ

^{−}(Equation (4)). Ω is the space of feasible states S. The black thick faded line superimposed on the hysteron model indicates the trajectory of the state variable λ inside Ω from an initial S

_{1}to a final S

_{2}state. Note that four transport mechanisms are considered for the pre-forming conduction, with the forming event taking place at the same voltage. The inset in the left shows the equivalent circuit model for the current equation (Equation 1) including the series resistance. The diodes are driven by the memory state of the device and one diode is activated at a time. Typical I-V characteristics for a memdiode [11] obtained via the simulation of the proposed model are superimposed. Current evolution is indicated by the blue arrows. The inset on the right side shows the exponential (HRS) to lineal (LRS) transition by varying the value of λ. The red shaded region indicates the possible voltages applied to the device. I

_{HRS}and I

_{LRS}currents are pinpointed at a fitting voltage with the grey and white circle markers, respectively. The overestimation of I

_{HRS}may occur when considering a linear model [29] for the HRS regime, and lower applied voltages as indicated by the cyan, blue and black ball markers. (

**b**) Experimental I-V loops of different materials reported in the literature, fitted with the QMM model: HfO

_{2}[64] and LMCO [65].

**Figure 3.**The change in the distribution of the elements of W

_{M}(

**a**) under different normalisation techniques is shown in (

**b**–

**f**). Inference accuracy as function of the FD ratio, considering different W

_{M}normalisation approaches, is presented for (

**g**) SA1, (

**h**) SA0, and (

**i**) SA0_nE faults. The SLP power consumption during the inference phase is indicated in the inset of (

**h**) as a function of the SLP size. Similarly, the inference accuracy of the fault-free SLP under different normalisation methods is presented in (

**i**). (

**j**) Inference accuracy assuming different combinations of SA1 and SA0 faults. Note that the ratio of SAFs (containing both SA1 and SA0) is swept parametrically from 5% to 30%. (

**k**) and (

**l**) show the inference accuracy of an MLP ANN as a function of the ratio of SAFs, assuming SA1 and SA0, respectively.

**Figure 4.**Inference accuracy vs. FD ratio for different values or R

_{L}is presented for the (

**a**) SA1, (

**b**) SA0, and (

**c**) SA0_nE cases. (

**d**) CPA Inference accuracy vs. ratio of biased stuck-at-ON devices. Each marker corresponds to an MC run. Data are codified in terms of the nominal fault ratio (marker type) and CPA size (marker colour), e.g., blue circle markers indicate the inference accuracy results for simulations of the 8 × 8 px. image CPAs with 1% of faulty devices, whereas red pentagon markers stand for the results obtained from 16 × 16 px. image CPAs and 30% of faulty devices. The case of 30% of faulty devices (pentagonal markers) have been highlighted for the three CPA sizes considered to provide a guide to the eye: As the CPA size increases, the ratio of biased faulty devices decreases from ~5% in the 1280 sys. CPA, to ~3.7% in the 5120 sys. and finally to ~2.3% in the 15,680 sys CPA.

**Figure 5.**(

**a**) Sketched representation of the fault-tolerant adaptative mapping process (Algorithm 1) depicting the conductance compensation (top) that allows the tolerance of faults in the first and last rows (green-shaded cells) but which is uncapable of handling other SAFs (unrecoverable faults, grey-shaded cells). A row permutation approach (bottom) is required to turn unrecoverable faults into recoverable faults (See Table 2). (

**b**) Row permutation is also used for Algorithms 2 and 3. In the latter, it is employed to re-map the faultiest CPA rows to the inactive image pixels. The MNIST case is shown as an example.

**Figure 6.**(

**a**) Samples of Yale Face Database B showing 3 classes with 32 × 32 px. (top) and 16 × 16 px. (bottom) resolutions. In both cases, the x and y axis in the leftmost image stands for the pixel index. The re-mapping Algorithms 1–3 are tested with the MNIST dataset for the SA1 and SA0 faults in Figures (

**b**) and (

**c**), respectively. The corresponding trends for Yale Face Database B are shown in Figures (

**d**) and (

**e**). In both cases, Algorithm 1 shows the best results for SA1 faults and Algorithm 2 is the preferred one to tolerate SA0 faults.

8 × 8 px. MNIST (64 × 10 SLP) | 16 × 16 px. MNIST (256 × 10 SLP) | |||||
---|---|---|---|---|---|---|

R_{L} = 1 Ω | R_{L} = 10 Ω | R_{L} = 100 Ω | R_{L} = 1 Ω | R_{L} = 10 Ω | R_{L} = 100 Ω | |

SA1: R_{Memd} = R_{ON} (10 kΩ) | ~0.99 | ~0.96 | ~0.72 | ~0.99 | ~0.90 | ~0.49 |

SA0: R_{Memd} = R_{OFF} (1 MΩ) | ~1 | ~0.99 | ~0.99 | ~1 | ~0.99 | ~0.98 |

Target (W_{i,j}) | RRAM Cell State in Positive CPA | RRAM Cell State in Negative CPA | Recoverable? |
---|---|---|---|

Positive | Stuck-at-ON | Fault-Free | YES |

Positive | Stuck-at-OFF | Fault-Free | NO |

Positive | Fault-Free | Stuck-at-ON | NO |

Positive | Fault-Free | Stuck-at-OFF | YES * |

Negative | Stuck-at-ON | Fault-Free | NO |

Negative | Stuck-at-OFF | Fault-Free | YES * |

Negative | Fault-Free | Stuck-at-ON | YES |

Negative | Fault-Free | Stuck-at-OFF | NO |

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**MDPI and ACS Style**

Aguirre, F.L.; Pazos, S.M.; Palumbo, F.; Morell, A.; Suñé, J.; Miranda, E.
Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults. *Electronics* **2021**, *10*, 2427.
https://doi.org/10.3390/electronics10192427

**AMA Style**

Aguirre FL, Pazos SM, Palumbo F, Morell A, Suñé J, Miranda E.
Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults. *Electronics*. 2021; 10(19):2427.
https://doi.org/10.3390/electronics10192427

**Chicago/Turabian Style**

Aguirre, Fernando L., Sebastián M. Pazos, Félix Palumbo, Antoni Morell, Jordi Suñé, and Enrique Miranda.
2021. "Assessment and Improvement of the Pattern Recognition Performance of Memdiode-Based Cross-Point Arrays with Randomly Distributed Stuck-at-Faults" *Electronics* 10, no. 19: 2427.
https://doi.org/10.3390/electronics10192427