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Open AccessArticle

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

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Charles L. Brown Department of Electrical and Computer Engineering, University of Virginia, Charlottesville, VA 22904, USA
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The Preson M. Green Department of Electrical and System Engineering, Washington University in St. Louis, St. Louis, MO 63130, USA
*
Author to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2018, 8(3), 28; https://doi.org/10.3390/jlpea8030028
Received: 16 June 2018 / Revised: 18 August 2018 / Accepted: 21 August 2018 / Published: 24 August 2018
(This article belongs to the Special Issue CMOS Low Power Design)
Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property i n near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up. View Full-Text
Keywords: Near Threshold Computing (NTC); dual-supply; Static Random Access Memory (SRAM); reliability; write aggregation buffer Near Threshold Computing (NTC); dual-supply; Static Random Access Memory (SRAM); reliability; write aggregation buffer
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Gu, Y.; Yan, D.; Verma, V.; Wang, P.; Stan, M.R.; Zhang, X. Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors. J. Low Power Electron. Appl. 2018, 8, 28.

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