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Open AccessArticle

Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error

by Meilin Zhang 1 and Paul Ampadu 1,2,*
Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY 14627, USA
Department of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, MA 02139, USA
Author to whom correspondence should be addressed.
J. Low Power Electron. Appl. 2014, 4(1), 44-62;
Received: 12 November 2013 / Revised: 20 January 2014 / Accepted: 10 February 2014 / Published: 27 February 2014
We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems, while maintaining low power, area and latency overhead. Based on the fact of low latency and overhead of rectangular codes and high error control capability of Hamming product codes, two-layer error control codes employ simple rectangular codes for each cache line to detect cache errors, while loading the extra Hamming product code checks bits in the case of error detection; thus enabling reliable large-scale cache operations. Analysis and experiments are conducted to evaluate the cache fault-tolerant capability of various existing solutions and the proposed approach. The results show that the proposed approach can significantly increase Mean-Error-To-Failure (METF) and Mean-Time-To-failure (MTTF) up to 2.8×, reduce storage overhead by over 57%, and increase instruction per-cycle (IPC) up to 7%, compared to complex four-way 4EC5ED; and it increases METF and MTTF up to 133×, reduces storage overhead by over 11%, and achieves a similar IPC compared to simple eight-way single-error correcting double-error detecting (SECDED). The cost of the proposed approach is no more than 4% external memory access overhead. View Full-Text
Keywords: fault tolerance; error control codes (ECC); cache; VLSI; many-core fault tolerance; error control codes (ECC); cache; VLSI; many-core
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Zhang, M.; Ampadu, P. Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error. J. Low Power Electron. Appl. 2014, 4, 44-62.

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