Scheduling Intrees with Unavailability Constraints on Two Parallel Machines

Abstract

This paper considers the two parallel-machine scheduling problem with intree-precedence constraints where machines are subject to non-availability constraints. In the literature, this problem is considered to be an open problem of unknown complexity. The proposed solution proves that the problem under consideration has polynomial complexity. Periods of machine unavailability are predetermined, and both task execution and inter-task communication are modeled as requiring one unit of time. The optimization criterion central to this study is the minimization of the makespan. Such a scheduling challenge is directly applicable to manufacturing environments, where production equipment can be intermittently offline for reasons such as unscheduled repairs or planned preventative maintenance. Adopting a unit-time task model offers a valuable framework for subsequently scheduling larger, preemptable jobs.This work presents a new method, called Scheduling Intrees with Unavailability Constraints (SIwUC), which operates by aggregating tasks into distinct groups. The analysis establishes that the SIwUC algorithm produces optimal schedules and reveals how the underlying problem architecture and its solutions demonstrate a symmetrical property in the distribution of tasks across the two parallel machines. This paper demonstrates that the proposed SIwUC algorithm builds optimal schedules and highlight how the problem structure and its solutions exhibit a form of symmetry in balancing task allocation between the two parallel machines.

1. Introduction

In classical scheduling, it is commonly assumed that a fixed set of machines or processors remains continuously available throughout the entire planning horizon [1,2]. However, this assumption is often unrealistic in practical environments, where machine availability may be affected by maintenance operations [3], unexpected breakdowns [4], or other operational constraints [5,6]. As a result, scheduling problems with machine non-availability have attracted considerable attention in the literature where different problems were treated such as scheduling where only a limited number of identical processors are available [7], scheduling on uniform parallel machines with periodic unavailability constraints [8,9], scheduling on distributed systems [10,11], and scheduling with communication costs [12,13].

In parallel, the scheduling of unit execution time (UET) tasks [14] has been extensively investigated due to its relevance for modeling preemptable and fine-grained tasks [15,16]. Moreover, precedence constraints and, in particular, intree structures naturally arise in many applications such as parallel computing and workflow scheduling, where communication delays between tasks cannot be neglected such as in the problem of scheduling precedence-constrained tasks [17] and the problem of scheduling-related jobs [18].

Despite these advances, the combined consideration of unitary tasks with intree-precedence constraints, communication costs, and machine non-availability remains largely unexplored.

Motivated by this gap, this paper addresses the problem of scheduling N unit execution time tasks related by intree-precedence constraints with unit communication costs on two identical parallel machines, where one machine is subject to non-availability periods. Using the three-field notation introduced by Graham et al. [19], the problem is denoted as $P2|intree,pi=1,c=1,nr-a|Cmax$. This problem has not been previously investigated, and neither its computational complexity nor an optimal solution method has been reported in the literature.

The contributions in this paper are as follows:

• Prove that the complexity of the treated problem is polynomial and does not have an open complexity.
• Propose an optimal algorithm with polynomial complexity.
• Prove the optimality of the proposed algorithm by a set of theorems and lemmas.

The paper is structured as follows: A review of related work is detailed in Section 2, while Section 3 provides a formal description of the problem under study.The proposed SIwUC solution is introduced and explained in Section 4, followed by its evaluation on two illustrative examples in Section 5. Section 6 provides the optimality proof for the algorithm. The paper concludes in Section 7 with a summary and suggestions for future research directions.

2. Related Works

This research examines a dual-constrained scheduling problem that combines communication delays with precedence and non-availability period constraints. Although these constraints have been studied separately in the past, there is not a perfect way to combine them. The new heuristic, Adapted CBoS (ACBoS), is introduced in this section after each constraint has been reviewed separately. For studying the behavior of this heuristic, a new lower bound is proposed to carry out a comparison between ACBoS and the lower bound.

2.1. Scheduling with Unavailabilities

The study of scheduling with non-availability constraints was first conducted by Lee et al. [20,21]. They proved that it is an NP-Hard problem to schedule independent tasks with non-unitary execution times on identical machines while taking unavailability periods into account [22,23,24].

The study also proved that there is not a single, universal approximation algorithm for this issue. This is due to the fact that certain situations can be created in which only an optimal schedule produces a makespan that is acceptable; in these cases, any algorithm that is not optimal would perform arbitrarily poorly. Lee therefore made the simplifying assumption that a machine is always available. Lee showed that the classical Longest Processing Time (LPT) algorithm achieves a worst-case bound of $(m+1)/2$ under this assumption and when machine j has a single unavailability period $\left[sj,tj\right]$ (where $0\le sj\le tj$) within the scheduling horizon.

In [25], the authors study a scheduling scenario that does not allow more than half of the machines to be down at any given time. Given this setting, the authors prove that the LPT heuristic has a performance ratio of at most 2. In [26], the same results are extended to a situation where up to $\lambda$ machines can be down at once, that is, $1\le \lambda \le m-1$.

In this generalized setting, the authors show the performance ratio of LPT is guaranteed to be upper-bounded by the study of scheduling with non-availability constraints was first conducted by Lee et al. [20,21]. They proved that it is an NP-Hard problem to schedule independent tasks with non-unitary execution times on identical machines while taking unavailability periods into account [22].

In [8], the authors address the scheduling problem involving two processors, each of which experiences a single interval of unavailability. They proposed exponential time algorithms that gives optimal solutions and showed, through experiments, that their algorithms generate good results especially in practical cases.

2.2. Scheduling Task Problems with Precedence Constraints and Communications

The CBoS algorithm [27] (Cluster-Based Scheduling) is a polynomial-time optimal algorithm for scheduling intree-structured tasks on two identical processors under UECT constraints.

Characteristics:

• Assign the root always to processor P1.
• Identify clusters (subtrees) that can be entirely assigned to P2.
• Balance load between P1 and P2 while minimizing communication delays (by keeping predecessor–successor pairs together when beneficial).

Advantages:

• Polynomial time for two processors.
• Minimizes communication by clustering-related tasks.
• Load balancing through R parameter.
• Optimal for many intree structures under UECT constraints
• Simple to implement.

Limits:

• Only for two processors.
• Assumes unit execution and communication times.
• May not be optimal for all intree structures.
• Does not extend easily to m > 2 processors.

Algorithm steps:

• R computing, which is the number of tasks that will be assigned to the processor P2.
• Cluster selection for P2.
• Processor P1 scheduling.
• Processor P2 scheduling.

CBoS algorithm can be summarized as in Algorithm 1:

Algorithm 1 Clusters determination algorithm

Input:  Intree T-tree, Integer N Output:  Tasks allocated to $P_2$  1:  Begin  2:        Integer $R\leftarrow \lfloor (n-2)/2\rfloor$  3:        Integer $currentLevel\leftarrow 2$  4:        while $R>0$ do  5:              $L\leftarrow \{T\mid T\mathrm{not}\mathrm{marked}\mathrm{and}T\in currentLevel\}$  6:              Sorted in decreasing order by weight  7:              if $\left|L\right|>1$ then  8:                   Let $T_i$ be the first task in L such that $w\left(T_i\right)\le R$  9:                   if such a $T_i$ exists then 10:                         cluster$\left(T_i\right)$ is allocated to $P_2$ 11:                         cluster$\left(T_i\right)$ is marked 12:                         $R\leftarrow R-w\left(T_i\right)$ 13:                         $T_i$ is removed from L 14:                   else 15:                         $currentLevel\leftarrow currentLevel+1$ 16:                   end if 17:              else 18:                   Let $T_i$ be the only task of L 19:                   $R\leftarrow min(R,\lfloor (w(T_{alone}-1)/2\rfloor )$ 20:                   $currentLevel\leftarrow currentLevel+1$ 21:              end if 22:        end while 23:  End

In the following Figure 1, an example of scheduling an intree by the CBoS algorithm is presented:

$$Numberoftasks=18\mathrm{and}\left[18-2\right]/2=8.$$

R is initialized to 8. In this example, the CBoS algorithm assigns 3 subtrees to the processor $P2$. The sum of tasks of the three subtrees is 8 and the rest is allocated to the processor $P1$.

The computed schedule is described by Figure 2.

2.3. Problem of Scheduling Tasks with Unavailabilities and Precedence Constraints

In the current literature, there is no best algorithm for scheduling precedence-constrained jobs on processors that are unavailable for certain time periods. In [5], the authors proposed a method to address this problem, specifically considering scheduling UECT intrees on two identical processors, called P1 and P2, both of which may experience unavailability periods multiple times.

The new algorithm named Adapted CBoS (ACBoS) is based on the original CBoS algorithm. The most important difference between the two algorithms is how ACBoS cal-culates the parameter R, which is the upper bound on the number of jobs that can be assigned to processor P2 in any optimal schedule. The algorithm computes the value for R as follows:

a.

Initialization

Let N denote the total number of tasks in the intree.

Set $R=0$ as the task count allocated to $P2$.

Set $t=0$ as the discrete time slot index.

b.

Processor availability scanning:

At each time slot t, the availability states of P1 and P2 are evaluated.

c.

Task assignment when P1 is available:

If P1(t) is available, decrement N by 1, corresponding to the assignment of one task to P1.

d.

Task assignment when P2 is available:

If P2(t) is available, decrement N by 1 and increment R by 1, representing the assignment of one task to P2.

e.

Time progression

After processing the availability at time t, increment t by 1. If both processors are unavailable at t, increment t until at least one becomes available.

f.

Iteration condition

Repeat steps be until N ≤ 3.

g.

Boundary case N = 3

• If both P1(t) and P2(t) are available, we simulate assigning two tasks (one to each processor): set N = N − 2 and R = R + 1.
• If only P1(t) is available, we simulate assigning one task to P1: set N = N − 1 (no change to R).
• If only P2(t) is available, we simulate assigning one task to P2: set N = N − 1 and R = R + 1. In each case, t is incremented after the simulated assignment to reflect time progression.

h.

Final case N = 2

Increment R by 1 if P1 is unavailable at both t and t + 1, indicating that a task must be assigned to P2 due to consecutive unavailability of P1.

The algorithm terminates by returning R, which serves as an adaptive upper bound for task allocation to P2 under intermittent processor unavailability.

The two processors continue to be simulated until N = 0. At this point, the ACBoS algorithm continues in the same manner as the original CBoS algorithm.

Steps of R computing (for the considered ACBoS algorithm) are illustrated by Algorithm 2:

Algorithm 2 R computing algorithm

Input:  v : root of the intree Output:  R  1:  $N\leftarrow$ number of tasks in the intree  2:  $t\leftarrow 0$, $R\leftarrow 0$  3:  while $N>3$ do  4:        if $P_1\left(t\right)$ then  5:              $N\leftarrow N-1$  6:        end if  7:        if $P_2\left(t\right)$ then  8:              $N\leftarrow N-1$  9:              $R\leftarrow R+1$ 10:        end if 11:        $t\leftarrow t+1$ 12:  end while 13:  while $P_1\left(t\right)$ and $P_2\left(t\right)$ do 14:        $t\leftarrow t+1$ 15:  end while 16:  if $N=3$ then 17:        if $P_1\left(t\right)$ then 18:              if $P_2\left(t\right)$ then 19:                   $R\leftarrow R+1$ 20:                   $N\leftarrow 1$ 21:              else 22:                   $N\leftarrow 2$ 23:                   $t\leftarrow t+1$ 24:              end if 25:        else 26:              $N\leftarrow 2$ 27:              $R\leftarrow R+1$ 28:              $t\leftarrow t+1$ 29:        end if 30:  end if 31:  if $N=2$ then 32:        while $P_1\left(t\right)$ and $P_2\left(t\right)$ do 33:              $t\leftarrow t+1$ 34:        end while 35:        if $P_1\left(t\right)$ and $P_1(t+1)$ then 36:              $R\leftarrow R+1$ 37:        end if 38:  end if 39:  return R

In order to study the behavior of this algorithm, a lower bound is proposed and a comparison between ACBoS and the lower bound is carried out. The proposed lower bound can be summarized as in Algorithm 3.

Algorithm 3 Bound computation algorithm

1:  $N\leftarrow$ number of tasks in the intree  2:  $bound\leftarrow 0$     ▷ current time slot  3:  while $N>0$  do  4:        if $P_1\left(t\right)$ then  5:              $N\leftarrow N-1$  6:        end if  7:        if $P_2\left(t\right)$ then  8:              $N\leftarrow N-1$  9:        end if 10:        $bound\leftarrow bound+1$ 11:  end while 12:  return $bound$

The simulation of the heuristic [28] shows that it gives good results for instances of large trees (Figure 3) but mediocre results for chain instances (Figure 4).

Figure 4 illustrates that the disparity in makespan between the lower bound and the ACBoS algorithm widens as the number of tasks increases. Additionally, the computational complexity of this problem specifically for schedules involving multiple unavailability periods on both machines remains an open research question.

3. Problem Formulation

We are given the following:

• Tasks: N tasks, numbered 1, 2, …, N.
• Precedence relation: These tasks form an intree (also called intree or converging tree).

An intree:

• Each task has at most one immediate successor (children point to a parent in terms of precedence, but precedence arrows go from predecessor to successor in scheduling terms).
• In precedence terms: each task can have multiple predecessors but only one successor (except the root task, which has no successor). So, the successor is the task that must wait until all its predecessors finish. leaf tasks are the ones with no predecessors (incoming arcs), and they all point toward one root. So, in scheduling, a predecessor must finish before a successor starts.

Execution time:

• Every task takes unit time to execute (UET = Unit Execution Time).

Communication cost:

• If a task Ti and its immediate successor Tj are scheduled on different processors, then after finishing Ti, we must wait one unit of communication delay before Tj can start.
• If they are on the same processor, no communication delay occurs. Otherwise, communication time is Unit (UCT = Unit Communication Time).
• Communication is only between predecessor–successor pairs.

Processors:

• Two identical processors are available to schedule tasks. The first processor denoted P1, which is always available, and the second processor P2, subjected to unavailability periods.
  Objective:
• Minimize total schedule length (makespan) subject to precedence, communication, and resource constraints.
  Notation:
• Using the three-field notation introduced by Graham et al. [19], the problem is denoted as $P2|intree,pi=1,c=1,nr-a|Cmax$.

An example of scheduling under UECT assumption and UET assumption is provided to explain the difference between these (Figure 5).

Figure 5 represents the N tasks related by intree-precedence constraints. All execution time of tasks is considered to be unitary.

Figure 6 represents a scheduling under UET assumption and Figure 7 represents a scheduling under UECT assumption.

The first schedule assumes negligible communication overhead between tasks, regardless of processor assignment, thus focusing solely on precedence constraints. In contrast, the second schedule imposes a unit communication cost for dependent tasks executed on different processors. This restriction prevents task 2 from starting at the second time unit because its predecessor, task 3, runs on P1 while it is assigned to P2.

The objective of this work is to schedule N intree-structured tasks across two identical machines, respecting precedence relations to minimize the makespan. The schedule must also account for unavailability periods on one machine, with the constraint that each machine processes only one task at a time.

4. The Proposed Scheduling Algorithm: Scheduling Intrees with Unavailability Constraints (SIwUC)

In this section, we introduce a polynomial algorithm for minimizing the makespan of UECT intrees on two identical processors (P1 and P2), where one of them is subject to non-availability constraints. Without loss of generality, the processor subject to unavailabilities is denoted P2.

4.1. Principle of the Algorithm

The core strategy of the algorithm is to maximize the workload assigned to processor P2, subject to its scheduled downtime. Once P2 has been loaded to capacity, the remaining tasks are distributed to P1 or partitioned between both processors, based on the structural characteristics of the given task set.

Before presenting the complete algorithmic procedure, we introduce a set of dominance rules that govern task assignment and ordering.

Theorem 1.

A schedule that eliminates idle time on processor P1 is considered dominant. This means that any optimal schedule exhibiting idle periods on P1 can be reconfigured without increasing the makespan into an equally optimal schedule where P1 operates continuously with no idle intervals.

Proof of Theorem 1.

Consider an optimal schedule with idleness on $P1$ (Figure 8).    □

The idle time on $P1$ in this case originated from a communication delay introduced between task X and its single successor, task Y.

Specifically, X was processed on $P2$ at time $t-1$, while Y was scheduled on $P1$ at time t. Although X may have had multiple predecessors, the last of these completed by time $t-3$, leaving sufficient room to reassign X from $P2$ at $t-1$ to $P1$ at t without violating any communication constraints or increasing the makespan.

This transformation illustrates a general principle: schedules that eliminate idle time on $P1$ dominate those that do not, since any schedule with idle periods can be reconverted without worsening the makespan into one where $P1$ operates continuously.

Theorem 2.

Consider an optimal schedule represented by Figure 9 in which processor P2 exhibits idle time.

This situation arises because task Y, a predecessor of task X, was only executed on P1 starting at time $t-1$. Due to the inherent properties of the intree structure, Y can have at most one successor, which is task X. As a result, Y can be relocated from P1 at time $t-1$ to P2 at time t without violating any constraints, as all predecessors of Y are completed by time $t-2$. Consequently, reassigning Y to P2 at time t eliminates the initial idle interval on P2. While this shift may introduce new idle time on P1, Theorem 1 guarantees that idle periods on P1 can be removed without increasing the overall makespan. Moreover, this removal does not reintroduce the original idle interval on P1. Therefore, by combining the reassignment of Y to P2 with the elimination of P1’s idle time, we obtain a revised schedule in which both processors operate without any idle intervals, preserving optimality.

4.2. Description of the Proposed Method

4.2.1. First Step: R Computing

The parameter R is designed to act as a tight upper bound for the number of tasks that can be assigned to processor P2 within the SIwUC (Scheduling with Unavailability Constraints) algorithm. The earlier bound of $\left[{\displaystyle \frac{n-2}{2}}\right]$ established in the CBoS algorithm no longer applies, since processors may now be subject to intermittent unavailability periods. To address this, we introduce a new iterative procedure to compute R.

We initialize $R=0$ and then incrementally increase R by verifying whether any task in the intree can be feasibly assigned to P2 without inducing idle time on P1. This feasibility check is repeated iteratively; each time a valid task is found, R is increased by one. The procedure terminates when no additional task can be assigned to P2 without violating the idle-free condition on P1. The value of R at termination is adopted as the final bound. Before elaborating on the algorithm, we introduce two conditions that must be satisfied for any task to be eligible for assignment to P2.

First necessary condition: C1 In a scheduling without idleness, if a task T can be executed on the processor P2 at time t, then

P2(t) is true.
Level (T) ≤ N − NB(t)

Proof of C1.

Consider a task T scheduled on P2 at time t.

In the intree, there are N − level(T) tasks that are not successors of T. For the schedule to be feasible, this number must be sufficient to occupy all time slots that require filling. Specifically, these slots include the following:

• NB(t) − 1 slots on P2 before time t (excluding the slot occupied by T itself);
• The slot on P1 at time t.

Because all successors of T incur a communication delay at time t, the slot on P1 at t must be taken by a task that is not a successor of T. Therefore, we obtain the following necessary condition

$$N-level\left(T\right)\ge NB\left(t\right)-1+1.$$

   □

Second necessary condition: C2

In any given schedule, if a task T can be executed on the processor P2 at the slot t, then

$$\begin{gathered} \mathrm{P}2\left(\mathrm{t}\right) \mathrm{is} \mathrm{true} \\ \mathrm{and} \\ weight\left(T\right)\le NB\left(t\right)-2 if t>1 \\ weight\left(T\right)=1 if t=1 \end{gathered}$$

Proof of C2.

The algorithmic step establishes the upper bound R, representing the maximum number of tasks that can be allocated to processor P2 without introducing idle time on processor P1. This bound is determined via an iterative analysis of the intree structure. A candidate task T is considered eligible for assignment to P2 only if it satisfies two key conditions C1 and C2. Each time a task meets both criteria, R is incremented. The logical foundation for these assignment conditions rests on the observation that a task T placed on P2 faces two obstructions that limit the execution of its entire subtree at specific times:

• The execution of task T cannot be performed because there is a blocking condition of task T with regards to time; the insertion of its successor(s) can only occur after it has completed execution.
• The execution of task T cannot be performed at $t-1$ with regard to the communication cost between processors; when a successor(s) of task T is scheduled to execute on P1, there is a one-unit delay for message transmission once task T is complete on P2.

Here, we have calculated the maximum possible value for R. At the next scheduling stage, the algorithm will try to form a schedule for P2 containing R tasks and a schedule for P1 containing N-R tasks; if this does not succeed in creating a feasible schedule, the algorithm falls back to allocating all remaining tasks to P1.    □

R computing algorithm can be summarized as in Algorithm 4.

Algorithm 4 R Computation

Input:  Intree $Tree$, Integer N Output:  Integer R  1:  $B\leftarrow true$                                   ▷ 1 operation  2:  $t\leftarrow 1$                                   ▷ 1 operation  3:  $R\leftarrow 0$                                    ▷ 1 operation  4:  $p\leftarrow 0$                                     ▷ 1 operation  5:  while $B=true$ do                          ▷ $N-5$ comparisons  6:        if $P_2\left(t\right)$ then                            ▷ $N-5$ evaluations  7:              if $t=1$ then                          ▷ $N-5$ comparisons  8:                   $p\leftarrow 1$                            ▷ $N-5$ assignments  9:              else 10:                   $p\leftarrow R+(t-1)$                        ▷ $N-5$ assignments 11:              end if 12:              if in $Tree$ exists an unmarked task $T_i$ such that 13:        $w\left(T_i\right)\le p$ and $\mathrm{level}\left(T_i\right)\le N-(t+R+1)$ then             ▷ $7N(N-5)$ operations 14:                   if $\mathrm{level}\left(T_i\right)=N-(t+R+1)$ then             ▷ $5(N-5)$ comparisons 15:                         mark all tasks in the tree except the successors of $T_i$ ▷ $2(N-1)(N-5)$ operations 16:                   end if 17:                   $R\leftarrow R+1$                         ▷ $2(N-5)$ operations 18:                   mark $T_i$                         ▷ $2(N-5)$ operations 19:              else 20:                        $B\leftarrow False$                          ▷ $N-5$ assignments 21:              end if 22:        end if 23:        if $t+R>N-5$ then                      ▷ $3(N-5)$ comparisons 24:              $B\leftarrow False$ 25:        end if 26:        $t\leftarrow t+1$                             ▷ $2(N-5)$ operations 27:  end while 28:  remove task markings for all tasks in the intree                 ▷N operations 29:  return R

4.2.2. Second Step: Schedule Construction

The Figure 10 introduces the core task assignment algorithm which represented by. The fundamental principle guiding this algorithm is to distribute tasks between processors P1 and P2 so as to minimize the overall makespan.

To achieve this, we employ a multi-case heuristic tailored to reduce communication delays and, most critically, to evenly balance the computational workload across both processors. Maintaining a balanced load prevents either processor from becoming a bottleneck, which is essential for minimizing the total schedule length.

5. Complete Examples

In this section, two complete examples are described. In the first one, we consider an instance of intree and scheduling environment such that the optimal schedule assigns the root to the processor P1. Then, in the second example, we present another instance of intree such that the optimal schedule allocates the root to the processor P2.

5.1. Example 1

In this example, we consider an instance with 16 tasks as illustrated by Figure 11 and a scheduling environment as described by Figure 12.

• R computing steps

• Table 1. Iteration values of the algorithm parameters.

  Iteration (t)	P2(t)	p Value	R Value
  1	true	1	1
  2	false	1	1
  3	true	3	2
  4	true	5	3
  5	true	7	4
  6	true	9	5

  presents the calculation details of R, which represents the maximum number of tasks that can be assigned to the P2 processor.

• Schedule Computing steps

• Table 2. Execution steps of the algorithm.

  Level	List L	Satisfied Condition	Chosen Task	R	Marked Tasks
  2	$\left\{2\right\}$	1. All tasks in L have weights higher than R. 2. $NB\left(t\right(R\left)\right)<N-cl$. 3. $cl:=cl+1$.		5
  3	$\left\{3\right\}$	1. All tasks in L have weights higher than R. 2. $NB\left(t\right(R\left)\right)<N-cl$. 3. $cl:=cl+1$.		5
  4	$\{4,11\}$	1. All tasks in L have weights higher than R. 2. $NB\left(t\right(R\left)\right)<N-cl$. 3. $cl:=cl+1$.		5
  5	$\{5,6,7,8,9,10,12\}$	1. In L exists a task $T_i$ such that $w\left(T_i\right)\le R$.	12	0	$\{12,13,14,15,16\}$

  presents the details in the scheduling calculation, step by step.

• Computed schedule

• The Figure 13 presents the optimal schedule where 5 tasks are assigned to the processor P2 and 11 tasks are assigned to P1.

5.2. Example 2

In this example, we consider an instance with 7 tasks as illustrated by Figure 14 and a scheduling environment as described by Figure 15.

Step 1:

Initialization: The algorithm initializes $R:=2$, as determined by Algorithm 4. This parameter R quantifies the remaining communication capacity or available time slack for task scheduling.

Step 2:

Level Selection: The current processing level is set to $c_l:=2$, establishing the baseline for subsequent scheduling decisions.

Step 3:

Task List Identification: The scheduler identifies the task set $L=\{5,2\}$ for processing. Notably, all tasks in L have weights exceeding the current resource constraint R.

Step 4:

Resource Verification: Based on the condition $NB\left(t\left(R\right)\right)=N-c_l$, the scheduler examines the next processing level to locate a task T whose corresponding cluster, $\mathrm{cluster}\left(T\right)$, can be feasibly scheduled within the time interval $[0,3]$.

Step 5:

Cluster Assignment: Cluster 3 is determined to be schedulable within $[0,3]$. This assignment satisfies the feasibility conditions since $w\left(2\right)<6$ and processor $P_2$ maintains availability (experiencing no unavailability periods) during the subsequent interval $[3,5]$.

Step 6:

Resource Update: Following the successful allocation of cluster 3, the remaining resource R is decremented to zero, reflecting the complete utilization of available resources.

Step 7:

Chain Scheduling: The residual task set $\{7,6,5,2,1\}$ undergoes sequential chain scheduling: tasks are assigned to processor $P_1$ during $[0,3]$, then to processor $P_2$ during $[3,5]$, ensuring efficient processor utilization and meeting timing constraints.

The optimal computed schedule is described by Figure 16:

5.3. Example 3

In this example, we consider an instance with 22 tasks as illustrated by Figure 17 and a scheduling environment as described by Figure 18.

For a number of tasks equal to 22, the value of R calculated by Algorithm 3 is equal to 7, and the optimal schedule calculated by Algorithm 4 is represented by Figure 19. Indeed, the subtree rooted by task T3 is allocated to P2, and the remaining tasks are assigned to P1.

6. Optimality Proof

Lemma 1.

An optimal schedule cannot initially assign more than R tasks to the processor $P_2$.

Proof. 

The parameter R, derived from the initial algorithm, represents the upper bound on tasks assignable to $P_2$ while maintaining a schedule with no idle time on $P_1$. Under the assumption that the root task of the intree is allocated to $P_1$, the makespan achieved by such a schedule is $N-R$, where N denotes the total number of tasks. This section aims to demonstrate that this makespan is optimal.

For contradiction, suppose a schedule exists that assigns $R+1$ tasks to $P_2$. By the definition of R, at least one of these $R+1$ tasks violates one or both conditions (C1 or C2) required for a non-idle schedule on $P_1$. Consequently, $P_1$ must experience idle time due to that task. Given the intree structure and the communication delays between tasks, this idle time will not be isolated; rather, it will propagate, leading to at least two distinct idle periods on $P_1$. As a result, the makespan would increase to at least $(N-R)+1$. This contradicts the optimal makespan of $N-R$, thereby confirming that the maximum feasible R yields $C_{max}=N-R$, which is indeed optimal. □

Lemma 2.

The schedule computed by SIwUC algorithm is without idleness on the processor $P_1$.

Proof. 

Constraints C1 and C2 form the foundational criteria for assigning tasks to processor $P_2$. By adhering to these constraints during task allocation, it is guaranteed that processor $P_1$ will not encounter any idle periods resulting from the distribution of work to $P_2$. Consequently, any schedule constructed in compliance with C1 and C2 will maintain continuous execution on $P_1$ without interruptions.

Moreover, Theorem 1 addresses schedules that deviate from C1 and C2 by providing a corrective mechanism: any idle interval on $P_1$ can be resolved by transferring an appropriate task currently scheduled on $P_2$ to $P_1$. The steps explained by the flowchart in Figure 10 incorporates this principle by enforcing conditions C1 and C2 during initial task assignment, and when idle time arises on $P_1$, by applying the transformation prescribed in Theorem 1 to reassign work from $P_2$ to $P_1$, thereby restoring an idle-free schedule. □

Lemma 3.

The schedule computed by SIwUC algorithm is without idleness on the processor $P_2$.

Proof. 

It is impossible that that a time slot t would be able to violate either of the necessary conditions (C1 or C2) at the same time that its following time slot, $t+1$, meets both conditions. In particular, if a necessary condition is not met at time t, it cannot be met at any subsequent time slot $t+k$, where $k\ge 1$.

First case: At time t, the first necessary condition (C1) is not satisfied: there exists no task T in the tree such that $\mathrm{level}\left(T\right)\le N-NB\left(t\right)$. C1 remains not satisfied for all future times $t+k$ ($k\ge 0$) because $NB(t+k)>NB\left(t\right)$.

Second case: At time t, the second necessary condition (C2) is not satisfied: there exists no task T in the intree such that $\mathrm{weight}\left(T\right)\le NB\left(t\right)-2$ and $\mathrm{level}\left(T\right)\le N-NB\left(t\right)$. Observe that for $k>0$, both $NB(t+k)$ and $\mathrm{weight}\left(T\right)$ increase by at least 2 between t and $t+k$. Therefore, at time t, C2 does not hold.

The completion of task T that occurs at some future moment (C2) and satisfies both conditions is completed at time $(t+k)$. Task T meets the level requirement at time $(t+k)$ ($\mathrm{level}\left(T\right)\le N-NB(t+k)$). Therefore, it has also met the relaxed level requirement at a previous point in time, time t ($\mathrm{level}\left(T\right)\le N-NB\left(t\right)$). In order to have violated C2 at time t, task T must have violated the weight requirement for that task ($\mathrm{weight}\left(T\right)>NB\left(t\right)-2$). To satisfy C2 at time $(t+k)$, we must have a weight requirement that satisfies C2 ($\mathrm{weight}\left(T\right)\le NB(t+k)-2$) in order to satisfy $NB(t+k)>NB\left(t\right)$. Additionally, any newly available task that becomes available at $(t+k)$, which causes an increase in $NB\left(t\right)$, will automatically violate the level requirement ($\mathrm{level}\left(T\right)$). Thus, C2 is not able to satisfy the task due to contradictions. □

Lemma 4.

If it is not possible to assign a hole cluster to $P_2$ (i.e., tasks of the cluster will be allocated to $P_1$ and $P_2$) or the root cannot be assigned to $P_1$ and the rest of tasks can be allocated without idleness, then the makespan of the schedule is optimal.

Proof. 

Once all tasks are assigned to their respective processors, the resulting schedule achieves an optimal makespan of $N-R$. □

Lemma 5.

If it is not possible to obtain a schedule without idleness when the root is allocated to the processor $P_1$ and the root cannot be assigned to $P_2$, then a decrease of R is the only solution.

Proof. 

Reducing R is necessary when processor $P_1$ has idle time and assigning the root task to $P_2$ would increase the makespan.

For this reason, in the definition of R, we speak about the maximum number of tasks that can be allocated to $P_2$ and not the exact number of tasks that can be allocated to $P_2$. □

7. Conclusions and Future Works

The problem of scheduling intrees with unit execution time on two processors where one of these is subjected to unavailability periods is studied in this paper. In this paper, a new optimal algorithm is proposed for this problem.

The proposed algorithm is entitled SIwUC.

An optimal proof of the proposed SIwUC algorithm is presented. Depending on the instance of the graph and the scheduling environment, the optimal schedule assigns the root to the processor P1 or the processor P2.

The two cases are treated in this paper. The obtained results emphasize how the scheduling solutions exhibit a form of symmetry in balancing tasks between the two processors despite unavailability constraints.

As future work, this problem can be extended to the case of unavailability on both processors or a number of machines greater than two.