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Article

An Effective Hybrid Rescheduling Method for Wafer Chip Precision Packaging Workshops in Complex Manufacturing Environments

1
School of Smart Manufacturing, Jianghan University, Wuhan 430056, China
2
School of Mechanical Science and Engineering, Huazhong University of Science and Technology, Wuhan 430074, China
3
Marine Design and Research Institute of China, Shanghai 200011, China
*
Author to whom correspondence should be addressed.
Micromachines 2025, 16(12), 1403; https://doi.org/10.3390/mi16121403
Submission received: 17 November 2025 / Revised: 9 December 2025 / Accepted: 11 December 2025 / Published: 12 December 2025
(This article belongs to the Special Issue Future Trends in Ultra-Precision Machining)

Abstract

With the continuous development of semiconductor manufacturing technology and information technology, the sizes of wafer chips are becoming smaller and the variety is increasing, which has put forward high requirements for wafer chip precision manufacturing and packaging workshops. On the one hand, the market demand for multiple varieties and small batches will increase the difficulty of scheduling. On the other hand, the complex manufacturing environment brings various types of dynamic events that will disrupt production plans. Accordingly, this work researches the wafer chip precision packaging workshop rescheduling problem under events of machine breakdown, emergency order inserting and original order modification. Firstly, the mathematical model for the addressed problem is established, and the rolling horizon technology is adopted to deal with multiple dynamic events. Then, a hybrid algorithm combining an improved firefly optimization framework and variable neighborhood search strategy is proposed. The population evolution mechanism is designed based on the location-updating law of fireflies in nature. The variable neighborhood search is applied for avoiding local optima and sufficiently exploring in the neighborhood. At last, the test results of comparative experiments and engineering cases indicate that the proposed method is effective and stable and is superior to the current advanced algorithms.

1. Introduction

Semiconductor chips, with their advantages of powerful functions and small volume, are widely used in fields such as the manufacturing industry, household appliances, medical devices, vehicles, and electrical products [1]. At present, semiconductor chips are constantly developing towards the directions of large batch and diversification [2]. Hence, higher requirements have been put forward for chip precision manufacturing, especially for the chip precision packaging production lines that are located in the middle and lower reaches of production chain [3]. Furthermore, the manufacturing system of chip precision packaging workshops is required to aim at high production efficiency, low operating costs, and timely delivery to adapt to complex and ever-changing market demands. Therefore, it poses significant challenges to the semiconductor chip precision packaging production line scheduling problem (SCPPLSP), but there are currently relatively few works on this issue.
In the semiconductor chip packaging process, wafers are processed and transported in batch forms. In order to reduce transportation costs and equipment adjustment time caused by frequent switching for different types of chips, chips of same type tend to be grouped in several batches for centralized processing, instead of being processed one by one, which is known as the lot streaming [4]. Unfortunately, under the production mode of large batches and multiple varieties, a large number of batches will drastically increase the scale of the solution space for scheduling problems [5]. Some scholars have concluded through theoretical deduction and extensive experiments that reasonable batching strategy can effectively prune the solution space for the lot streaming scheduling problem [6]. However, these existing batching strategies were specifically designed for the problems with specific characteristics and scales, which are not the primary way to solve engineering problems. An intelligent optimization algorithm is currently one of the effective ways to solve complex scheduling problems but it has low search efficiency and poor solution quality for the lot streaming scheduling problem. Therefore, it is urgent to develop reasonable and efficient intelligent optimization algorithms based on the problem characteristics to improve the quality and efficiency for the addressed SCPPLSP.
The semiconductor chip packaging process is often affected by multiple dynamic uncertainties [7]. For instance, there are many types and quantities of machines or processing units required for the chip packaging process, and hence machinery breakdown events often occur. As another example, affected by the shortage of chips in the semiconductor and electronic manufacturing market and the diversification of demands, events such as emergency orders and order cancelations often occur. The above dynamic uncertainty interferences existing in the chip packaging production line are mostly sudden events, and the rescheduling mode is commonly applied for this type of dynamic scheduling problems [8]. However, the existing studies on rescheduling problems mainly focus on the single dynamic event. Therefore, it is urgently needed to analyze the impact of dynamic event and propose rescheduling methods for the scheduling problems under multiple perturbations.
Based on the above analysis, the SCPPLSP under the multiple dynamic events will be addressed in this paper. For the scheduling optimization problems, establishing the mixed-integer linear programming (MILP) model is the foundation for analyzing the problems’ characteristics and solving combinatorial optimization problems [9]. Hence, in this work, the MILP model for the SCPPLSP is established first, and then the rescheduling method based on rolling horizon technology [10] is given to deal with the multiple different dynamic events. Firefly algorithm (FA) is designed based on simulating the flashing behaviors and movement law of fireflies in nature, and has the advantages of simple encoding, strong global search ability, flexible framework for easy improvement, and easy tuning for parameters [11]. Compared to other swarm intelligence optimization algorithms, the improved FA frameworks are more commonly used to solve complex scheduling optimization problems in practical engineering [12,13,14]. Consequently, enlightened by the design concept of standard FA, this research constructed a new improved FA framework for the SCPPLSP. To avoid local optima and strengthen global searching, the variable neighborhood descent (VND) strategy is added to the proposed improved FA framework.
The rest of this work is arranged as below. Section 2 summarizes the literatures in aforesaid fields. Section 3 characterizes the SCPPLSP and establishes the MILP model for it. In Section 4, the presented hybrid FA based on VND (HFA-VND) is explicated in detail. In Section 5, the comparison experiments and the results analysis are presented, and an engineering case verification is given. Section 6 summarizes the entire text.

2. Related Works

2.1. Semiconductor Manufacturing System

The semiconductor manufacturing system scheduling problem is an academic hotspot, and the scholars in the related fields have obtained certain study achievements [15,16]. Yang et al. [17] focused on the issues of wafer reentrance and residency time constraints. Then, they carried out the schedulability analysis on the different strategies, derived schedulability conditions, and proposed a scheduling algorithm to obtain the optimal scheduling scheme. Wang et al. [18] considered the correlation between wafer lots and production cycles in reentrant processes and put forward a fuzzy hierarchical model to adapt the production cycle of each beach. There are a variety of different performance indicators for semiconductor manufacturing systems, such as work-in-progress quantity, wafer residency time, equipment utilization rate, production cycle, operating cost, total movement volume, on-time delivery rate, energy consumption, and so on [19]. To improve the equipment utilization rate and throughput of semiconductor manufacturing systems, Siebert et al. [20] provided a batch scheduling strategy for uncertain environments. Calmels [21] addressed the multi-objective conflict problem in semiconductor manufacturing and presented a mixed-integer programming formulation along with a corresponding heuristic local search strategy. With the improvement of information technology, the analytical methods based on industrial big data technology have gradually been applied for modeling and optimization of the semiconductor manufacturing system [22,23,24,25]. Park et al. [26] addressed the large-scale production issue in semiconductor manufacturing by adopting a deep reinforcement learning approach and introducing a new state representation to adapt to changes in available resources and production requirements. Lee et al. [27] focused on the reentrant phenomenon in semiconductor manufacturing, and improved the state, action, and reward mechanisms to optimize the scheduling strategy. Although, the above studies have covered issues of reentrant processing, multi-objective optimization, uncertain disturbances, and so on, there is almost no research on SCPPLSP under the interference of multiple dynamic events.

2.2. Lot Streaming Scheduling

The scheduling problem with lot streaming is an integrated optimization problem of batching and scheduling, which is the NP-hard problem [28,29,30,31]. Currently, based on different batching methods, the related studies can be divided into three modes: equal-size uniform batching [32], unequal-size uniform batching [33], and variable sub-lot [34]. All of these modes have achieved certain research results. Zhang et al. [32] proposed an improved migratory bird optimization algorithm (MBO) to solve the lot streaming hybrid flowshop scheduling problem (HFSP). Wang et al. [35] focused on the integrated problem of batch processing and lot streaming in a two-stage HFSP and adopted a heuristic algorithm to minimize the total weighted completion time. Nejati et al. [36] studied the HFSP with lot streaming under multi-stage unequal-size lots with shift constraints. Considering the scenario of interleavable sublots, Nejati et al. [37] studied a two-stage assembly line with lot streaming and unequal-size lots. They took the makespan as the optimization objective, and applied the genetic algorithm (GA) and simulated annealing (SA) algorithm, respectively. For a special form of hybrid flow shop scheduling problem with lot streaming and multi-stage unequal-size lots, Lalitha et al. [38] established the MILP model and proposed a related heuristic rule for solving. For the lot streaming scheduling problem, Novas [39] designed a novel constraint method and determined the number of sublots for all lots in the scheduling scheme. A large number of batch divisions will greatly enlarge the size of solution space [6,40], and reasonable batching strategy can effectively improve the solving efficiency. Vivek et al. [41] used a heuristic method to evaluate 11 batching strategies and obtain the optimal batching method. However, the batching strategy is usually specifically designed for the problems with specific characteristics and scales. Hence, proposing an efficient optimization algorithm is an effective way to solving scheduling optimization problem with lot streaming.

2.3. Dynamic Scheduling

The complex production environment and diverse market demands [42] will disrupt the scheduling plans formulated by the manufacturing system. The scholars dedicated to dynamic scheduling problems mainly focus on scheduling methods, such as rescheduling [43], inverse scheduling [44], and robust scheduling [45,46,47]. Rescheduling mode is often adopted for the unexpected dynamic events that have significant impact on production plans. Zhang et al. [10] presented a rescheduling method based on a multi-objective MBO for HFSP. He et al. [48] provided a rescheduling model for hybrid flow shop to address the problem of urgent order insertion and used the NSGA-III algorithm to solve it. Inverse scheduling mode involves adjusting controllable resources and processing parameters to meet production requirements instead of changing the production plan, which is suitable for the unexpected dynamic events that have small-scale impact on production plans [49]. Mou et al. [50] adopted an inverse scheduling mode and studied a hybrid algorithm for the energy-efficient scheduling problem. Zhang et al. [51] proposed an efficient hybrid integer and a categorical particle swarm optimization algorithm for the multi-mode multi-project inverse scheduling problem in the turbine assembly workshop. For random uncertain disturbances, robust scheduling strategies are often employed. Qiao et al. [52] proposed a robust real-time scheduling strategy that combined a real-time controller with offline scheduling. To tackle the problem of uncertain processing times in semiconductor manufacturing systems, Liu et al. [53] proposed a three-stage multi-objective robust optimization method to enhance system stability. Preventive maintenance strategy is one of the robust scheduling methods, which is used to handle dynamically predictable events. Lee et al. [54] designed a preventive maintenance optimization model to prevent the impact of downtime events on semiconductor manufacturing systems. Obviously, there have been certain studies on the dynamic scheduling problems under a single dynamic event, but the related research on multiple types of uncertain events is paid little attention, especially for the scheduling problem in semiconductor chip packaging production lines.

3. Problem Formulation

3.1. Problem Description

SCPPLSP can be equivalent to an HFSP with the lot streaming processing mode and the interference of multiple dynamic events. In this research, the most common dynamic events in chip packaging production lines, namely machine breakdown, emergency order inserting, and original order modification, are considered in SCPPLSP. Then, the SCPPLSP under multiple dynamic events can be described as follows: the chips of several types in the order need to be continuously processed in several processing stages, and the processing steps for all the chips are the same. In each processing stage, there are several same processing units or machines available for selection. The chips of each type are divided into sub-lots with the same number. Each sub-lot that has been completed at a certain processing stage can be immediately carried to the next process stage, while the different sub-lots can be processed simultaneously at different stages, which accelerates the operation of the production line and improves production efficiency. In SCPPLSP, the sub-lots are treated as the smallest processing units for scheduling. SCPPLSP aims to minimize the makespan as the optimization objective. Here, the following hypothesis settings are given:
  • To avoid the frequent switching, all sub-lots of each type of chip can only be processed continuously by the same processing unit or machine at each stage;
  • All the processing unit can only deal with one sub-lot simultaneously, and each sub-lot can only be processed by one processing unit;
  • There is no waiting time limit for each sub-lot between the adjacent processing stages;
  • The capacity of the buffer between the adjacent processing stages is usually set to be much larger than the number of chips in process, so its impact on production plan and rhythm can be approximately ignored;
  • The setup times can be approximated to be sequence independent and have been calculated within the processing times;
  • The transportation time between adjacent processing stages has been calculated in the processing time;
  • Machine breakdown events randomly occur at any time, and the maintenance time can be accurately predicted;
  • Emergency order inserting events can randomly occur randomly at any time, and a certain number of sub-lots will be added to the production plan;
  • Original order modifications can randomly occur randomly at any time, and a certain number of sub-lots will be removed from the production plan.

3.2. Rescheduling Mode

The dynamic events described in this work, namely machine breakdown, emergency order inserting, and original order modification, can be treated as sudden events, and it is generally difficult to accurately predict the exact time when these dynamic events will occur. Therefore, the rescheduling mode is adopted here. The rescheduling mode can be described as follows: when a dynamic event occurs, the unprocessed operations are rescheduled for the optimization of performance indicators. The rolling horizon method is commonly used for the rescheduling problem, which can divide the timeline into several parts [13]. In this research, different types of dynamic events occur at different times, so at each time when a dynamic event occurs, namely the rescheduling time, all the operations of each sub-lot need to be analyzed and judged based on the rolling horizon theory.
After a dynamic event occurs, all operations of each sub-lot will be divided into different state sets based on their processing status. State set 1 includes the processed operations and the ones that have been started on the non-faulty processing units. State set 2 includes the unprocessed operations. The operation being processed on the faulty processing unit or machines belongs to State set 3, which can be processed continuously after the faulty processing unit is restored. For the urgently inserted order, all the operations of the chips in the order should be added to the State set 2, which will be treated as a new chip type in rescheduling plan. For the modified original order, all the operations of the canceled chips will be canceled from the rescheduling plan. Hence, only the operations in State set 2 should be rearranged at the rescheduling time.
Here, a simple instance is given to show the rescheduling mode under three dynamic events described above, as shown in Figure 1. (j,e) represents the sub-lot e of the chip type j. At rescheduling time 1, machine 2 at the first processing stage breaks down. The operations (1,1), (1,2), (1,3) on the faulty machine, which are in the yellow box, belong to State set 3, while the operations (2,1), (4,1), (4,2) at stage 1 and the operations (2,1), (2,2), (4,1), (4,2) at stage 2 belong to State set 1. The other operations belong to State set 2. At rescheduling time 2, the emergency order is inserted and one sub-lot of chip type 3 is added, namely operation (3′,1), which is in the green box and is treated as a new type for rescheduling. At rescheduling time 3, the original order is modified and the operation (5,2) is removed, as shown in the blue box. At this time, the operation (3′,1) at stage 1, the operations (3′,1), (5,1) at stage 2, and the operations of (3,1), (3′,1), (5,1) at stage 3 belong to State set 2, which should be rescheduled.

3.3. Mathematical Model

According to the problem description of SCPPLSP and the rescheduling mode based on the rolling horizon method, the MILP model for SCPPLSP is established. Firstly, the related symbols are defined as in Abbreviations.
Then, give the MILP model for SCPPLSP:
  • Objective:
f = t C m a x = max t C 1 , t C 2 , t C 3 , , t C n
  • Subject to:
j = 1 m k b D i , j , k = 1   i J ,   k M ,   j M k
t C i , e , k t S i , e , k = t P i , k       O i , e , k S t a t e   2
t S i , e , k + 1 t C i , e , k 0   O i , e , k S t a t e   2
t S i , e + 1 , k t C i , e , k 0   O i , e , k S t a t e   2
b S i , i , k + b S i , i , k 1   O i , e , k , O i , e , k S t a t e   2
b S i , i , k + b S i , i , k b D i , j , k + b D i , j , k   O i , e , k , O i , e , k S t a t e   2
b D i , j , k + b D i , j , k 1 b S i , i , k + b S i , i , k   O i , e , k , O i , e , k S t a t e   2
t S i , 1 , k t C i , l i , k + Q × ( 3 b S i , i , k b D i , j , k b D i , j , k ) 0   O i , e , k , O i , e , k S t a t e   2
t S i , e , k = t S i , e , k   t C i , e , k = t C i , e , k   O i , e , k S t a t e   1
b D i , j , k = b D i , j , k   b S i , i , k = b S i , i , k   O i , e , k , O i , e , k S t a t e   1 S t a t e   3
t S i , e , k = t S i , e , k   t C i , e , k = t C i , e , k + t B t R   O i , e , k S t a t e   3
b D i , j , k { 0 , 1 }   b S i , i , k { 0 , 1 }   O i , e , k , O i , e , k S t a t e   2
Equation (1) states that the optimization objective of the MILP model for SCPPLSP is the makespan. Constraints (2)–(9) provide the constrained condition for SCPPLSP in rescheduling. Constraints (10) and (11) state that the rescheduling plans of the operations in State set 1 are the same as the original plans of them. Constraint (12) states that, in the rescheduling plan, the operation belonging to State set 3 will be processed on the faulty machine continuously after the faulty machine is restored. Constraint (13) provides the value ranges for the two decision variables in rescheduling, respectively.

4. Hybrid Firefly Algorithm Based on Variable Neighborhood Descent

4.1. Algorithm Framework

As described in Section 1, FA has the advantages of simple encoding, strong global search ability, flexible framework for easy improvement, and easy tuning for parameters, which is more commonly improved to solve actual complex scheduling problems in production shop. Accordingly, an improved FA framework is proposed here to solve SCPPLSP. The design concept of standard FA originates from the movement patterns of firefly in nature, where the darker individuals will move closer to the brighter ones. Inspired by the FA concept, in our improved framework, the suboptimal individuals move toward more optimal ones by designing movement operator, while the random perturbation is introduced to enhance the population diversity. To avoid local optima and strengthen global searching, the local search operation based on VND is adopted in above algorithm framework. The algorithm flow of HFA-VND is shown in Algorithm 1:
Algorithm 1 The algorithm flow of HFA-VND
  • Set the population size ps and the maximum number of iterations for VND maxtsIter;
  • Population initialization: Generate initial population containing ps individuals;
  • Individuals movement: In stage β, compare all the individuals pairwise and make suboptimal individuals move toward more optimal ones, while in stage α, the random perturbations are used to avoid premature entry into local optima;
  • Local search: Select several optimal individuals to conduct the local search operation to ensure sufficient mining in their neighborhood;
  • Go to step 6 if the termination condition is met; go to step 3 otherwise;
  • Output the results.

4.2. Individual Description

As described in Section 3.1, in the SCPPLSP, all sub-lots can only be processed by one processing unit, and all the chips have the same processing sequence. Therefore, we adopt an encoding mechanism based on the sequence of chip types, which represents the processing order of chip types in the initial stage and has been effectively used for solving HFSP. The encoding sequence can be represented as: {E(1), E(2), …, E(n)}, where E(i) is the index of the chip type.
According to the problem characteristics of SCPPLSP and the above encoding structure, it is required that the decoding mechanism should solve the following two sub-problems: one is the sequence of chip types at other processing stages, and the other is the machine selection for different chip types at each stage. In order to shorten the waiting times of chips and the idle times of machines, two heuristic rules are adopted as below:
  • The “first come, first processed for sub-lot” rule: a certain sub-lot of a certain chip type that has been processed at a certain stage does not need to wait for the other subsequent sub-lots of this chip type, and can directly start to be processed at the subsequent stage;
  • The “first idle machine, first processing” rule: the sub-lot that needs to be processed should be assigned on the first idle machine at this stage at this time.
Based on the above analysis, the decoding mechanism can be described in Algorithm 2:
Algorithm 2 The algorithm flow of the decoding mechanism
1.
All the operations of all the sub-lots should be divided into three state sets based on the rolling horizon technology;
2.
Find the earliest processing stage s’ (1 ≤ s’ ≤ m) among all the operations in State set 2;
3.
Record the number nk (k∈{s’, s’ + 1…, m}) of the chip types belonging to State set 2 at each stage;
4.
Sort the chip types belonging to State set 2 at the stage s’ based on the encoding sequence;
5.
For i in {1,2,…, ns’} do
6.        
Select the first idle machine, and process all the sub-lots of the chip type i sequentially on this machine;
7.        
Calculate the processing times of these sub-lots, and use the completion time of the last sub-lot to update the machine idle time;
8.
End
9.
For k in {s’ + 1…, m } do
10.      
Sort the chip types belonging to State set 2 at the stage k according to the ascending order of completion time of the first sub-lot of each type;
11.      
For i in {1,2,…, nk} do
12.              
Select the first idle machine, and process all the sub-lots of chip type i sequentially on this machine;
13.              
Calculate the processing times of these sub-lots, and use the completion time of the last sub-lot to update the machine idle time;
14.      
End
15.
End

4.3. Population Initialization

To ensure the diversity and superiority of initial individuals, a hybrid initialization strategy based on the integrating random rule and NEH rule is proposed here to generate the initial population. To avoid the long waiting time, two heuristic rules are adopted, respectively, in the NEH rule, namely the longest processing time rule (LPT) and the longest processing time at the first stage rule (LPTF). The hybrid initialization strategy can be described in Algorithm 3:
Algorithm 3 The algorithm flow of the hybrid initialization strategy
  • Randomly generate ps-2 individuals;
  • Generate an individual according to the NEH rule based on LPT:
    • Calculate the total processing times of all chip types, and sort the chip types based on their descending sequence;
    • Successively take out the chip types from the above sequence and insert them into all available positions in order to obtain the optimal subsequence;
    • Proceed until the last chip type is inserted into a suitable position, and the optimal individuals are obtained;
  • Generate an individual according to the NEH rule based on LPTF:
    • Calculate the processing times of all chip types at the first stage, and sort the chip types based on their descending sequence;
    • Successively take out the chip types from the above sequence and insert them into all available positions in order to obtain the optimal subsequence;
    • Proceed until the last chip type is inserted into a suitable position, and the optimal individuals are obtained;
  • The above ps individuals are used to form the initial population.

4.4. Individual Movement

According to the design thought of standard FA, the individual movement process includes two stages: in the stage β, the suboptimal individuals move closer to more optimal ones, and in the stage α, the individual is randomly modified to avoid local optima. As described in Section 4.1, the improved FA framework proposed in the paper is designed inspired by the core idea of the standard FA. As an improvement, we do not use the firefly position update equation of standard FA to achieve individual movement. Instead, according to the characteristics of the addressed SCPPLSP and the encoding structure described in Section 4.2, in the stage β of the improved algorithm framework, a position-based crossover (PBX) operator is used to realize the individual movement. As shown in Figure 2, by using the PBX operator for two individuals, the new individual will inherit the excellent genetic fragments from the better individual, which achieves the movement of the suboptimal individual towards the better one. Then, in stage α of the improved algorithm framework, the random perturbation based on swap operator and insertion operator is applied for avoiding local optima, as shown in Figure 3 and Figure 4. In this research, only one operator is selected for random variation for each individual, and here the probability of both above operators being selected is 50%.

4.5. Local Search

To avoid local optima and sufficiently explore the neighborhood of the optimal individuals, the VND strategy is adopted and introduced to the improved FA framework. The design concept of VND can be described as follows: if the more optimal individual cannot be mined from the current neighborhood after a certain number of iterations, the next neighborhood will be selected for local search, while if the more optimal individual is mined, the search operation will turn back to the first neighborhood. The neighborhood structures selected for VND in this work are the swap operator and insertion operator described in Section 4.4. The pseudocode of the VND is shown in Algorithm 4:
Algorithm 4 The algorithm flow of VND
  • r = 1, iter = 0;
  • While (isStop == False)
  •         X’ = Nr(X);
  •         If f(X’) < f(X)
  •                 X’i = Xi, r = 1, iter = 0;
  •         Else
  •                 iter++;
  •         End
  •         If iter > maxtsIter
  •                 If r < 2
  •                         r++, iter = 0;
  •                 Else
  •                         r = 1, iter = 0, isStop = true;
  •                 End
  •         End
  • End

5. Experimental Study

5.1. Experimental Design

There has been no benchmark for the addressed SCPPLSP at present, so we selected the test instances randomly generated to evaluate the algorithm performance, which is widely applied for the complex scheduling problem. To simulate the actual processing environment in the semiconductor chip packaging production line, 5 different scales of numbers of the chip types and 2 different scales of numbers of the processing stages are selected to form the test instances of 10 scales. In total, 10 specific test instances are randomly generated for each scale, so a total of 100 test instances are obtained. The occurrence times of these three dynamic events are also randomly valued in the integer interval [1, 99], and the duration of machine breakdown is randomly chosen in the integer interval [20, 99]. The other parameters of these instances are listed in Table 1.
All the algorithms for comparison tests are realized by Visual C++ language in Visual Studio 2015 on a computer with AMD Ryzen 7 5800H CPU at 3.20 GHz and 16G RAM. The test study in this section will use the best Cmax and the relative percentage increase (RPI) obtained from different algorithms as the references to verify the superiority of HFA-VND. The RPI for the algorithm X is formulated as:
R P I ( X ) = ( t C X b e s t t C b e s t ) / t C b e s t × 100 %
where CX-best and Cbest are the best solutions, respectively, obtained from the algorithm X and all the algorithms. In order to respond promptly to dynamic events with minimal impact on production efficiency, the algorithm execution time limit is set as the algorithm termination condition. Here, the maximum execution time is designed as 10 × m × n (ms), which can ensure that the production plans will be adjusted within tens of seconds after the dynamic events occur and meet the production demands for SCPPLSP in actual working conditions.

5.2. Algorithm Comparison

To test the performance of HFA-VND, this section introduces the existing advanced algorithms for comparative testing. The introduced algorithms are GA [37], genetic algorithm and tabu search (GATS) [55], genetic algorithm and variable neighborhood search (GAVNS) [56] and MBO [32], which are widely applied for the complex scheduling problem and achieve excellent results.
The population size ps and the maximum number of iterations for VND maxtsIter are selected through Taguchi experimental testing, which is specially used for the parameter selection and calibration in the field of scheduling optimization. The test results are shown in Figure 5. Seen from Figure 5, population size ps and the maximum number of iterations maxtsIter are set as 6 and 9, respectively. In GA, GATS and GAVNS, the algorithm termination times are set as the same as HFA-VND. The other parameters of them are also chosen after Taguchi experimental testing. The parameters in MBO are set according to the references [32].
The 100 test instances generated according to Section 5.1 are used for comparative testing. Under each instance, every algorithm need to be tested 10 times. Then, the best Cmax and the averages of RPI obtained from each algorithm under each test instance are recorded in Table 2. The statistical information (the numbers of best Cmax or RPI, the averages of RPI and the variance of RPI) of test results for each algorithm is recorded at the bottom of Table 2. The boxplot for the averages of RPI obtained from different algorithms under each instance is shown in Figure 6.
In the Table 2, the bolded parts represent the best results obtained from these different algorithms under the corresponding instances. The comparison test results and the statistical information for different algorithms in Table 2 show that HFA-VND can achieve 97 best Cmax and 98 best averages of RPI from the 100 instances. On the contrary, MBO, GATS, GAVNS, and GA cannot achieve the best results under dozens of instances. Moreover, the averages of RPI for each instance obtained from the other algorithms are inferior to those solved from HFA-VND. Through the further analysis for the test results in Table 2, GATS and MBO, which are often designed for complex scheduling problems, are superior to the common optimization algorithms (GAVNS and GA), and the hybrid algorithms (MBO, GATS, and GAVNS) are superior to the single algorithm (GA). Seen from the boxplot shown in Figure 6, the test results obtained from HFA-VND have more concentrated data distribution and fewer outliers. Therefore, it can be proved that HFA-VND proposed in this work is effective and stable for solving SCPPLSP under the multiple dynamic events and is superior to the current advanced optimization algorithms in the field of workshop scheduling.

5.3. Case Study

In this section, the actual processing parameters and order data from a typical semiconductor chip packaging enterprise are used for a case test. In this enterprise, the semiconductor chip packaging production line contains 7 main processing stages, namely the grinding and slicing, attaching, wire bonding, molding, curing and plating, Trim/Form and marking, and testing, as shown in Figure 7. In the packaging production line, various types of wafers are packaged to various types of semiconductor chips. In the production workshop of the enterprise, each processing stage contains several packaging equipment or processing units.
Here, we use an actual order of this enterprise, which includes 60 types of chips, for a case test. In the test, the three types of dynamic events are simulated to occur randomly during the processing. To verify the effectiveness and superiority of the proposed method, MBO, GATS, GAVNS, and GA are introduced again for comparative testing. Moreover, the scheduling rules LPT and LPTF, which are currently being used by the enterprise, are also added to the comparative testing. The algorithm settings are the same as those in Section 5.2. The comparison test results are recorded in Table 3, and the bolded part represents the best result obtained from these different algorithms under the case test. The test results of actual case in Table 3 show that the HFA-VND can achieve the best scheduling result. As the same as Section 5.2, MBO is also superior to the other algorithm for actual case, and hybrid algorithms also perform better than the single algorithm. Comparing the scheduling rules LPT and LPTF, intelligent optimization algorithm can obtain the more optimal results. It can be seen that the makespan obtained from the HFA-VND can decrease by about 7% compared to LPT and LPTF. The case tests show the HFA-VND is effective for the SCPPLSP in the actual environment and can improve the production efficiency for semiconductor chips’ packaging enterprise.

6. Conclusions

This paper proposed an HFA-VND to solve the SCPPLSP under multiple dynamic events. Firstly, the SCPPLSP is described in detail. After analysis on the three types of dynamic events, namely machine breakdown, emergency order inserting, and original order modification, the rescheduling mode based on rolling horizon technology is adopted. Based on the problem characteristics, the MILP model for SCPPLSP is established. Then, inspired by the design idea of standard FA, an improved FA framework is constructed. In order to efficiently describe the individuals, an encoding mechanism based on the sequence of chip types is used. Correspondingly, to save on the waiting times of sub-lots and the idle times of machines, the decoding mechanism based on two heuristic rules is presented to obtain the rescheduling plan. To ensure the diversity and superiority of the initial individuals, the random individuals and the NEH rule based on LPT and LPTF are applied to generating the initial population. In the process of population evolution, the individual movement strategy based on PBX improves the solutions quality, and the random perturbation based on the swap operator and insertion operator is introduced to enhance search capability. The local search mechanism based on VND for the optimal individuals ensures the sufficient exploration in their neighborhood. At last, the comparative test results under the 100 instances generated randomly show that the HFA-VND is effective for SCPPLSP and is superior to the current advanced algorithms, namely MBO, GATS, GAVNS, and GA. Additionally, a case test from semiconductor chips’ precision packaging enterprise verified that the HFA-VND is effective for the actual production, and can accelerate the production efficiency for the enterprise.
In future studies, more types of dynamic events will be introduced, such as fuzzy processing time, lack of raw materials, periodic preventive maintenance, and so on. In addition, more optimization objectives will be involved, like energy consumption, utilization rate of equipment, production cost and tardiness. Additionally, the further improvement of the optimization algorithms will still be one of the important research directions.

Author Contributions

Z.W.: conceptualization, methodology, formal analysis, writing—original draft preparation, writing—review and editing, visualization, supervision, project administration, funding acquisition. W.F.: investigation, resources, data curation. Y.Y.: software, validation. All authors have read and agreed to the published version of the manuscript.

Funding

The study is supported by the National Natural Science Foundation of China under Grant number 52205522.

Data Availability Statement

The data that support the findings of this study are available from the corresponding author, upon reasonable request.

Conflicts of Interest

The authors declare that they have no competing interests.

Abbreviations

Parameters:
mnumber of the processing stages
nnumber of the chip types
kindex of processing stage, k∈{1,2,…,m}
iindex of chip type, i∈{1,2,…,n}
jindex of processing unit
eindex of sub-lot
Mset of all processing stages
Jset of all chip types
Mkset of all processing units at processing stage k
mknumber of the processing units at processing stage k
linumber of sub-lots for chip type i
tPi,kprocessing time of sub-lot for chip type i at processing stage k
tSi,e,kstarting time of sub-lot e for the chip type i at processing stage k
tCi,e,kcompletion time of sub-lot e for chip type i at processing stage k
tCicompletion time for chip type i at processing stage m
tBthe time when the processing unit breaks down
tRthe time when the faulty processing unit is restored
Oi,e,koperation of sub-lot e for chip type i at processing stage k
State 1State set 1
State 2State set 2
State 3State set 3
bDi,j,k1 if chip type i is on machine j at processing stage k, 0 otherwise
bSi,i’,k1 if chip type i is superior to type i’ on same machine at stage k, 0 otherwise
Qa sufficiently large positive integer
Decision variables:
tS’i,e,kstarting time of sub-lot e for chip type i at processing stage k in rescheduling
tC’i,e,kcompletion time of sub-lot e for chip type i at processing stage k in rescheduling
bD’i,j,k1 if chip type i is on machine j at processing stage k in rescheduling, 0 otherwise
bS’i,i’,k1 if chip type i is superior to type i’ on same machine at stage k, 0 otherwise

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Figure 1. The rescheduling mode.
Figure 1. The rescheduling mode.
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Figure 2. The individual movement strategy based on PBX.
Figure 2. The individual movement strategy based on PBX.
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Figure 3. The random perturbation operators: swap operator.
Figure 3. The random perturbation operators: swap operator.
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Figure 4. The random perturbation operators: insertion operator.
Figure 4. The random perturbation operators: insertion operator.
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Figure 5. Taguchi test results for HFA-VND.
Figure 5. Taguchi test results for HFA-VND.
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Figure 6. The boxplot for the averages of RPI obtained from different algorithms under each instance.
Figure 6. The boxplot for the averages of RPI obtained from different algorithms under each instance.
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Figure 7. The semiconductor chip packaging processing flow.
Figure 7. The semiconductor chip packaging processing flow.
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Table 1. The instances parameters.
Table 1. The instances parameters.
ParametersValues
n{20, 40, 60, 80, 100}
s{5, 10}
mkinteger in [5, 10]
tPi,kinteger in [10, 20]
liinteger in [5, 10]
Table 2. The comparison experimental results.
Table 2. The comparison experimental results.
Instance
m × n
HFA-VNDMBOGATSGAVNSGA
CmaxRPI (%)CmaxRPI (%)CmaxRPI (%)CmaxRPI (%)CmaxRPI (%)
20 × 54800.18754800.81254800.45834841.45834861.9792
5170.00005170.34825170.01935181.16055212.0309
4770.00004770.06294770.00004770.08394770.3145
3210.00003210.77883210.00003222.27413294.1745
4760.00004760.23114760.00004760.52524812.0588
7100.00007100.08457100.00007100.04237100.0423
8540.00008540.00008540.00008540.02348540.0585
5430.00005430.00005430.00005430.03685430.1105
3720.00003720.69893720.00003720.48393751.3172
9360.00009360.00009360.00009360.01079360.0214
20 × 1010290.000010290.000010290.000010290.000010290.0000
8480.00008480.15338480.00008480.08258480.0708
7720.00007720.19437720.00007720.20737720.5829
11040.000011040.000011040.000011040.000011040.5072
9660.40379730.96279680.59019721.90489743.4990
5190.00005190.00005190.00005190.30835191.0405
11010.000011010.181711010.009111010.862911012.6431
9270.00009270.06479270.00009270.18349270.7443
9840.00009840.06109840.00009840.08139840.2642
6620.00006620.64956620.15116682.56806935.7100
40 × 55031.17305061.74955081.72965175.64615398.8469
9300.11849300.24769290.18309402.90649635.6189
13790.000013790.000013790.000013790.000013790.1015
16670.000016670.000016670.000016670.000016670.0000
9440.01069440.92169440.23319481.26069542.3093
6090.00006090.00006090.00006090.08216090.3777
6010.00006020.48256010.21636040.83196081.5973
7710.14277710.44107720.38917761.80297863.7354
6940.10096950.64846940.18737022.14707063.1844
8000.00008000.00008000.00008000.22508010.9250
40 × 1014010.000014010.000014010.000014010.563914011.7987
15410.000015410.136315410.045415410.214115440.3504
14730.000014730.081514730.095014730.353014780.5635
17880.000017880.022417880.000017880.581717942.0246
14420.000014420.062414420.000014420.152614470.9015
16450.024316450.273616450.121616470.340416500.5410
11800.127111810.169511820.169511902.322012114.5763
14390.000014390.000014390.000014390.222414390.7088
16660.120016660.474216660.222116812.322917325.0360
13650.000013650.146513650.029313650.161213650.4762
60 × 524490.000024490.081724490.000024490.000024490.0204
9870.01019880.21289870.16219870.65869961.7021
21980.000021980.000021980.004521980.136521980.1683
18050.000018050.000018050.000018050.000018050.0000
22660.000022660.000022660.000022660.172122660.1765
20560.000020560.000020560.000020560.004920560.0632
12930.000012930.023212930.000012930.232012930.1469
19330.000019330.000019330.005219330.300119330.4190
20640.000020640.000020640.000020640.058120640.4457
20930.000020930.009620930.000020930.033420930.0956
60 × 1025480.007825480.113825500.219825560.902725691.4717
23120.008723120.017323120.021623120.112523140.1557
24930.000024930.000024930.000024930.000024930.0000
13181.068713100.877913231.763413544.694713907.7481
22940.000022940.135122940.218023122.532723724.5205
23030.004323030.026123030.026123030.803323031.3200
22750.013222750.000022750.202222861.002222961.4374
28070.000028070.014328070.000028070.160328070.1176
20910.000020910.000020910.000020910.019120910.0670
23140.000023140.000023140.000023140.432223160.6698
80 × 530320.000030320.000030320.000030320.168230320.1748
27430.000027430.029227430.014627430.156827460.1969
29630.000029630.000029630.000029630.054029630.2565
10280.330710300.554510310.671210381.858010452.9961
14660.020514660.129614660.150114670.750314720.9891
29530.000029530.000029530.000029530.000029530.0847
30490.000030490.000030490.000030490.065630490.0918
10290.106910310.485910290.583110351.438310362.3032
29330.000029330.000029330.000029330.003429330.0136
34110.000034110.000034110.000034110.096734110.0850
80 × 1033300.021033300.063133300.030033360.417433400.7838
30010.000030010.023330010.013330090.669830311.6028
30930.000030930.475330930.000030930.184330940.6790
32540.000032540.000032540.027732540.353432630.6669
33350.000033350.009033350.030033350.560733390.8126
33900.000033900.000033900.000033900.191733900.5575
32200.000032200.000032200.000032200.214332210.2640
33180.000033180.006033180.000033200.364733210.7022
37200.000037200.026937200.005437220.212437230.4086
32350.000032350.000032350.000032350.058732350.1731
100 × 515290.013115290.215815290.150415350.719415401.1969
36460.000036460.000036460.000036460.043936460.1015
44940.000044940.000044940.000044940.049044950.1313
38260.000038260.000038260.000038260.026138260.0497
12690.070912700.197012710.520112721.899112892.6084
39060.000039060.000039060.041039060.020539060.2125
19200.041719200.182319210.156319220.447919250.6510
37440.002737440.005337440.037437470.240437510.4006
34530.000034530.017434530.000034530.020334530.4721
8510.92208461.34758561.93858764.75188897.1040
100 × 1040170.014940170.079740170.069740371.045640812.3973
41570.016841570.043341570.120341811.284642513.2090
38540.013038540.134938550.220638660.422938750.9471
36870.000036870.043436870.010836870.661837041.6273
39310.000039310.015339310.000039310.310439421.0150
34570.000034570.057934570.028934570.448434730.8360
36710.005436710.008236710.117136830.580236891.0488
40800.012340800.036840800.073540800.164240850.4240
39300.000039300.000039300.000039300.379139330.5649
43180.090343200.106543200.166743260.690143461.6350
Numbers of best Cmax or RPI979889388851668444
Averages of RPI0.00050.00170.00130.00690.0132
Variances of RPI0.0000040.0000090.0000110.0001060.000307
Table 3. The comparison test results for actual case.
Table 3. The comparison test results for actual case.
HFA-VNDMBOGATSGAVNSGALPTLPTF
Cmax (min)Cmax (min)Cmax (min)Cmax (min)Cmax (min)Cmax (min)Cmax (min)
1513152415361538157416111618
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Wang, Z.; Fang, W.; Yang, Y. An Effective Hybrid Rescheduling Method for Wafer Chip Precision Packaging Workshops in Complex Manufacturing Environments. Micromachines 2025, 16, 1403. https://doi.org/10.3390/mi16121403

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Wang Z, Fang W, Yang Y. An Effective Hybrid Rescheduling Method for Wafer Chip Precision Packaging Workshops in Complex Manufacturing Environments. Micromachines. 2025; 16(12):1403. https://doi.org/10.3390/mi16121403

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Wang, Ziyue, Weikang Fang, and Yichen Yang. 2025. "An Effective Hybrid Rescheduling Method for Wafer Chip Precision Packaging Workshops in Complex Manufacturing Environments" Micromachines 16, no. 12: 1403. https://doi.org/10.3390/mi16121403

APA Style

Wang, Z., Fang, W., & Yang, Y. (2025). An Effective Hybrid Rescheduling Method for Wafer Chip Precision Packaging Workshops in Complex Manufacturing Environments. Micromachines, 16(12), 1403. https://doi.org/10.3390/mi16121403

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