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High On-Current Ge-Channel Heterojunction Tunnel Field-Effect Transistor Using Direct Band-to-Band Tunneling
Open AccessArticle

Design Optimization of Double-Gate Isosceles Trapezoid Tunnel Field-Effect Transistor (DGIT-TFET)

Department of Electrical and Computer Engineering, Ajou University, Suwon 16499, Korea
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Author to whom correspondence should be addressed.
Micromachines 2019, 10(4), 229; https://doi.org/10.3390/mi10040229
Received: 19 February 2019 / Revised: 24 March 2019 / Accepted: 28 March 2019 / Published: 30 March 2019
(This article belongs to the Special Issue Extremely-Low-Power Devices and Their Applications)
Recently, tunnel field-effect transistors (TFETs) have been regarded as next-generation ultra-low-power semi-conductor devices. To commercialize the TFETs, however, it is necessary to improve an on-state current caused by tunnel-junction resistance and to suppress a leakage current from ambipolar current (IAMB). In this paper, we suggest a novel TFET which features double gate, vertical, and trapezoid isosceles channel structure to solve the above-mentioned technical issues. The device design is optimized by examining its electrical characteristics with the help of technology computer-aided design (TCAD) simulation. As a result, double-gate isosceles trapezoid (DGIT) TFET shows a much better performance than the conventional TFET in terms of ON-state current (ION), IAMB, and gate-to-drain capacitance (CGD). It is confirmed that an inverter composed of DGIT-TFETs can operate with less than 1 ns intrinsic delay time and negligible voltage overshoot. View Full-Text
Keywords: tunnel field-effect transistors (TFETs); ambipolar current; scaling; subthreshold swing; FinFET tunnel field-effect transistors (TFETs); ambipolar current; scaling; subthreshold swing; FinFET
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Gu, H.Y.; Kim, S. Design Optimization of Double-Gate Isosceles Trapezoid Tunnel Field-Effect Transistor (DGIT-TFET). Micromachines 2019, 10, 229.

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