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Volume 14
Issue 19
10.3390/ma14195682
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Article

Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate

by
Yves Mols
1,*,
Abhitosh Vais
1,
Sachin Yadav
1,
Liesbeth Witters
1,
Komal Vondkar
1,
Reynald Alcotte
1,
Marina Baryshnikova
1,
Guillaume Boccardi
1,
Niamh Waldron
1,
Bertrand Parvais
1,2,
Nadine Collaert
1,
Robert Langer
1 and
Bernardette Kunert
1
1
Advanced RF Group, IMEC, 3001 Leuven, Belgium
2
Department of Electronics and Informatics–ETRO, Vrije Universiteit Brussels, 1050 Brussels, Belgium
*
Author to whom correspondence should be addressed.
Materials 2021, 14(19), 5682; https://doi.org/10.3390/ma14195682
Submission received: 9 August 2021 / Revised: 10 September 2021 / Accepted: 22 September 2021 / Published: 29 September 2021
(This article belongs to the Special Issue Emerging Technologies in Nanodevices and Energy Generation Applications)
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Abstract

Nano-ridge engineering (NRE) is a novel method to monolithically integrate III–V devices on a 300 mm Si platform. In this work, NRE is applied to InGaP/GaAs heterojunction bipolar transistors (HBTs), enabling hybrid III-V/CMOS technology for RF applications. The NRE HBT stacks were grown by metal-organic vapor-phase epitaxy on 300 mm Si (001) wafers with a double trench-patterned oxide template, in an industrial deposition chamber. Aspect ratio trapping in the narrow bottom part of a trench results in a threading dislocation density below 106∙cm−2 in the device layers in the wide upper part of that trench. NRE is used to create larger area NRs with a flat (001) surface, suitable for HBT device fabrication. Transmission electron microscopy inspection of the HBT stacks revealed restricted twin formation after the InGaP emitter layer contacts the oxide sidewall. Several structures, with varying InGaP growth conditions, were made, to further study this phenomenon. HBT devices—consisting of several nano-ridges in parallel—were processed for DC and RF characterization. A maximum DC gain of 112 was obtained and a cut-off frequency ft of ~17 GHz was achieved. These results show the potential of NRE III–V devices for hybrid III–V/CMOS technology for emerging RF applications.
Keywords: nano-ridge engineering (NRE); III–V on Si; MOVPE; hetero-epitaxy; HBT nano-ridge engineering (NRE); III–V on Si; MOVPE; hetero-epitaxy; HBT

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MDPI and ACS Style

Mols, Y.; Vais, A.; Yadav, S.; Witters, L.; Vondkar, K.; Alcotte, R.; Baryshnikova, M.; Boccardi, G.; Waldron, N.; Parvais, B.; et al. Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate. Materials 2021, 14, 5682. https://doi.org/10.3390/ma14195682

AMA Style

Mols Y, Vais A, Yadav S, Witters L, Vondkar K, Alcotte R, Baryshnikova M, Boccardi G, Waldron N, Parvais B, et al. Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate. Materials. 2021; 14(19):5682. https://doi.org/10.3390/ma14195682

Chicago/Turabian Style

Mols, Yves, Abhitosh Vais, Sachin Yadav, Liesbeth Witters, Komal Vondkar, Reynald Alcotte, Marina Baryshnikova, Guillaume Boccardi, Niamh Waldron, Bertrand Parvais, and et al. 2021. "Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate" Materials 14, no. 19: 5682. https://doi.org/10.3390/ma14195682

APA Style

Mols, Y., Vais, A., Yadav, S., Witters, L., Vondkar, K., Alcotte, R., Baryshnikova, M., Boccardi, G., Waldron, N., Parvais, B., Collaert, N., Langer, R., & Kunert, B. (2021). Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate. Materials, 14(19), 5682. https://doi.org/10.3390/ma14195682

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