Modified Forward Converter for Charging and Balancing Supercapacitor Modules

Abstract

Supercapacitor modules for energy storage systems often require complex active balancing circuits to manage voltage imbalances between series-connected cells. This paper proposes a modified forward converter topology that passively charges and balances supercapacitor modules simultaneously. The proposed solution is modular, provides galvanic isolation, and is self-regulating, eliminating the need for dedicated sensors or complex control logic. Voltage equalization is achieved autonomously through coupled inductors, naturally directing current to the cells with the lowest voltage during the period when the converter is off. This work details the operating principle of the converter and analyzes two architectures: a non-crossover configuration and a crossover configuration. This study validated the system performance through PSIM simulations and a hardware prototype. The experimental results demonstrate that both configurations successfully charge and balance the supercapacitors. However, the crossover and non-crossover configurations achieve faster equalization under certain imbalance conditions. In contrast, the crossed configuration exhibits a smaller final voltage discrepancy between cells compared to the non-crossover architecture. The proposed converter proves to be a simple, robust, and effective solution for managing supercapacitor modules.

1. Introduction

Supercapacitors have high power density, a high number of cycles, and a long service life, which has led to their widespread use in electric vehicle propulsion and hybrid energy storage systems (HESS) [1]. In HESS, supercapacitors operate in parallel with other storage devices such as batteries and fuel cells, which have a higher energy density but lower power density.

Supercapacitors operate at low voltages of approximately 2.7 V, requiring the series connection of several units in many applications. The voltages, temperatures, and RMS current values to which supercapacitors are subjected to accelerated degradation over time, altering their characteristics [2]. In addition, there are variations intrinsic to the manufacturing process that cause changes in the capacitance, internal impedance, and leakage current of these components [3]. Therefore, the use of supercapacitors connected in series requires care to avoid voltage imbalances due to parametric variations in the components, since the load current, in most circuits, simultaneously supplies the entire module of supercapacitors in series [4].

One way to achieve charge balancing in supercapacitor modules is through a dissipative circuit with a resistor and a switch for each supercapacitor, with the switch controlled by a voltage monitoring device. Thus, the resistor in parallel with each storage element is connected when the voltage across that element exceeds previously established limits [5]. However, ohmic losses in the resistors compromise the efficiency of this equalization system.

To circumvent energy dissipation, some circuits place capacitors in series-parallel with supercapacitors, allowing the redistribution of energy among the storage elements [6,7]. There are several topological variations using capacitor switching [5,8]. These circuits have the advantage of not requiring magnetic elements. Among the challenges of this technique is the low impedance between the capacitors, which allows for high currents in the equalization circuit, requiring excellent switch characteristics to prevent compromising the topology with losses.

Several DC–DC converter topologies enable the equalization of supercapacitors, such as Buck-Boost, which transfers energy between adjacent cells. However, it presents the challenge of high circuit complexity due to the large number of sensors, inductors, and switches [9,10]. Flyback converters simplify control and reduce the number of switches by using coupled inductors to transfer energy from one supercapacitor to another or to the entire module. However, they still require voltage sensing to operate only when there is an imbalance [8,11]. Another approach is the use of multi-winding transformers, which allow energy transfer between supercapacitors through their secondaries, but require intermediate energy accumulation stages to avoid directly connecting voltage sources to the transformer terminals [5,12].

There are dedicated equalization techniques that operate independently of charging, focusing on circuits exclusively dedicated to equalization. These techniques explore various topologies and control strategies. A complex digital control system has been proposed to identify cells with voltage deviations and manage the energy transfer from the higher-voltage cell to the module, thereby achieving equalization of supercapacitors [13,14]. A typical topology employed for equalization is the bidirectional flyback converter, which can transfer energy directly between cells or between a cell and the module [15,16]. The interconnection of coupled inductors from different modules enables balancing between them without the need for additional components, representing a modularization method for extensive modules [17,18]. Bridge topologies with CLLC resonant circuits are utilized in conjunction with auxiliary windings to simplify the balancing circuits [19,20].

The converter that charges the supercapacitors can also perform the equalization. In the Zeta converter, the inductor is employed as the transformer primary winding, with the secondary windings performing balancing through a voltage multiplier integrated into the converter [21]. There are control strategies that manage power through bidirectional converters, such as buck-boost and dual active bridge (DAB), which achieve equalization during charging [22,23]. A more straightforward technique is to use a coupled inductor from a mixed buck–flyback converter to perform equalization automatically and easily during charging [24].

Papers combining chargers and equalizers integrate these functions through more complex architectures with active control. However, by modifying a forward converter, this work eliminates the need for a dedicated and complex balancing system while maintaining the supercapacitor charging function. Furthermore, because the proposed topology is isolated, the system can charge and equalize multiple supercapacitor modules in a modular configuration, simpler and safer than the non-isolated buck–flyback topology [24].

Table 1. Comparison of charging and voltage balancing techniques for supercapacitor-based energy storage systems.

Reference	Topology/Architecture	Galvanic Isolation	Balancing Integrated with Charging	Key Characteristics and Limitations
[24]	Coupled Buck–Flyback converter	No	Yes	Simple and low-cost solution with passive equalization through coupled inductors; limited scalability and unsuitable for high-voltage applications due to lack of isolation.
[21]	Zeta converter with multi-winding transformer	Partial	Yes	Integrated charging and balancing utilize ripple-based energy redistribution; however, the hybrid structure increases circuit complexity and dependence on operating conditions.
[17]	Coupled-inductor matrix-based equalizer	No	No	Fast active equalization using a matrix configuration requires a dedicated balancing circuit separate from the charger.
[19]	Multi-winding transformer with self-driven switches	Partial	No	Automatic active balancing without sensors or drivers; additional hardware is required exclusively for equalization.
[23]	Modular bidirectional DC–DC converters	Optional	No	Highly flexible modular architecture with active power-sharing control, featuring a high number of components and control complexity.
[22]	DAB converter with interleaved DC–DC stage	Yes	No	Suitable for high-power modular ESS; voltage balancing emerges from control strategy rather than intrinsic converter operation.
[16]	Isolated bidirectional flyback with MPC	Yes	No	High-performance balancing based on state-of-energy optimization requires advanced control and significant computational resources.
[20]	CLLC converter with reconfigurable switch banks	Yes	No	High-speed and flexible balancing under multiple scenarios; high hardware count and complex control logic.
This Paper	Modified forward converter with coupled inductors	Yes	Yes	Automatic, passive, and non-dissipative voltage equalization intrinsically achieved during charging; no sensors or dedicated balancing control required, with high modularity and robustness.

compares the main charging and balancing approaches reported in the literature.

Most proposed solutions rely on dedicated active balancing circuits or complex control strategies. In contrast, the proposed modified forward converter achieves automatic and non-dissipative voltage equalization intrinsically, without additional sensors or balancing controllers, while preserving galvanic isolation and modularity.

Unlike approaches based on complex bidirectional converters, advanced control, or dedicated equalizers, the modified Forward converter proposed represents a natural evolution of the loader-integrated equalization line. By exploiting the physics of the converter and the coupled inductors themselves, the solution achieves automatic, non-dissipative, and inherently stable equalization without the need for additional sensors or logic.

Compared to the previously reported Buck–Flyback [24], the proposed topology adds galvanic isolation and modularity, significantly expanding the application domain. When contrasted with more complex architectures in the literature, the proposal stands out for offering a lower-cost, more robust, and highly scalable solution, making it particularly suitable for medium-power energy storage systems.

Table 2. Qualitative comparison of the proposed approach with commonly used voltage balancing techniques.

Factor	Assessment of Proposed Approach	Comparison with the State of the Art
Components	Low to medium. Balancing sensors and dedicated balancing drivers are eliminated.	Simpler than active approaches (e.g., DAB- or CLLC-based solutions), but requires more magnetic cores than the Buck–Flyback solution reported by Ryndack et al. [24]
Efficiency	Moderate. Passive losses are mainly associated with diode conduction.	Lower than solutions employing active synchronous rectification, but more robust and without the standby power consumption associated with balancing control circuitry.
Balancing dynamics	Improved. The cross-connected configuration accelerates the balancing process.	Faster than conventional passive balancing techniques, but slower than fully active methods with dedicated current control.
Scalability	Excellent. Modular structure with galvanic isolation.	Superior to non-isolated topologies for high-voltage applications and safety-critical systems.
Practical limitation	Dependence on duty cycle.	Voltage equalization occurs only during the switch-off time. When $V_{\mathrm{in}}\approx V_{\mathrm{out}}$ (high duty cycle), the available balancing interval is reduced.

This qualitative comparison highlights the practical trade-offs between simplicity, efficiency, balancing speed, and scalability.

provides a qualitative comparison between the proposed approach and commonly used voltage balancing techniques, addressing component count, expected efficiency, balancing dynamics, scalability, and practical limitations.

This paper does not aim to surpass active approaches in terms of absolute balancing accuracy but rather to consistently occupy an optimum point between simplicity, performance, and robustness. The proposal builds upon the concept introduced by [24] by incorporating galvanic isolation and a modular architecture, thereby significantly expanding the application domain. Compared to contemporary passive solutions, such as those presented in [17,21], the introduction of the cross-topology represents a significant advance, as it accelerates the equalization dynamics without necessitating a substantial increase in complexity. Unlike works based on active converters with advanced digital control, such as those of [16,20], this study does not aim to explore converter control strategies, as the analysis focuses exclusively on the constant current (CC) stage of supercapacitor charging, in which the intrinsic equalization mechanism manifests itself clearly and repeatably. In this way, cost, a high number of components, and sensor dependence are avoided, resulting in a contribution geared towards the design of robust, scalable, and easily implemented energy storage systems.

This work is organized as follows: In Section 2, the proposed topology is presented, in Section 3, the operation principle, then in Section 4, the analysis of the transformation ratio, in Section 5, the proposed modified forward converter is detailed, then in Section 6 are the experimental results, and, finally, in Section 7 are the conclusions.

2. Proposed Converter

The proposed topology, illustrated in Figure 1, is based on a modified forward converter designed to charge and equalize the voltage of a supercapacitor module. The converter simultaneously powers different modules using a transformer with multiple secondaries. The galvanic isolation between these secondaries allows the modules to be connected in series, enabling the formation of a module with a higher voltage.

The system architecture is modular, with each module powered by an independent secondary of the forward converter transformer. Internally, each module consists of supercapacitors in series, connected to an $L_{px}$ filter inductor. A set of coupled inductors achieves the voltage equalization between the supercapacitors. The $L_{px}$ inductor is magnetically coupled to the secondary inductors ($L_{sxy}$), ensuring correct voltage distribution across the module.

A forward converter performs power transfer from the input source E to the supercapacitors. Its main power stage includes the multi-winding transformer (N_p:N_sx), switches $S_1$ and $S_2$, output inductors $L_{px}$, rectification diodes ($D_3$, $D_8$) and freewheeling diodes ($D_4$, $D_9$). A circuit formed by diodes $D_1$ and $D_2$ is used to demagnetize the transformer core. Finally, the voltage equalization system is implemented using coupled inductors $L_{sxy}$, which are in series with their respective diodes $D_5$ to $D_7$ and $D_{10}$ to $D_{12}$.

3. Operating Principle

The proposed analysis examines the operation at the single-module level to provide a clear explanation of the circuit. Power transfer to the module occurs when switches $S_1$ and $S_2$ conduct simultaneously, inducing a positive voltage $\left(V_{Nsx}\right)$ in the secondary winding of the transformer. The amplitude of this voltage is proportional to the DC link input voltage (E) and the transformation ratio, while its duration is defined by the conduction time. The negative voltage that appears in the secondary during the remainder of the period is blocked by diodes $D_3$ and $D_8$ and is therefore not involved in the load analysis.

Through these simplifying considerations, it is possible to represent each module as if it were a Buck converter, as shown in Figure 2.

Thus, the positive voltage on the transformer secondary, which supplies the output circuit of the module, can be represented by a simplified model. As illustrated in the red inset of Figure 2, this model consists of a DC voltage source ($E^{\prime }$) in series with an ideal switch ($S^{\prime }$). In this equivalent circuit, switch $S^{\prime }$ operates at the same duty cycle as the primary switches ($S_1$ and $S_2$), and the source voltage $E^{\prime }$ corresponds to the DC link voltage (E) multiplied by the transformation ratio.

The first stage of operation occurs during the conduction interval of switch $S^{\prime }$. During this period, the main inductor $L_{pa}$ is energized, and the voltage across it is described by:

$$v_{Lpa}\left(t\right)=E^{\prime }-\sum _{i=1}^n{v}_{Cai},$$

(1)

where $v_{Ca}$ is the total module voltage. Simultaneously, the voltages induced in the secondary windings $L_{sax}$ (with polarity as shown in Figure 3) reverse-bias diodes $D_5$–$D_7$. Consequently, the equalization circuits remain inactive, and the charging current is the same in all supercapacitors.

The second stage of operation begins when switch $S^{\prime }$ is turned off. During this period, the voltage across $L_{pa}$ reverses and is clamped at:

$$v_{Lpa}\left(t\right)=v_{Ca}+v_{D4},$$

(2)

where $v_{Ca}$ is the module voltage and $v_{D4}$ is the voltage across diode $D_4$, which is now conducting. If the voltages across the supercapacitors are balanced, the voltages induced in the auxiliary windings will be identical. Due to the correct specification of the turns ratio of the coupled inductor, a zero potential difference is maintained across the equalizing circuits, thereby preventing energy transfer, as shown in Figure 4.

Operation with Unbalanced Supercapacitors

Analyzing the second stage of operation, when switch $S^{\prime }$ is open, the equalization circuit has the opportunity to operate. In this interval, the voltages induced in the coupled windings ($V_{Lsa}$) tend to forward-bias the equalizing diodes. However, a diode will only conduct if the induced voltage is greater than the sum of the corresponding supercapacitor voltage ($V_{Ca}$), the diode’s own voltage drop ($v_{Dx}$), and the transformation ratio $k_T$ between $L_{pa}$ and $L_{sa}$:

$$v_{Lsa}=k_T{v}_{Lpa}=k_T(v_{D4}+\sum _{i=1}^n{v}_{Cai}),$$

(3)

The equalization circuit operates only when a voltage imbalance exists among the supercapacitors. By selecting an appropriate transformation ratio for the coupled inductors, the circuit prevents diode conduction under balanced conditions, since the induced voltages remain below the diode turn-on threshold. As a result, the equalization circuit remains disabled, and the forward converter operates in its default manner, following the current paths shown in Figure 4.

In contrast to the equilibrium condition, a voltage imbalance triggers the equalization mechanism. Taking the supercapacitor $C_{a2}$ with a lower voltage as an example, the imbalance causes the induced voltage in the $L_{sa2}$ winding to exceed the sum of the $C_{a2}$ voltage and the series diode voltage. As a result, the diode conducts, allowing an equalizing current to flow to charge the lower-voltage supercapacitor, a scenario depicted in Figure 5.

The equalization circuit operates passively, using the current in the coupled inductors to correct voltage imbalances. The significant advantage is that this action is autonomous, requiring no control or measurement circuits. By operating continuously whenever the converter charges the supercapacitors, the circuit itself prevents significant voltage differences from developing, thereby maintaining the module’s natural balance.

4. Analysis of the Transformation Ratio

For the dynamic analysis of the circuit, the module’s output stage is represented by a linearized component model, as shown in Figure 6. The main non-idealities are included as follows: the diode ($D_x$) is modeled with its forward voltage drop ($V_{Dx}$) and series resistance ($R_{Dx}$), while the coupled inductor includes the leakage inductance ($L_{Lsax}$), the copper losses through resistance $R_{Lsax}$, and the transformation ratio ($k_T$). The equivalent series resistance (ESR) of the supercapacitor is assumed to be negligible and is omitted from the model.

Voltage imbalances induce an equalizing current ($I_{Lsax}$), which consists of a portion of the filter inductor current ($I_{Lpa}$) feeding the auxiliary circuit. This process ensures smooth equalization, as the current is restricted by both the resistance of the coupled inductor winding and the increased voltage drop across the diode.

From the linearized component models, we can formulate the expression that represents the equalization current as a function of the voltage unbalance. For the specific case in which supercapacitor $C_{a2}$ has the lowest voltage in the module, this relationship is defined as:

$$I_{Lsa2}={\displaystyle \frac{V_{C_{a1}}+V_{C_{a2}}·(1-k_T)+\cdots +V_{C_{aN}}+V_{D_4}-V_{D_6}·k_T}{(R_{D_6}+R_{L_{Sa2}})·k_T}},$$

(4)

where, $I_{Lsa2}$ is the current in the coupled inductor winding $N_{Sa2}$, $R_{D6}$ is the equivalent circuit resistance of supercapacitor diode $D_6$ and $R_{Lsa2}$ is the winding resistance of the coupled inductor.

Figure 7 was obtained through the relationship between Equation (4) using a forward bias voltage $V_D=0.35 \mathrm{V}$, a resistance $R_D=0.15$ $\mathsf{\Omega }$, and the resistance of the coupled inductor winding ($R_{Lsx}$) equal to $0.05$ $\mathsf{\Omega }$.

The results were obtained for different transformation ratios between the number of windings of the filter inductor, $N_{Lpax}$, and the coupled inductor, $N_{Lsax}$. This transformation ratio, $k_T$, serves as the basis for designing and assembling the inductors in each module.

To illustrate this relationship, a module of three supercapacitors was considered, with the turns ratio appropriately defined for this arrangement. In this scenario, two supercapacitors are in equilibrium, and the third has a lower voltage. The resulting graph plots the voltage difference ($\Delta V_c$) against the equalizing current corresponding to the lower-voltage capacitor winding.

Figure 7 shows that a low transformation ratio causes current to flow in the equalization circuit, even when there is no imbalance. However, a high transformation ratio makes equalization impossible for slight imbalances. The precision of the magnetic circuit is the major challenge for good voltage equalization.

The module’s voltage regulation efficiency is improved by using low-voltage, direct-conducting diodes. Additionally, the coupled inductor’s transformation ratio must be carefully designed to ensure rapid diode conduction in the presence of imbalances. However, this same ratio cannot be so high that it causes steady-state conduction, which would generate unwanted circulating currents and system losses.

5. Modified Forward Converter

The proposed topology features modularity and scalability, with the operating principle analyzed for an individual module being generalizable to the entire charging and equalization system. This modularity enables the system to be expanded to manage a large number of supercapacitors in series, allowing the number of modules to be increased as needed.

Analyzing the complete circuit in Figure 8. The first stage of operation occurs when switches $S_1$ and $S_2$ conduct simultaneously. At this point, the input voltage E is applied to the transformer primary, inducing a voltage in each of its secondary windings and transferring power to all modules.

In each module, the inductor $L_{Py}$ is subjected to the difference between the secondary voltage and the voltage of its respective supercapacitor module. Consequently, a voltage is induced in the coupled windings ($N_{sxy}$) with a polarity that reinforces the blocking of the equalizing diodes. This process, which turns off equalization during load, is illustrated for a two-module system in Figure 8.

The second stage of operation begins with the opening of switches $S_1$ and $S_2$, disconnecting the input source. This operation is illustrated in Figure 9.

Simultaneously, on the secondary side, the voltage across each $L_{Py}$ inductor reverses polarity. The energy stored in the inductor is then transferred to the supercapacitor module through the freewheeling diode. During this stage, the inductor voltage is clamped to the sum of the module voltage and the diode voltage drop.

As long as the transformation ratio ($k_T$) of the coupled inductor is adequate, the equalization circuit will automatically act on any supercapacitor with reduced voltage. The equalization current will flow to this specific capacitor until its voltage equals the others, restoring balance to the entire module.

Analyzing a balanced module, where all supercapacitors have the same voltage, allows for the observation of the circuit’s stability criterion. For a transformation ratio of 2.8 or higher (as analyzed in Figure 7), the voltage induced in the secondary windings becomes slightly higher than the voltage of each supercapacitor. However, this slight potential difference, by design, is insufficient to overcome the forward voltage drop of the diodes in the equalization circuit, as defined by Equation (4). As a result, the diodes remain in cutoff, and the equalization circuit does not activate, ensuring system stability when there are no imbalances.

Crossed-Coupled Inductor Configuration

The prototype adopts two different architectures to enable a comparative performance analysis:

1.

Non-Crossed Configuration: In this configuration, already described above, each module operates magnetically independently. The filter inductor of a module ($L_{Py}$) is coupled exclusively to the secondary windings ($L_{Sxy}$) belonging to that same module. Therefore, there is no magnetic interconnection between adjacent modules.

2.

Crossed Configuration: This architecture is distinguished by the introduction of a magnetic coupling between the modules. The filter inductor ($L_{Py}$) of a module is coupled not only to the secondary windings of its own module but also to at least one secondary winding of each neighboring module. This interconnection is illustrated in the simplified three-module circuit of Figure 10.

In the new crossed configuration, the voltage across the secondary windings ($V_{Lsxy}$) continues to be determined by the voltage across the filter inductor ($V_{Lpy}$) to which they are coupled, according to the fundamental relationship in Equation (4). The main difference is that the design distributes the secondary windings coupled to the filter inductor across multiple modules. The equalization voltage for capacitors $C_{a3}$, $C_{b2}$, and $C_{c1}$ is represented as:

$$V_{Lsa3}=V_{Lsb2}=V_{Lsc1}={\displaystyle \frac{V_{L_{Pb}}}{k_T}}={\displaystyle \frac{\sum V_{C{b}_x}+V_{D_9}}{k_T}},$$

(5)

In the crossed configuration, the equalization process is highly interactive. When the circuit is activated to correct the voltage of a supercapacitor in one module, this action reflects a charge on the filter inductor of a neighboring module, to which it is magnetically coupled. This interaction creates a cascade effect, where energy is dynamically redistributed among all modules. The process repeats iteratively until the supercapacitor module reaches global equilibrium.

Although both configurations achieve module equalization, their dynamic performance differs—the lack of direct coupling between modules in the non-crossed configuration results in slower convergence to equilibrium. Conversely, the redistribution of energy between modules in the crossed configuration significantly accelerates the equalization process.

6. Experimental Results

Initially, the experimental results are obtained through simulation, considering the modified forward converter with two modules, each with three capacitors. The circuit is shown in Figure 8 and consists of a transformer with two secondary windings, six supercapacitors in series, divided into two modules, and two coupled inductors.

In the non-crossed configuration, the secondaries of the coupled inductor are connected to capacitors that are in the same module. Therefore, as identified in Figure 8, the secondaries of the coupled inductor $L_{pa}$ are connected to capacitors $C_{a1}$, $C_{a2}$, $C_{a3}$, while the secondaries of the coupled inductor $L_{pb}$ are connected to capacitors $C_{b1}$, $C_{b2}$, $C_{b3}$. For the crossed configuration, one of the secondary windings of the coupled inductors is connected to a capacitor that belongs to the other module.

To confirm the simulation results, a prototype of the modified forward converter is built and is illustrated in Figure 11.

A current control loop is implemented to maintain a constant current to validate the capacitor charging process and observe passive voltage equalization. The controller is a PI type with a proportional gain of 0.2048 and a time constant of 0.0000199.

The average current in the primary winding of the transformer is identified in Figure 12 as $I_E$. Comparing it with a reference signal ($I_{E_{ref}}$) and passing it through the PI, a PWM control signal is generated for simultaneous activation of switches $S_1$ and $S_2$. For simplicity, only the primary side circuit is shown in Figure 12.

The decision was made to implement only the current control loop, since the focus of the study is on the charging and equalization of the capacitors. Consequently, both the simulation and the experiment are interrupted as soon as the voltage reaches 2.5 V, considering a safety margin of 0.2 V. This approach is justified by the restricted interest in the charging stage (constant current), dispensing with the constant voltage stage, which would require the action of a voltage control loop for stabilization.

The design parameters for the simulation circuit and the prototype are listed in

Table 3. Modified forward converter parameters.

Parameter	Value	Unit
Voltage ($V_{i{n}_{max}}$)	40	V
Power ($P_{ou{t}_{max}}$)	50	W
Switching frequency ($f_{sw}$)	80	kHz
Transformer magnetizing inductance ($L_m$)	76.8	$\mathsf{\mu }$H
Transformer primary resistance ($R_p$)	0.030	$\mathsf{\Omega }$
Transformer primary leakage inductance ($L_{lk1}$)	1.54	$\mathsf{\mu }$H
Transformer transformation ratio (Np:Ns)	15:10
Coupled inductor primary inductance ($L_{pa}$)	438	$\mathsf{\mu }$H
Coupled inductor secondary resistance ($R_{Lsax}$)	0.034	$\mathsf{\Omega }$
Coupled inductor transformation ratio ($k_T$)	2.8
Coupled inductor coupling factor ($k_{fc}$)	0.98
Freewheeling diode forward voltage ($V_{Dx}$)	0.475	V
Freewheeling diode Resistance ($R_{Dx}$)	0.062	$\mathsf{\Omega }$
Balancing diode Forward Voltage ($V_{Dsx}$)	0.47	V
Balancing diode Resistance ($R_{Dsx}$)	0.058	$\mathsf{\Omega }$

. The parasitic elements of the components represented in Figure 6 are incorporated into the simulated model, highlighting the elements that directly impact the loading time.

The leakage inductances $L_{lpa}$ and $L_{Lsa}$ are added to the self-inductances of each winding. For the simulation, a capacitance of 0.2 F was used, which reduces the loading time window.

The parasitic values of each component of the simulation circuit were obtained by selecting the components used in the construction of the prototype as listed in

Table 4. Modified forward converter components.

Component	Model	Symbol
Supercapacitor	GTCAP D18h41 2.7 V 50 F	$C_{a1}$–$C_{a6}$
MOSFET	AOD458	$S_1$ and $S_2$
Supercapacitor Diodes	1N5822	$D_5$–$D_7$ and $D_{10}$–$D_{12}$
Diodes ($f_{sw}$)	SK56	$D_3$, $D_4$, $D_8$ and $D_9$
MOSFET Driver	IR2011	$I{C}_{drv}$
Current Sensor	INA199A2	$I{C}_{sense}$
Microcontroller	Tiva C Series (Launchpad)	$I{C}_{control}$
Transformer ferrite core	ETD 39	$T{r}_1$
Coupled Inductor ferrite core	RM 14	$L_1$ and $L_2$

.

To avoid proximity and skin effects, the transformer has nine parallel conductors in the primary and six in the secondary, while the coupled inductor has six conductors in the primary and five in the secondary. The wire used for all windings is 28 AWG. Other design parameters include an air gap of approximately 0.39 mm for the coupled inductor, and the material is IP12E ferrite manufactured by Thornton Eletrônica Ltda., São Paulo, Brazil.

The microcontroller used is the TM4C123G DSP (Texas Instruments, Dallas, TX, USA) via the launchpad provided by the manufacturer, with an operating frequency of 80 MHz.

6.1. Simulation of the Proposed Converter

The simulations aim to evaluate the operation of the modified forward converter during capacitor charging and balancing in both non-crossed and crossed configurations. Additionally, the impact of the input voltage amplitude on the charging time of the capacitor is assessed.

The circuit implemented in the simulator is shown in Figure 8, considering the forward voltage and diode resistance, as well as the series resistances of the transformer windings and coupled inductors. Table 3 contains the values of each parameter used in the simulation. The three-winding transformer is present in the PSIM simulator element library and is identified as 1-ph 3-w Transformer:T31, while the four-winding coupled inductor is identified as Coupled Inductor (4):MUT5.

The crossed configuration in the simulation connects the secondaries of the coupled inductor $L_{pa}$ with capacitors $C_{a1}$, $C_{a2}$, and $C_{b3}$, while the secondaries of the coupled inductor $L_{pb}$ are connected to capacitors $C_{a3}$, $C_{b1}$, and $C_{b2}$.

The simulation was performed using PSIM Professional 64-bit, version 10.0.6.564 with a simulation step of 0.1 $\mathsf{\mu }$s. The series capacitors were charged to approximately 2.5 V. The control loop determines the current in the primary winding of the transformer, allowing charging with a constant current.

To confirm the correct functioning of the switching stages and validate the energy flow predicted in the project, Figure 13 is presented. It illustrates the waveforms for a voltage loading and balancing condition.

A diode $D_5$ is connected to a capacitor $C_{a1}$, and a diode $D_6$ is connected to a capacitor $C_{a2}$ as illustrated in Figure 10. For the experiment, the initial voltage of the capacitor $C_{a1}$ is 1 V, while that of capacitor $C_{a2}$ is zero.

The input voltage is 12.5 V, and the duty cycle is 0.5, as can be seen in the $T{r}_1$ Voltage curve. The capacitors and the coupled inductor charge when the primary voltage is positive, as can be observed in the $L_{pa}$ current waveform. The equalization process occurs when the voltage on the transformer primary is negative, resulting in no energy transfer from the source to the capacitors. At this instant, the energy stored in the coupled inductor is transferred to the capacitors.

At the time the waveforms were acquired, the capacitor $C_{a2}$ had a voltage of 1.2 V, while the voltage of the capacitor $C_{a1}$ was 2 V. Therefore, the circuit operates to achieve equilibrium while charging with the average current value of the diode $D_6$ ($D_6$ current) greater than the average current value of the diode $D_5$ ($D_5$ current).

Note that the loading and equalization process occurs in a complementary manner and is therefore dependent on the converter’s duty cycle.

Figure 14a shows the charging and balancing of the capacitors during a time interval for a current of 130 mA in the non-crossed configuration. Figure 14b shows the time interval with the same current for the crossed configuration. In the crossed configuration, the inductor $L_{pa}$ has one of its coupled windings connected to the capacitor $C_{b3}$, and the inductor $L_{pb}$ has one of its windings coupled to the capacitor $C_{a3}$.

The initial conditions of the capacitors are: $V_{Ca1}$ = $V_{Cb1}$ = 0.5; $V_{Ca2}$ = $V_{Cb2}$ = 1 V; $V_{Ca3}$ = 0.2 V; $V_{Cb3}$ = 0 V.

The charging time to 2.5 V was 1.45 s. For both configurations, the equalization time was approximately 0.9 s, considering a voltage difference threshold of 0.1 V. The total charging time and the equalization time remained unchanged for both configurations.

The crossed configuration did not present different results from the non-crossed configuration because the capacitors of each module had the same initial conditions. Therefore, a new experiment was conducted with the initial conditions: the three capacitors of the first module at a voltage of 1 V ($V_{Ca1}$ = $V_{Ca2}$ = $V_{Ca3}$ = 1 V) and the voltage of the capacitors of the second module equal to zero ($V_{Cb1}$ = $V_{Cb2}$ = $V_{Cb3}$ = 0 V). The controlled current was maintained at 130 mA.

Figure 15a shows the result of the non-crossed configuration, and Figure 15b shows the result of the crossed configuration.

In the second experiment, the non-crossover configuration reaches 2.5 V sooner because the voltage imbalance on the secondary side limits the redistribution of energy between the modules, causing most of the transferred energy to contribute directly to charging. In the crossover configuration, some of the transferred energy is continuously redistributed between the modules, slightly delaying the rise in average voltage, while ensuring more uniform equalization.

Figure 16 shows the result with a shorter time and voltage interval to highlight the equalization details. The result of the non-crossed configuration is in Figure 16a and the crossed configuration in Figure 16b.

The crossed configuration equalizes the voltage of capacitors $C_{a3}$ and $C_{b3}$ before the others. This occurs because the energy stored in the coupled inductor of the first module has two balanced capacitors at 1 V ($C_{a1}$ and $C_{a2}$) and one at 0 V ($C_{b3}$), and it receives the largest share of energy stored in the previous duty cycle. Meanwhile, the coupled inductor of the second module directs the largest share of stored energy to capacitors $C_{b1}$ and $C_{b2}$, which causes capacitor $C_{a3}$ not to charge as quickly as the others in the first module.

Table 5. Voltage measurements for non-crossed vs. crossed configurations over time.

Time (s)	Non-Crossed						Crossed
	VCa1 (V)	VCa2 (V)	VCa3 (V)	VCb1 (V)	VCb2 (V)	VCb3 (V)	VCa1 (V)	VCa2 (V)	VCa3 (V)	VCb1 (V)	VCb2 (V)	VCb3 (V)
0	1.000	1.000	1.000	0	0	0	1.000	1.000	1.000	0	0	0
0.05	1.003	1.003	1.003	0.436	0.436	0.436	1.011	1.011	1.010	0.430	0.430	0.468
0.1	1.033	1.033	1.033	0.665	0.665	0.665	1.045	1.045	1.033	0.644	0.644	0.716
0.15	1.083	1.083	1.083	0.814	0.814	0.814	1.092	1.092	1.066	0.804	0.804	0.882
0.2	1.144	1.144	1.144	0.944	0.944	0.944	1.151	1.151	1.117	0.936	0.936	1.012
0.25	1.212	1.212	1.212	1.061	1.061	1.061	1.216	1.216	1.179	1.052	1.052	1.124
0.3	1.284	1.284	1.284	1.169	1.169	1.169	1.287	1.287	1.250	1.161	1.161	1.228
0.35	1.354	1.354	1.354	1.267	1.267	1.267	1.356	1.356	1.318	1.256	1.256	1.318
0.4	1.425	1.425	1.425	1.358	1.358	1.358	1.412	1.412	1.376	1.333	1.333	1.389
0.45	1.497	1.497	1.497	1.446	1.446	1.446	1.451	1.451	1.417	1.388	1.388	1.438
0.5	1.565	1.565	1.565	1.525	1.525	1.525	1.490	1.490	1.459	1.438	1.438	1.438

presents the capacitor voltages for both non-crossed and crossed configurations at 0.05 s intervals. In the non-crossed configuration, full equalization of all six capacitors (voltage difference $<0.1$ V) is achieved at 0.35 s. Conversely, the crossed configuration achieves partial equilibrium of four capacitors ($V_{Ca1}=V_{Ca2}=V_{Ca3}=V_{Cb3}$) at 0.25 s, reaching full equalization for all six capacitors at 0.30 s. These results demonstrate that the crossed configuration attains equilibrium faster than the non-crossed topology.

Table 6. Number of equalized capacitors over time for non-crossed and crossed configurations.

Time (s)	Non-Crossed			Crossed
	${\mathit{L}}_{\mathit{pa}}$	${\mathit{L}}_{\mathit{pb}}$	${\mathit{L}}_{\mathit{pa}}$ + ${\mathit{L}}_{\mathit{pb}}$	${\mathit{L}}_{\mathit{pa}}$	${\mathit{L}}_{\mathit{pb}}$	${\mathit{L}}_{\mathit{pa}}$ + ${\mathit{L}}_{\mathit{pb}}$
0	3	3	0	2	2	2
0.05	3	3	0	2	2	2
0.1	3	3	0	2	2	2
0.15	3	3	0	2	2	2
0.2	3	3	0	2	2	2
0.25	3	3	0	3	2	4
0.3	3	3	0	3	3	6
0.35	3	3	6	3	3	6
0.4	3	3	6	3	3	6
0.45	3	3	6	3	3	6
0.5	3	3	6	3	3	6

summarizes the number of equalized capacitors at 0.05 s intervals. Initially, the non-crossed configuration exhibits full intra-module balancing (three capacitors per inductor); however, inter-module equilibrium is not achieved until 0.35 s. Conversely, the crossed configuration begins with partial equalization: two capacitors are balanced within each inductor, and two are balanced in a crossed manner between adjacent modules. By 0.25 s, all three capacitors associated with inductor $L_{pa}$ are equalized, along with capacitor $C_{a3}$ from inductor $L_{pb}$. Full equalization of all six capacitors is achieved in the subsequent time step.

A third experiment is conducted considering the same initial current and voltage conditions as the previous experiment. However, only the non-crossed condition is used for two different input voltages. Figure 17a shows the result of the experiment with an input voltage of 40 V, and Figure 17b shows the result with an input voltage of 22.5 V.

It is important to note that, in this study, the duty cycle is not treated as an independent control variable. Variations in the duty cycle naturally arise from changes in the input voltage while maintaining constant-current (CC) charging operation. As a result, the influence of the duty cycle on the equalization process is indirectly reflected in the experimental and simulation results through the variation of the freewheeling interval. Since voltage equalization occurs exclusively during the off-time of the main switch, lower duty-cycle operation—associated with higher input voltage—leads to faster equalization dynamics, whereas higher duty-cycle operation reduces the available equalization interval.

With a higher voltage at the converter input, the duty cycle decreases, allowing for a longer energy transfer time through the coupled inductor. The result is faster charging and equalization. This condition is best visualized by comparing the voltage value of the capacitors at 0.2 s in both results. As summarized in

Table 7. Capacitor voltages up to 0.2 s with different $V_{in}$ values.

${\mathit{V}}_{\mathit{in}}$ (V)	VCa2 (V)	VCb3 (V)	$\mathsf{\Delta }{\mathit{V}}_{\mathit{C}}$
40	1.23	1.10	0.13
22.5	1.15	0.87	0.28

.

The voltage difference across the capacitors $\Delta V_C$ is smaller when the input voltage is higher.

6.2. Prototype of the Proposed Converter

The experimental results obtained with the prototype aim to confirm the actual performance of the proposed converter, considering non-ideal conditions and practical effects such as losses, parasitic effects, electromagnetic noise, and thermal variation. This improves the reliability of the results, improving its practical applicability.

Figure 18 shows the voltage waveforms on the transformer primary, and Figure 19 shows the voltages, respectively, on the primary of the inductor coupled to one of the coupled inductor’s secondaries. The duty cycle of switches $S_1$ and $S_2$ is approximately 0.5, and the input voltage is 15 V ($V_{in}=15$ V ).

The transformer secondary has a peak voltage of 10 V when the transformer primary voltage peaks at 15 V. After the diode voltage drops, the peak voltage across the primary and secondary of the coupled inductor is approximately 4 V and 1.45 V, respectively.

The ringing observed in Figure 20 is associated with high-frequency resonances excited during the switching transitions of the coupled inductor. This behavior is mainly caused by the interaction between leakage inductance, parasitic winding and junction capacitances, and layout-related effects inherent to the experimental prototype. The oscillations are confined to short time intervals around the switching edges and do not persist during the effective energy transfer intervals responsible for capacitor charging and voltage equalization. Experimental measurements confirmed that the resulting voltage excursions remain within the safe operating limits of the semiconductor devices and do not introduce abnormal voltage stress or compromise converter stability or reliability. Consequently, no degradation in charging performance or equalization dynamics was observed under the tested conditions. Although snubber or damping networks were not required for the operating power levels investigated in this work, such mitigation techniques could be adopted in higher-power or EMI-critical implementations to further reduce ringing and improve voltage margins.

The prototype operates in both crossed and non-crossed configurations, and six 50 $\mathsf{\mu }$F capacitors with a voltage of 2.7 V are used to evaluate charging and equalization capabilities.

The supercapacitor voltages are read every 30 s, which ends when the capacitors reach a voltage of 2.5 V, leaving a safety margin.

The first experiment considered the non-crossed configuration and a current of 130 mA. The initial voltages of the capacitors are: $V_{ca1}$ = 0.84 V; $V_{ca2}$ = 0.13 V; $V_{ca3}$ = 0.83 V; $V_{cb1}$ = 0.85 V; $V_{cb2}$ = 0.09 V; $V_{cb3}$ = 0.83 V. The largest difference between the initial voltages of the capacitors is equal to 0.76 V.

Figure 20 illustrates the results of the first experiment. The six curves represent the voltage across each supercapacitor versus time in seconds.

The supercapacitors reach a voltage of 2.5 V after 570 s, with equalization between them being achieved after 390 s. The maximum difference between the highest voltage value and the lowest value is 180 mV, at the end of the experiment.

The crossed configuration was established for a second experiment. The inductor of the first module ($L_{pa}$) is coupled to capacitors $C_{a1}$, $C_{a3}$, and $C_{b2}$, and the inductor of the second module ($L_{pb}$) is coupled to capacitors $C_{b1}$, $C_{b3}$, and $C_{a2}$.

The result of the experiment is shown in Figure 21 and involves a charging current of 130 mA with the initial capacitor voltages equal to: $V_{ca1}$ = 0.95 V; $V_{ca2}$ = 0.30 V; $V_{ca3}$ = 0.93 V; $V_{cb1}$ = 0.92 V; $V_{cb2}$ = 0.39 V; $V_{cb3}$ = 0.90 V. The largest difference between the initial voltages of the capacitors is 0.65 V.

Therefore, with the crossed configuration, the charging curve was steeper for the capacitors with lower voltages ($C_{a2}$ and $C_{b2}$), tending to equalize more quickly than the non-crossed configuration. Furthermore, the voltage difference when the supercapacitors reached 2.5 V was 100 mV.

For a correct comparison between the results, the repeatability of the initial conditions is necessary, which presents a challenge due to the time required for charging and discharging the supercapacitors. However, considering a smaller initial voltage difference in the second experiment, the charging results are comparable. This can also be considered when analyzing the balance between all supercapacitors. The crossed configuration reached equalization before the non-crossed configuration; however, the initial difference was smaller.

The third experiment considers increasing the converter current to 520 mA while maintaining the non-crossed configuration. Figure 22 presents the results of this experiment, where it can be seen that the initial voltage of supercapacitors are: $V_{ca1}$ = 0.80 V; $V_{ac2}$ = 0.02 V; $V_{ac3}$ = 0.81 V; $V_{cb1}$ = 0.80; $V_{cb2}$ = 0.03 V; $V_{cb3}$ = 0.79 V. The largest difference in initial voltages of the capacitors is equalV.

The supercapacitors reach a voltage of 2.5 V after 390 s, with equalization between them lasting 300 s. Therefore, the charging time decreases compared to the other experiments. However, the equalization time was equivalent to that of the crossed configuration with a current of 130 mA.

Setting the converter to higher currents increases the duty cycle, which is the period of greatest energy transfer from the source to the supercapacitors’ charging. However, part of this energy is stored in the coupled inductor, which in turn directs this energy to the supercapacitors with the lowest voltages for the remainder of the switching period.

7. Discussion

Simulation and experimental results confirm the correct operation of the modified forward converter as a passive charger and voltage equalizer for series-connected supercapacitors. Beyond validating the concept, the results provide several insights that can be directly translated into practical design guidelines, clarifying both the strengths and the inherent limitations of the proposed approach.

First, the experimental results confirm that the equalization mechanism is fully autonomous, requiring neither voltage sensing nor dedicated control signals. Balancing is activated exclusively during the freewheeling interval and only when the voltage difference between cells exceeds the diode conduction threshold. From a design perspective, this behavior implies that the equalization process is naturally robust and self-limiting, as no circulating currents are generated under near-balanced conditions. However, it also establishes a clear dependence on the converter operating point: higher input voltage, higher transferred energy, or lower duty cycle increase the energy stored in the coupled inductors, thereby accelerating the equalization process. Consequently, designers should account for the expected operating duty cycle when targeting a desired balancing speed, particularly in applications where the input voltage may vary over a wide range.

The crossed inductor configuration demonstrated significantly improved dynamic equalization when large voltage mismatches were present among modules. By magnetically coupling the inductors across modules, energy redistribution occurs simultaneously among multiple cells, reducing convergence time compared to non-crossed configurations. This observation suggests that the cross-configuration is particularly suitable for modular systems where initial voltage dispersion or aging-induced imbalance is expected. Nevertheless, this benefit comes at the cost of increased magnetic design complexity, requiring tighter control of leakage inductance and coupling coefficients. In practice, this implies that careful magnetic layout and winding symmetry are essential to ensure predictable and repeatable equalization behavior.

The results also highlight the critical role of the coupled-inductor turns ratio ($k_T$), which directly defines the equalization threshold and sensitivity to small voltage differences. Lower $k_T$ values increase sensitivity but may induce circulating currents even under nearly balanced conditions, while higher values reduce unwanted circulation at the expense of slower correction of small deviations. Experimental data confirmed that non-ideal factors (core tolerances, winding resistance, and leakage inductance) affect this trade off and must be considered during the design process. As a practical guideline, $k_T$ should be selected to strike a balance between sensitivity and stability, taking into account manufacturing tolerances and the acceptable residual imbalance. In the present prototype, the final voltage mismatch remained between 80 and 140 mV, which is well within acceptable limits for most supercapacitor-based energy storage systems.

It should be noted that the performance of the proposed converter was not quantitatively benchmarked against other equalization techniques, such as switched-capacitor networks, flyback-based equalizers, or fully active balancing converters. While such comparisons could further contextualize the approach in terms of efficiency, component count, and balancing speed, they were outside the scope of this work. Similarly, detailed efficiency measurements and thermal characterization were not conducted, although they become increasingly important at higher power levels where diode conduction losses may be significant. These aspects represent natural extensions of the present study.

Overall, the discussion confirms that the proposed topology provides a practical and robust solution for integrating charging and voltage equalization in a single passive and isolated architecture. The results emphasize that the approach is best suited for applications prioritizing simplicity, reliability, and modular scalability, while also identifying clear design trade offs related to operating point selection, magnetic design, and efficiency optimization that can guide future developments and system-level implementations.

Preliminary Loss and Efficiency Considerations

Although the experimental validation focused on voltage equalization performance, a preliminary estimation of losses can be derived from the converter operating principles and measured parameters. The dominant contribution is associated with diode conduction during the equalization interval, which occurs exclusively during the freewheeling (off-time) and only under voltage imbalance conditions. As a first-order approximation, diode losses scale with the average equalization current and the fraction of time in which balancing is active, naturally limiting their impact under near-balanced operation. Additional losses arise from copper losses in the coupled inductors, which depend on the RMS equalization current and winding resistance, and from the transformer losses inherent to conventional forward converters. Since the equalization currents are lower than the main charging current and are not continuously present, the overall efficiency penalty is expected to remain moderate at the power levels considered. At higher power levels, diode conduction losses may become more significant, motivating future work on loss optimization and thermal characterization.

8. Conclusions

The modified forward DC-DC converter proved effective for charging and simultaneously equalizing supercapacitor modules. The use of a transformer with multiple windings enables the creation of several charging subcircuits for the series-connected supercapacitors. These subcircuits employ coupled inductors to achieve high-precision voltage equalization across the supercapacitors.

The proposed equalization circuit is passive and non-dissipative, requiring no control circuitry and activating only when a voltage imbalance occurs. The coupled-inductor design methodology defines the voltage-deviation threshold that autonomously triggers the equalization process.

The converter’s performance was evaluated in two distinct architectures: non-crossed and crossed. Both simulation and hardware prototype results confirmed the circuit’s dual-function capability. Comparative experiments demonstrated that while both configurations are effective, the crossed-coupled architecture provides superior balancing performance when the sum of the voltages in the modules is different.

The experimental results confirmed the theoretical modeling, as the voltage imbalance among the supercapacitors remained between 100 and 180 mV for different initial conditions and charging currents, which is consistent with the proposed model for a coupled-inductor ratio.

Furthermore, the study revealed that the balancing process is influenced by the converter’s duty cycle. A higher input voltage, which corresponds to a shorter duty cycle, allows for a more extended freewheeling period, which in turn accelerates both the charging and equalization processes.

From a state-of-the-art perspective, the proposed modified forward converter addresses a design space not fully covered by previously reported balancing techniques. Unlike active equalization schemes based on bidirectional or resonant converters, which require complex control and sensing, the proposed approach achieves intrinsic voltage equalization solely through magnetic design. Compared to passive and semi-passive solutions, it preserves galvanic isolation, offers modular scalability, and enhances balancing dynamics through the crossed-coupled configuration. Consequently, the proposed topology provides a robust and scalable alternative that strikes a balance between simplicity and performance for supercapacitor energy storage systems.

The successful validation of this prototype confirms that the proposed modified forward converter is a simple, scalable, and robust solution for maintaining the health and performance of supercapacitor energy storage systems.