Computational Efficiency–Accuracy Trade-Offs in EMT Modeling of ANPC Converters: Comparative Study and Real-Time HIL Validation

Abstract

With the increasing demands of the grid on power electronic converters, active neutral-point-clamped (ANPC) converters have been widely adopted due to their flexible modulation strategies and wide-range power regulation capabilities. To address grid-integration testing requirements for ANPC converters, this paper comparatively studies three electromagnetic transient (EMT) modeling approaches: switch-state prediction method (SPM), associated discrete circuit (ADC), and time-averaged method (TAM). Steady-state and transient simulations reveal that the SPM model achieves the highest accuracy (error ≤ 0.018%), while the TAM-based switching function model optimizes the efficiency–accuracy trade-off with 6.4× speedup versus traditional methods and acceptable error (≤2.62%). Consequently, the TAM model is implemented in a real-time hardware-in-the-loop (HIL) platform. Validation under symmetrical/asymmetrical grid faults confirms both the model’s efficacy and the controller’s robust fault ride-through capability.

1. Introduction

Accelerating energy structure transformation has led to a growing proportion of photovoltaic, wind turbine, and energy storage systems in power grids. These systems increasingly demand high power density and reliability, imposing stricter requirements on power electronic converters [1,2]. Multilevel converters have emerged as a promising solution in medium- to high-voltage applications due to their enhanced output waveform quality and reduced voltage stress on switching devices. Compared to traditional two-level converters, three-level topologies, with advantages such as low harmonic content and reduced device voltage stress, play a significant role in renewable energy grid integration. Among them, the neutral-point-clamped (NPC) three-level converter is widely used due to its simple structure and high reliability. However, inherent drawbacks such as uneven switching device losses and DC-side capacitor voltage fluctuations severely limit system efficiency and device lifespan [3,4]. To overcome these limitations, researchers proposed the active neutral-point-clamped (ANPC) topology, which introduces two additional active switches and more neutral-point commutation paths, thereby optimizing switching device loss distribution [5]. Moreover, its flexible modulation strategies enable diverse commutation modes, adapting to wide-range power regulation needs in photovoltaic and energy storage systems [6].

With high-penetration renewable energy integration, power grids exhibit low inertia and weak damping characteristics. Converters, including ANPC topologies, may trigger grid-related issues such as wideband oscillations and harmonic resonance during dynamic interactions with the grid due to rapid switching processes [7,8], posing significant threats to system stability. Conventional electromechanical transient simulation operates on a millisecond timescale, which is insufficient to capture the high-frequency dynamics of converter commutation processes. In contrast, electromagnetic transient (EMT) simulations can resolve switching actions and system dynamics at a microsecond timescale [9]. Thus, EMT analysis is essential for renewable energy systems and their power electronic converters.

The accuracy of EMT simulations depends on the fidelity of the mathematical model and the discretization time step. Finer models and smaller time steps yield higher accuracy. To realistically reflect dynamic characteristics of renewable energy systems, the hardware-in-the-loop (HIL) testing of power electronic converter controllers has become a trend [10,11]. High-performance computing and parallel processing enhance EMT simulation efficiency, enabling real-time simulation where physical quantity changes in the model match or exceed real-system dynamics. With physical controller participation, HIL results are closer to real-world responses, improving the credibility of grid-connected performance evaluations.

However, improving simulation efficiency for complex models remains challenging. Finer models and smaller time steps increase computational demands, requiring higher simulator performance and real-time data interaction. Common efficiency improvement methods include deploying additional hardware resources [12], which involves synchronization, latency, and cost trade-offs, or enhancing models and algorithms for cost-effective performance gains. Numerous studies have focused on improving algorithms and models for two-level converters or three-level NPC converters [13,14]. However, research on efficient models for ANPC converters remains limited, and no work has yet been done to consolidate various improvement methods, apply them to a single model, and compare their accuracy and efficiency.

This paper focuses on the trade-offs between computational efficiency and simulation accuracy in EMT modeling of ANPC converters, comparing different switching modeling methods to identify the most suitable approach for real-time HIL applications. Section 2 introduces ANPC switching principles and modeling approaches. Section 3 constructs simulation test cases to evaluate model performance in simulation accuracy and computational efficiency. Section 4 presents HIL test results using the proposed EMT model with a physical controller. Finally, conclusions are provided in Section 5.

2. Switching Model Construction for ANPC Topology

2.1. ANPC Three-Level Topology and Operating Principle

The ANPC three-level topology is shown in Figure 1. In the figure, O denotes the neutral point, T₁–T₆ are insulated gate bipolar transistors (IGBTs), D₁–D₆ are anti-parallel diodes, U_dc is the DC voltage, and I_ac is the output current (positive direction). Compared to NPC topologies, ANPC replaces neutral-point clamping diodes with two IGBTs and diodes, increasing commutation path combinations during zero-level output.

Depending on the modulation strategy, the ANPC topology can operate in two modes: short commutation path and long commutation path [15]. Their switching states are listed in

Table 1. Switching states for short commutation path mode.

Output Voltage	Converter State	IGBT Gate Switching State
		T1	T2	T3	T4	T5	T6
1/2 Udc	P	1	1	0	0	0	0
0	O1	0	1	0	0	1	0
0	O2	0	0	1	0	0	1
−1/2 Udc	N	0	0	1	1	0	0

and

Table 2. Switching states for long commutation path mode.

Output Voltage	Converter State	IGBT Gate Switching State
		T1	T2	T3	T4	T5	T6
1/2 Udc	P	1	1	0	0	0	1
0	O1	1	0	1	0	0	1
0	O2	0	1	0	1	1	0
−1/2 Udc	N	0	0	1	1	1	0

. Here, P denotes the positive-level output state, N denotes the negative-level output state, O₁ is the transition state with zero output voltage and positive I_ac, and O₂ is the transition state with zero output voltage and negative I_ac. State ‘1’ indicates the switch is on, and state ‘0’ indicates the switch is off.

In the short commutation path mode, T₂ and T₃ switch at the fundamental frequency of the output voltage, while the remaining IGBTs switch at the switching frequency. In the long commutation path mode, T₂ and T₃ switch at the switching frequency, while the remaining IGBTs switch at the fundamental frequency of the output voltage. Based on Table 1 and Table 2, the commutation process of the ANPC topology can be described as shown in Figure 2.

2.2. Fast Simulation Model Based on Switch-State Prediction

In EMT simulation, a common switching modeling method uses a binary resistor equivalent, employing a small resistor for the on-state and a large resistor for the off-state. When the switch state changes, the system nodal admittance matrix needs updating, followed by LU decomposition to obtain its inverse, and then solving the nodal voltage equation as shown in Equation (1).

v = Y⁻¹i

(1)

where v is the nodal voltage vector, Y⁻¹ is the inverse of the system nodal admittance matrix, and i is the node injection current vector.

When multiple switches exist in the topology, certain switching actions within an EMT simulation time step may trigger a series of subsequent switching actions. The traditional solution involves iterative method (IM) to solve for the stable state of all switches in the current time step. However, as the number of switches increases, the iteration process becomes significantly time-consuming.

To avoid lengthy iterative solutions for switching states, this paper employs a switch-state prediction [13] method (SPM) to derive synchronous switching events based on the ANPC topology and commutation paths, thereby constructing a fast simulation model.

2.2.1. Three-State Machine for IGBT/Diode

The ANPC topology contains six IGBT/diode groups. For each IGBT/diode group, the switching states of both the IGBT and diode can be determined based on the gate pulse signal, terminal voltage polarity, and current direction at the current time step. Since the IGBT and diode are connected in an anti-parallel configuration, they cannot conduct simultaneously at any given moment. Consequently, for any IGBT/diode group, only three distinct switching states are possible [16]. The state transition diagram is illustrated in Figure 3.

In Figure 3, S represents the IGBT gate signal, I_ce represents the current flowing through the IGBT/diode group, and V_ce represents the forward voltage across the IGBT/diode group.

Based on the IGBT/diode group’s three-state machine, the state of each switch group is preliminarily determined. Due to potential chain reactions from other switches in the topology, it is also necessary to predict synchronous switching events based on the circuit operating state and update the switch states accordingly.

2.2.2. Synchronous Switching Event Judgment

Based on the ANPC topology commutation process shown in Figure 2, synchronous switching events can be predicted. According to the four operational conditions in the commutation process, path switching and synchronous switching event prediction are illustrated in Figure 4.

In Figure 4, State_1–6 represent the states of the IGBT/diode groups, with different numerical values corresponding to the states defined in Figure 3. U_dcp is the voltage from node P to node O in the ANPC topology, and U_dcn is the voltage from node O to node N.

Through the preliminary judgment of the three-state machine of the IGBT/diode group and the judgment of the synchronous switching events, a stable combination of switching states can be solved directly at the current time step, eliminating the iterative switching state solving process.

2.3. Switching Model Based on Associated Discrete Circuit

2.3.1. L/C Equivalent of Switch

The method of using a binary resistor to model a switch, while offering fast switching action response and high accuracy, requires potentially multiple LU decompositions of the system nodal admittance matrix per simulation step for power systems with numerous switching elements. This large computational burden severely impacts simulation efficiency.

Some EMT simulation programs model switches using the associated discrete circuit (ADC) principle [17]. As shown in Figure 5, a small inductor L_sw is used to model the switch in the on-state, and a small capacitor C_sw in series with a damping resistor R_sw is used for the off-state. By setting appropriate values for L_sw and C_sw, the equivalent admittance during on and off state can be made equal, preventing changes in the system nodal admittance matrix after a switching event.

2.3.2. Norton Equivalent of ADC Switch Model

The switch model is discretized based on its conduction and blocking characteristics. Its associated discrete circuit can be represented as a Norton equivalent circuit comprising an equivalent admittance in parallel with a history current source, as shown in Figure 6. Here, i_sw(t) is the switch branch current at time t, u_sw(t) is the switch branch voltage at time t, and i_h is the history current.

The choice of numerical integration method significantly impacts EMT simulation results. The trapezoidal method is commonly used for stability and accuracy but may cause numerical oscillations. The backward Euler method offers superior stability in simulations involving rapidly changing circuit parameters and avoids numerical oscillations [18]. This paper employs the backward Euler method for switch model discretization.

Treating the IGBT/diode group as a whole, states 1 and 2 in Figure 3 are combined into the on-state, and state 0 is the off-state.

When the IGBT/diode is on, it is equivalent to an inductor, and the discretization equation is:

$$\begin{gathered} i_{SW}\left(t\right)=i_{SW}\left(t-∆t\right)+∆t·{\displaystyle \frac{u_{SW}\left(t\right)}{L_{SW}}} \\ ={\displaystyle \frac{∆t}{L_{SW}}}{u}_{SW}\left(t\right)+i_{SW}\left(t-∆t\right) \end{gathered}$$

(2)

where $∆t$ is the discrete time step, i.e., the simulation step size.

The Norton equivalent expressions are:

$$\left\{\begin{array}{c}{Y}_L={\displaystyle \frac{∆t}{L_{SW}}}\hfill \\ i_{hL}\left(t-∆t\right)=-i_{SW}\left(t-∆t\right)\end{array}\right.$$

(3)

$Y_L$ is the Norton equivalent admittance for the on-state switch, $i_{hL}\left(t-∆t\right)$ is the Norton equivalent current (history current) for the on-state switch.

When the IGBT/diode is off, it is equivalent to a capacitor and a resistor, the discretization equation is:

$$u_{SW}\left(t\right)-i_{SW}\left(t\right)R_{SW}=u_{SW}\left(t-∆t\right)+∆t·{\displaystyle \frac{i_{SW}\left(t\right)}{C_{SW}}}-i_{SW}\left(t-∆t\right)R_{SW}$$

(4)

The Norton equivalent expressions are:

$$\left\{\begin{array}{c}{Y}_C={\displaystyle \frac{C_{SW}}{∆t+C_{SW}{R}_{SW}}}\hfill \\ i_{hC}\left(t-∆t\right)={\displaystyle \frac{C_{SW}}{∆t+C_{SW}{R}_{SW}}}{u}_{SW}\left(t-∆t\right)-{\displaystyle \frac{C_{SW}{R}_{SW}}{∆t+C_{SW}{R}_{SW}}}{i}_{SW}\left(t-∆t\right)\end{array}\right.$$

(5)

$Y_C$ is the Norton equivalent admittance for the off-state switch, $i_{hC}\left(t-∆t\right)$ is the Norton equivalent current (history current) for the off-state switch.

To ensure the equivalent admittance is identical for both on and off states, $L_{SW}$, $C_{SW}$, and $R_{SW}$ must satisfy:

$${Y_{SW}=Y}_L={\displaystyle \frac{∆t}{L_{SW}}}=Y_C={\displaystyle \frac{C_{SW}}{∆t+C_{SW}{R}_{SW}}}$$

(6)

After constructing the switch model based on the ADC principle, the Norton equivalent circuit of the ANPC topology is shown in Figure 7. Since the system nodal admittance matrix remains constant regardless of IGBT/diode conduction or blocking, frequent LU decomposition and inversion of the admittance matrix are avoided, simplifying the EMT simulation flow and improving efficiency.

The ADC switch model also has limitations. While using the backward Euler method avoids numerical oscillations, it requires sub-microsecond simulation step sizes to achieve accuracy comparable to the trapezoidal method, restricting the usable step size. Furthermore, modeling the switch as an inductor or capacitor inevitably introduces artificial oscillations due to energy exchange with external circuit inductors and capacitors. Although damping resistors can mitigate oscillations, the coupling between damping parameters and switch equivalent admittance parameters complicates parameter selection, often requiring extensive parameter configuration attempts.

2.4. Switching Function Model Based on Time-Averaged Method

2.4.1. Switching Function Model Construction

Constructing a switching function model is an external characteristic modeling approach, equivalent modeling based on the overall input-output characteristics of the converter. It introduces switching functions representing the on/off states and describes the converter’s switching characteristics through mathematical expressions [19]. Compared to detailed models, the switching function model does not simulate the nonlinear dynamic process of each switching device, significantly reducing the model equation dimensionality and improving simulation efficiency.

For a three-phase three-level ANPC converter, its detailed model topology is shown in Figure 8.

The voltage–current relationships between the AC and DC sides of the three-phase three-level ANPC converter can be expressed as:

$$\left\{\begin{array}{l}{V}_a=U_{dcp}\ast S_1\ast S_2-U_{dcn}\ast S_3\ast S_4\\ V_b=U_{dcp}\ast S_7\ast S_8-U_{dcn}\ast S_9\ast S_{10}\\ V_c=U_{dcp}\ast S_{13}\ast S_{14}-U_{dcn}\ast S_{15}\ast S_{16}\\ I_p=S_1\ast S_2\ast I_a+S_7\ast S_8\ast I_b+S_{13}\ast S_{14}\ast I_c\\ I_n=S_3\ast S_4\ast I_a+S_9\ast S_{10}\ast I_b+S_{15}\ast S_{16}\ast I_c\\ I_o=I_a+I_b+I_c-I_p-I_n\end{array}\right.$$

(7)

where S_1–18 represent the switching signals (0 for off, 1 for on). Based on Equation (7), the equivalent circuit of the switching function model shown in Figure 9 can be constructed.

2.4.2. Time-Averaged Method Processing of Switching Control Signals

Traditional switching functions have only two states (0 and 1). In real-time simulation and controller HIL simulation, they face the same problem as detailed models: the pulse width modulation (PWM) pulses may not align with simulation time steps, causing switching events to occur between steps. EMT simulation programs can only respond to switching events at the end of each time step, leading to switching timing errors that affect simulation accuracy.

Switching timing errors can be reduced by decreasing the simulation step size or introducing methods such as double-interpolation method (DIM) [20], interpolation-extrapolation method (IEM) [21], or post-correction method (PCM) [22]. However, these methods have limitations such as high computational load, potential introduction of artificial harmonics, and difficulty handling multiple switching events.

Reference [23] proposes a time-averaged method (TAM), which averages the switching function over one simulation time step, avoiding the additional delays and artificial harmonics introduced by traditional methods (such as DIM and PCM). The principle of improving the switching function using TAM is illustrated in Figure 10.

According to Equation (8), the switching function is averaged over one simulation step to obtain the equivalent duty cycle:

$$D\left(k∆t\right)={\displaystyle \frac{1}{∆t}}{\int }_{\left(k-1\right)∆t}^{k∆t}S\left(t\right)dt$$

(8)

In real-time simulation, this can be implemented by integrating a switching function integrator at the digital PWM acquisition port to compute the duty cycle in real-time. By averaging, TAM effectively integrates multiple switching events within one step without complex interpolation or extrapolation, thereby improving computational efficiency and reducing harmonic distortion.

3. Construction of Simulation Test Cases

3.1. Three-Phase Three-Level ANPC Converter System

The SPM fast simulation model, ADC switch model and TAM switching function model are used to construct the test cases of three-phase three-level ANPC converter, respectively. The overall system topology is shown in Figure 11.

In Figure 11, U_g is the AC grid-side voltage source, L_g is the grid-side equivalent inductance, R_g is the grid-side equivalent resistance, L_f is the filter inductance, C_f is the filter capacitance, U_dc is the DC-side voltage source, and C_dc is the DC-side capacitor. The detailed system parameters are listed in

Table 3. Detailed parameters of the ANPC converter system.

Parameter		Value
AC Side	Grid-side voltage RMS value	400 V
	Grid-side voltage frequency	50 Hz
	Grid-side equivalent inductance	2.286 × 10−4 H
	Grid-side equivalent resistance	1.436 × 10−2 Ω
	Filter inductor	6.8 × 10−5 H
	Filter capacitor	2.232 × 10−4 F
DC Side	Bus voltage	700 V
	Capacitance	7.875 × 10−3 F

.

When the three-phase three-level ANPC module adopts the SPM fast simulation model or the ADC switch model, the detailed model topology shown in Figure 8 is used. When adopting the TAM switching function model, the switching function model topology shown in Figure 9 is used.

3.2. Control System Model

The three-phase three-level ANPC converter system in this paper employs a typical voltage-current dual-loop control and space vector pulse width modulation (SVPWM) strategy. The control system block diagram is shown in Figure 12.

In Figure 12, u_d and u_q are the d-axis and q-axis components of the grid-side voltage u_abc obtained through Park transformation. u_dref and u_qref are the corresponding voltage reference values. After passing through proportional-integral (PI) blocks, they yield the d-axis reference current i_dref and q-axis reference current i_qref for the inner current loop. These references then pass through PI blocks and inverse Park transformation to obtain the modulation wave ref_abc in the ABC frame for SVPWM, ultimately generating the switching control signals G_s for each IGBT of the three-phase three-level ANPC converter. The SVPWM strategy (taking phase A as an example) is shown in Figure 13, with a switching frequency of 3300 Hz.

3.3. Simulation Results of Each Model

EMT simulation tests are conducted on the constructed three-phase three-level ANPC converter system under both steady-state and transient operating conditions. Considering the small-step limitation of the ADC switch model, the simulation step size is uniformly set to 2 μs. The equivalent admittance Y_SW for the ADC switch model is set to 0.15 according to the method proposed in Reference [24].

The simulation results under steady-state operation for each model are shown in Figure 14. The steady-state voltage and current waveforms demonstrate that all models capture the fundamental behavior of the ANPC converter. Compared to the benchmark IM model, the SPM model shows the highest accuracy, with nearly overlapping waveforms and minimal deviation. The ADC model introduces slight distortions in the current waveform due to its L/C equivalent representation of switches, particularly around the peak. The TAM-based switching function model produces the smoothest waveforms with the lowest harmonic distortion, as it averages switching actions within each time step. This makes it particularly suitable for system-level studies where detailed switching ripple is not critical.

A single-phase short-circuit fault is applied at 2 s to further verify the dynamic response performance of each model under transient operating conditions. The simulation results are shown in Figure 15. The results show that all models correctly capture the dynamic response during the fault event at t = 2 s. The voltage sag and subsequent current increase are consistently represented across all approaches. The SPM and IM models show almost identical responses, confirming the validity of the prediction method. The ADC model exhibits slight fluctuations during transient processes, which can be attributed to the artificial transients introduced by the L/C equivalent admittance parameter. The TAM model demonstrates a smoother transient with no high-frequency oscillations, as expected from its averaging nature. Despite these differences, all models successfully replicate the key dynamic phenomena, and the controller’s fault response remains consistent across all cases, validating their applicability for controller HIL testing.

The simulation accuracy of each model is quantified by the maximum relative error, calculated relative to the benchmark IM model. The error is defined as the maximum value of the instantaneous absolute error divided by the corresponding instantaneous value of the IM model within a 1-s time window. A comparison of simulation accuracy and efficiency for each model is presented in

Table 4. Comparison of simulation accuracy and efficiency for each model.

Model Type	Maximum Relative Error 1		Time Consuming of 10 s Simulation	Speedup
	Steady-State	Transient
IM Model	/	/	28.92 s	/
SPM Model	0.0047%	0.0179%	6.99 s	4.14
ADC Model	3.36%	13.39%	4.96 s	5.83
TAM Model	2.42%	2.62%	4.52 s	6.40

¹ The maximum relative error is defined as $\mathrm{m}\mathrm{a}\mathrm{x}\left({\displaystyle \frac{\left|X_{model}-X_{IM}\right|}{\left|X_{IM}\right|}}\right)$ over a 1-s time window, where $X$ represents the instantaneous voltage or current.

.

For the relative error of all instantaneous values within a window length, results near the zero-crossing point tend to be larger. As shown in Table 4, the ADC model exhibits the lowest accuracy, with a maximum relative error reaching 13.39%. This is attributed to the introduction of small inductors and capacitors, which are prone to generating additional oscillations. The TAM switching function model offers higher simulation efficiency. Compared to the traditional detailed switch model, the speedup ratio reaches 6.4:1. Moreover, the TAM model’s maximum relative error of 2.62% is within an acceptable range, ensuring good simulation accuracy.

The results underscore a clear trade-off between accuracy and computational burden: while the SPM model achieves superior accuracy, it requires more computational resources; conversely, the TAM model sacrifices minimal accuracy for substantially improved simulation speed, making it better suited for real-time HIL testing. Considering the above factors comprehensively, this paper adopts the TAM switching function model to construct the three-phase three-level ANPC converter, and carries out the HIL simulation test of a physical controller.

4. Real-Time Simulation and HIL Application

4.1. HIL Simulation Test Platform

In this paper, the TAM switching function model and the HIL simulation system of the ANPC converter are constructed on the CloudPSS platform [25], which consists of a CloudPSS ProRT real-time simulator, a CloudPSS I/O Signal Hub (signal interface device), and a physical controller of the ANPC converter, as shown in Figure 16. The hardware connection principle is shown in Figure 17.

The CloudPSS ProRT real-time simulator uses an AMD Ryzen 7000 series CPU for simulation calculations, runs on a single core, and is equipped with CloudPSS EMT simulation software version v4.5. It is also equipped with an FPGA (7K325T) for communication, which is connected to the CloudPSS I/O Signal Hub via optical fiber. The Signal Hub performs digital-to-analog conversion, outputting analog signals such as voltage and current required by the ANPC converter controller. The converter controller samples and processes these analog signals to generate PWM control signals. These signals undergo TAM processing via the switching function integrator embedded in the Signal Hub and are then transmitted back to the switching function model within the real-time simulator via optical fiber, forming a closed-loop test environment.

The real-time simulation step size of the HIL simulation system is 5 μs. The averaging period for the switching function is 5 μs, and the sampling period of the switching function integrator embedded in the Signal Hub is 10 ns.

4.2. HIL Simulation Test Results

4.2.1. Symmetrical Fault Condition

Voltage drops of varying degrees are applied in the HIL simulation system to test the low-voltage ride-through (LVRT) capability of the ANPC converter controller under symmetrical fault conditions. The HIL simulation results are shown in Figure 18.

In Figure 18a, the voltage drops to 20% for a fault duration of 625 ms. In Figure 18b, the voltage drops to 50% for a fault duration of 1214 ms. Under both faults, the converter system can operate continuously without disconnecting from the grid and can recover well to its pre-fault operating state after fault clearance, meeting the expected results. This verifies the effectiveness of the constructed ANPC converter switching function model in real-time simulation and HIL applications, and also validates the LVRT capability of the controller under test.

4.2.2. Asymmetrical Fault Condition

Single-phase short-circuit to ground and phase-to-phase short-circuit to ground faults are applied in the HIL simulation system to test the fault ride-through capability of the ANPC converter controller under asymmetrical fault conditions. The HIL simulation results are shown in Figure 19.

In Figure 19a, phase A experiences a short-circuit to ground for a fault duration of 180 ms. In Figure 19b, phases A and B experience a phase-to-phase short-circuit to ground for a fault duration of 180 ms. Under both faults, the converter system can operate continuously without disconnecting from the grid and can recover well to its pre-fault operating state. The simulation results further verify the effectiveness of the constructed ANPC converter switching function model and validate the asymmetrical fault ride-through capability of the controller under test.

5. Conclusions

This paper focuses on the three-phase three-level ANPC converter within new energy generation systems, investigating efficient EMT simulation model construction methods. The SPM fast simulation model, the ADC switch model, and the TAM switching function model are constructed, respectively.

A simulation system for the three-phase three-level ANPC converter is built, and the efficiency–accuracy trade-off in the EMT modeling of the ANPC converter is systematically evaluated. Rigorous comparative validation reveals that SPM achieves exceptional accuracy (≤0.005% steady-state error, ≤0.018% transient error), while TAM delivers optimal computational efficiency with 6.4× acceleration versus conventional models while maintaining ≤2.62% error—rendering it ideal for real-time applications.

Based on the TAM switching function model, a HIL simulation system and test platform for the controller of the three-phase three-level ANPC converter are constructed. HIL simulation test results demonstrate that under both symmetrical and asymmetrical fault conditions, the converter system can operate continuously without disconnecting from the grid and can recover well to its pre-fault operating state after fault clearance. This validates the effectiveness of the constructed ANPC converter switching function model in real-time simulation and HIL applications, as well as the fault ride-through capability of the controller under test.

Future work will focus on employing the proposed TAM switching function model and HIL test platform for impedance-based stability analysis of grid-tied ANPC converters, further evaluating their dynamic interaction under weak grid conditions. Additionally, the proposed methodology can be extended to large-scale grid disturbance analysis applications. The research findings of this paper also hold reference value for converters with other types of topologies.