Control Design, Stability Analysis and Experimental Validation of New Application of an Interleaved Converter Operating as a Power Interface in Hybrid Microgrids

Abstract

This paper presents a new and specific use of a bidirectional interleaved converter to perform a power interface in hybrid microgrids. The converter is responsible for regulating the power flow between the direct-current (DC) microgrid and the rest of the hybrid microgrid by controlling the DC microgrid voltage. The authors present a detailed modeling of the mentioned system in order to develop the system control design and a stability analysis. In addition, the authors propose a new control design strategy aiming at improving the voltage control disturbance rejection characteristic, while maintaining a good dynamic behavior regarding the reference tracking functionality. In this hybrid microgrid topology, a back-to-back converter connects the main grid to the AC microgrid. The main objective of this converter is to provide a high-power-quality voltage to critical and sensitive loads connected to the microgrid. The interleaved converter adjusts the DC microgrid voltage according to the operational voltage of the back-to-back converter DC link. In the DC microgrid case, the variation of load and generation connection could lead to serious voltage sag and oscillations that could be harmful to the sensitive loads. The voltage controller must be capable of rejecting these disturbances in order to maintain a high-power-quality voltage. Furthermore, experimental results are provided in order to validate this specific application of the interleaved converter and the presented control design strategy.

1. Introduction

Over the years, many different studies related to microgrids have been developed due to the high increase of the distributed generation penetration in the electrical systems [1,2,3,4,5,6], which is a consequence of the advances that have been occurring with the solar and wind generation systems and with power electronics technology. When designed in the alternating-current (AC) form, the microgrid might present some power quality issues related to harmonic currents and voltages, as well as related to frequency regulation [4,5,6].

DC microgrids are widely used in telecommunication systems as well as in electric vehicles [2] and have been proposed in order to solve some of the mentioned problems related to the AC microgrids [5,6,7,8], besides allowing for a better integration of DC systems and devices such as the photovoltaic generation, energy storage systems and electronic loads [5,6,7]. In this context, many works have been published proposing the use of hybrid microgrids [2,3,9,10,11,12,13] aiming at taking advantage of the benefits of both AC and DC microgrids.

A method for implementing such a system was proposed in [10] in which the DC link of a back-to-back converter is used to form the DC microgrid. The mentioned back-to-back converter acts as a power interface between the main grid and the AC microgrid. This topology may require the use of an additional DC–DC converter in order to perform a power interface between the back-to-back converter DC link and the DC microgrid while maintaining its voltage regulated in the desired level, which may be different from the back-to-back converter DC-link voltage.

The N-phase bidirectional interleaved converter is a static converter with high reliability since it can keep operating even if one of its phases is damaged or suffers a fault [14,15]. Another important characteristic of this topology is the possibility of ripple reduction in the output current, obtained through the proper modulation strategy [16,17,18,19]. This fact leads to a reduction of the output DC capacitor, resulting in a lighter and more compact solution.

The interleaved converter has been used in many different applications that require a regulated power source with high reliability and low weight. Most of these applications are related to energy storage systems and electric vehicles [20,21,22,23,24,25,26,27,28,29,30,31].

Most of the applications found in the literature of interleaved converters in microgrids are related to the connection of DC loads, energy storage systems or generation sources to a microgrid [32,33,34,35,36]. To the authors’ knowledge, no other work has reported the use of an interleaved converter as a power interface between microgrids.

This paper proposes the use of a three-phase interleaved converter in order to form the DC microgrid voltage profile while controlling the power flow between the DC microgrid and the rest of the hybrid microgrid. Since the DC microgrid voltage level is supposed to remain constant, the voltage control must be designed in such a way to be more effective in rejecting load disturbances rather than tracking the provided reference. In other words, the voltage reference will remain constant, but the control must be very effective in handling the load and generation variations that might occur in the DC microgrid. Those variations could produce severe voltage sags and fluctuations that could be serious to sensitive loads present in the DC microgrid. Thus, a new method for tuning the voltage controller parameters, in order to obtain a fast disturbance rejection characteristic, is proposed aiming at maintaining a high-power quality microgrid voltage.

Some of the ideas expressed in this paper were first introduced by the authors in [37]. However, in the present paper, a more detailed explanation on the system modeling and a deeper stability analysis are developed proving the enhancement on the converter disturbance rejection capability. In addition, this paper presents experimental results that validate the proposed interleaved converter application.

2. System Topology

The analysis carried out in this paper is based on the application of an interleaved converter as a power interface in a hybrid microgrid. In other words, taking into account the hybrid microgrid depicted in Figure 1, the interleaved converter operates regulating the DC-microgrid voltage level according to a given back-to-back converter operational DC-link voltage. The back-to-back converter mentioned connects the main grid to an AC microgrid. This hybrid microgrid topology could be suited for applications in remote areas with a low-power-quality main-grid voltage, in which the back-to-back converter would be responsible for generating a high-power-quality AC microgrid voltage, despite the main-grid-voltage power quality, in order to protect local sensitive loads. The interleaved converter acts as the interface with the local DC microgrid that operates with a different voltage level in relation to the DC link of the back-to-back converter. In addition, the interleaved converter control can improve the microgrid voltage profile by rejecting load disturbances as will be further explained later in this paper.

3. Interleaved Converter Modeling

The N-phase bidirectional interleaved converter, described in the previous section, can be modeled as the equivalent circuit shown in Figure 2. In this figure, each of the interleaved converter phases is represented by its inductor parameters $(L_1,L_2,\dots ,L_N$ and $R_1,R_2,\dots ,R_N)$ and by controlled voltage sources with values equal to the product of the duty cycles $(d_1,d_2,\dots ,d_N)$ by the input voltage $\left(v_g\right)$, which is the main back-to-back converter DC-link voltage. Finally, an equivalent capacitance $\left(C\right)$, which represents the total output DC-link capacitance, along with an equivalent resistance $\left(R_c\right)$, which represents the balancing resistors, compose the interleaved converter’s output-DC-link model, as shown in Figure 2. The DC-microgrid load and generation are represented by a current source with the value equal to $i_{dc}$.

Using the interleaved converter equivalent circuit (neglecting the balancing resistor ($R_c$)), the average large signal model is obtained through the Kirchhoff’s laws, as shown in (1) and (2), in which N is the interleaved converter number of phases and $k=1,\dots ,N$ represents a given phase k:

$$-d_k{v}_g+L_k\frac{d{i}_{Lk}}{dt}+R_k{i}_{L_k}+v_c=0,$$

(1)

$$\sum _{k=1}^N{i}_{L_k}-i_o-C\frac{d{v}_c}{dt}=0.$$

(2)

Equations (1) and (2) can be represented in the Laplace-s domain as follows:

$$-d_k\left(s\right)V_g+(L_{k}s+R_k)I_{L_k}\left(s\right)+V_c\left(s\right)=0,$$

(3)

$$\sum _{k=1}^N{I}_{L_k}\left(s\right)-I_o\left(s\right)-Cs{V}_c\left(s\right)=0.$$

(4)

The phase inductors must be as similar as possible in order to avoid an uneven current flow through the phases. This fact leads to the following approximation: $L_1=L_2=\cdots =L_N=L$ and $R_1=R_2=\cdots =R_N=R$. Applying the mentioned approximation into (3) and summing all the N equations (corresponding to $k=1,\dots ,N$) leads to:

$$-\sum _{k=1}^N{d}_k\left(s\right)V_g+(Ls+R)\sum _{k=1}^N{I}_{L_k}\left(s\right)+N{V}_c\left(s\right)=0.$$

(5)

Considering that ideally $V_g$ is constant, the topology results in a MIMO (multiple input multiple output) system with the state variables as outputs $(I_{L1},I_{L2},\dots ,I_{LN}$ and $V_c)$ and the phase duty cycles $(d_1,d_2,\dots ,d_N)$ along with the load current $\left(I_o\right)$ as inputs. Then, if it is desirable to analyze the effect of a single input (for example a given duty cycle $d_n$ of a given phase n) on the system dynamics, all the other inputs must be set to zero. In other words, $d_k\left(s\right)=0,\forall k\ne n$ and $I_o\left(s\right)=0$. Thus, Equation (5) can be rewritten as:

$$-d_n\left(s\right)V_g+(Ls+R)\sum _{k=1}^N{I}_{L_k}\left(s\right)+N{V}_c\left(s\right)=0.$$

(6)

Moreover, Equation (4) can be rewritten as:

$$\sum _{k=1}^N{I}_{L_k}\left(s\right)=Cs{V}_c\left(s\right).$$

(7)

By substituting (7) into (6), the following equation is obtained:

$$-d_n\left(s\right)V_g+(CL{s}^2+CRs+N)V_c\left(s\right)=0.$$

(8)

Using (3) for the given phase n leads to:

$$V_c\left(s\right)=d_n\left(s\right)V_g-(Ls+R)I_{L_n}\left(s\right).$$

(9)

The substitution of (9) into (8) leads to the following transfer function, representing the relation between duty cycle and phase current:

$$\frac{I_{L_n}\left(s\right)}{d_n\left(s\right)}=\frac{V_g}{(Ls+R)}\frac{(CL{s}^2+CRs+(N-1))}{(CL{s}^2+CRs+N)}.$$

(10)

Finally, since $L_1=L_2=\cdots =L_N=L$, (4) can be approximated by the following equation:

$$N{I}_{L_n}\left(s\right)-I_o\left(s\right)-Cs{V}_c\left(s\right)=0.$$

(11)

If the load current disturbance $\left(I_o\right)$ is neglected, the following transfer function can be obtained:

$$\frac{V_c\left(s\right)}{I_{L_n}\left(s\right)}=\frac{N}{Cs}.$$

(12)

4. Control Design

The control strategy used in this paper is based on two control loops as shown in Figure 3. An outer voltage loop that is responsible for the output DC-bus voltage (DC Bus 2) regulation and an inner current loop that is responsible for the phase currents’ regulation. The current control is accomplished using different controllers for each phase current with phase-shifted modulating carriers, which leads to balanced and stable currents.

4.1. Conventional Control Design

In order to design the current controllers and voltage controller parameters, the transfer functions described in (10) and (12) are used as shown in the block diagram depicted in Figure 4.

The proximity of the roots of $CL{s}^2+CRs+(N-1)$ and $CL{s}^2+CRs+N$ can lead to a simplification of the transfer function (10). In other words, these poles and zeros are close to each other in such a way that their effects in the system dynamic behavior cancel each other out. Thus, if these poles and zeros are neglected, (10) can be approximated by the following transfer function:

$$\frac{I_{L_n}\left(s\right)}{d_n\left(s\right)}=\frac{V_g}{(Ls+R)}.$$

(13)

Therefore, the current loop of the system shown in Figure 4 can be represented by the block diagram shown in Figure 5.

The methodology proposed by Gao in [38], which is a general control design technique, suggests the tuning of the controller parameters in such a way that the system closed-loop transfer function operates with the desired bandwidth (${\omega }_c$). In the present case, the current controller parameters are designed as follows:

$$k_{pc}=\frac{{\omega }_{c}L{I}_{base}}{V_g},$$

(14)

and

$$k_{ic}=\frac{{\omega }_{c}R{I}_{base}}{V_g}.$$

(15)

In other words, if the controller parameters are designed according to (14) and (15) and applied to the model depicted in Figure 5, the resulting current control closed-loop transfer function will be:

$$\frac{I_{L_n}}{I_L^{\ast }}=\frac{{\omega }_c}{s+{\omega }_c}.$$

(16)

This is the transfer function of a low-pass filter with the desired bandwidth $\left({\omega }_c\right)$. Thus, the outer control loop (voltage control) will be described by the block diagram depicted in Figure 6.

In order to analyze if the approximation made (to neglect the poles $CL{s}^2+CRs+N$ and zeros $CL{s}^2+CRs+(N-1)$) is acceptable, a comparison was made between the designed bandwidth ${\omega }_c$ and the actual bandwidth obtained considering the complete transfer function without the mentioned approximation. This comparison is shown in Figure 7, in which the ratio $\frac{{\omega }_{-3dB}}{{\omega }_c}$ is plotted as a function of the number of phases N.

In Figure 7, one can notice that, for every value of N, the obtained bandwidth is approximately 4% higher than the designed bandwidth $\left({\omega }_c\right)$. This small difference is due to the fact that the mentioned poles and zeros were disregarded when designing the current controller’s parameters using Gao’s method. The authors consider that this small bandwidth difference is acceptable and will not have much influence on the design accuracy.

The control theory literature widely reports that, in a cascade control topology, inner control loops must be considerably faster than outer control loops. In the present case, it means that the voltage loop bandwidth $\left({\omega }_v\right)$ must be considerably smaller than the current control bandwidth $\left({\omega }_c\right)$. In this context, the design criteria ${\omega }_v=\frac{{\omega }_c}{10}$ is used in this paper. Thus, from the voltage loop controller design point of view, the current loop dynamics can be neglected (the closed loop transfer function is approximated by a unitary gain) as will be shown later.

In order to design the voltage controller parameters, the output DC-link balancing resistor $\left(R_c\right)$ must be taken into account, so that it is possible to apply the method presented in [38]. Thus, (4) can be written as:

$$\sum _{k=1}^N{I}_{L_k}\left(s\right)-I_o\left(s\right)-Cs{V}_c\left(s\right)-\frac{V_c}{R_c}=0.$$

(17)

The transfer function (12) becomes:

$$\frac{V_c\left(s\right)}{I_{L_n}\left(s\right)}=\frac{N}{Cs+\frac{1}{R_c}}.$$

(18)

Through the block diagram shown in Figure 8 and once again using the method described in [38], the voltage controller parameters can be defined as shown in (19) and (20):

$$k_{pv}={\omega }_v\frac{C}{N}\frac{V_{base}}{I_{base}},$$

(19)

and

$$k_{iv}={\omega }_v\frac{1}{R_{c}N}\frac{V_{base}}{I_{base}}.$$

(20)

Using these controller parameters, the voltage loop will have the dynamic behavior related to the desired bandwidth $\left({\omega }_v\right)$; in other words, the closed-loop transfer function will be: $\frac{V_c}{V_c^{\ast }}=\frac{{\omega }_v}{s+{\omega }_c}$.

4.2. Proposed Control Design Method

According to the methodology presented in the previous subsection, the voltage control will have the desired dynamic behavior related to the bandwidth ${\omega }_v$. The mentioned dynamics are related to the voltage control reference tracking ability.

However, in the present application, one should notice that a more important functionality of the interleaved converter voltage control is that of rejecting load disturbances. In other words, the voltage control reference (output DC-link voltage reference) is constant in this application. It means that, once the output DC-link voltage reaches its reference value, the voltage controller will not need to apply much control effort in order to track the reference. It is very important that it can reject disturbances related to power variations demanded by the DC microgrid though.

Thus, a transfer function with the load current $\left(I_o\right)$ as an input and with the output DC-link voltage $\left(V_c\right)$ as an output is required. This transfer function can be obtained through (4), taking into account the load current $\left(I_o\right)$, leading to the block diagram shown in Figure 9.

In Figure 9, $Y\left(s\right)$ is described as follows:

$$Y\left(s\right)=\left(k_{pv}+\frac{k_{iv}}{s}\right)\frac{{\omega }_c}{s+{\omega }_c}.$$

(21)

Setting the voltage reference to zero $(v_c^{*}=0)$ in Figure 9 and using (21), the closed-loop transfer function describing the effect of the load disturbance on the output voltage is obtained:

$$\frac{V_c\left(s\right)}{I_o\left(s\right)}=\frac{\frac{1}{Cs}}{1+\frac{N{I}_{base}}{V_{base}}\frac{Y\left(s\right)}{Cs}}.$$

(22)

Equation (22) can be rewritten as:

$$\frac{V_c\left(s\right)}{I_o\left(s\right)}=\frac{\frac{s(s+{\omega }_c)}{C}}{s^3+{\omega }_c{s}^2+\left(\frac{N{I}_{base}{\omega }_c{k}_{pv}}{V_{base}C}\right)s+\frac{N{I}_{base}{\omega }_c{k}_{iv}}{V_{base}C}}.$$

(23)

In this paper, the authors propose the following new method for tuning the voltage controller integral gain:

$$k_{iv}=\frac{\gamma {\omega }_{v}C}{N}\frac{V_{base}}{I_{base}}.$$

(24)

By substituting (19) and (24) into (23), the following characteristic equation is obtained:

$$s^3+{\omega }_c{s}^2+{\omega }_v{\omega }_{c}s+\gamma {\omega }_v{\omega }_c=0.$$

(25)

Through (25), one can design the voltage control behavior, regarding the disturbance rejection functionality, as a function of the parameters ${\omega }_v$, ${\omega }_c$ and $\gamma$, independently of the plant parameters C and N, and of the electrical quantities’ base values. In other words, two different converters with different electrical parameters could operate with the same reference tracking and disturbance rejection dynamic behavior if equal values of the parameters $k_{pc}$, $k_{ic}$, $k_{pv}$, $k_{iv}$ and $\gamma$ are used.

An interesting fact is that it is possible to tune the parameter $\gamma$ in order to obtain a robust dynamic response, regarding disturbance rejection, while only slightly changing the control dynamics regarding the reference tracking functionality, as will be shown later in this paper. In other words, Gao’s tuning method allows one to design the controllers’ parameters in order to obtain the proper reference tracking dynamics. Then, the proposed method allows one to reset the controller’s integral parameter (kiv), maintaining a dynamic behavior similar to the original one, regarding the reference tracking functionality, while considerably improving the system’s disturbance rejection characteristic, which is essential for this application.

5. Stability Analysis

As previously mentioned, after using Gao’s method to tune the parameters ${\omega }_c$ and ${\omega }_v$ and obtain the desired reference tracking dynamics, one can plot a root locus of the system (using (25)) as a function of the parameter $\gamma$ in order to also obtain the desired dynamic behavior regarding the disturbance rejection functionality. The mentioned root locus is shown in Figure 10.

By analyzing Figure 10, one can notice that, as the value of $\gamma$ increases, there is a dominant pole that moves away from the system origin towards the left side of the root locus and that eventually encounters the other pole as they become a pair of complex conjugate poles. In other words, it means that the system dynamics, regarding disturbance rejection, becomes faster as the value of $\gamma$ increases, and eventually starts to oscillate. This analysis provides a good direction of how to correctly tune the parameter $\gamma$ in order to obtain the desired behavior.

However, this analysis is not enough to describe the entire system’s dynamic behavior. As previously mentioned, this is a MIMO system in which the disturbance current $\left(I_o\right)$ and the duty cycles $\left(d_n\right)$ are inputs and the output DC-link voltage $\left(V_c\right)$ and output current $\left(I_{LL}\right)$ are outputs. In other words, the load disturbance $\left(I_o\right)$ directly affects the output DC-link voltage $\left(V_c\right)$, but also indirectly affects the output DC-link voltage $\left(V_c\right)$ through the output current $\left(I_{LL}\right)$, which affects the duty cycle $\left(d\right)$ disturbing the output DC-link voltage $\left(V_c\right)$. In order to completely describe the system’s dynamic behavior, the block diagram depicted in Figure 11 must be considered.

In order to obtain each of the transfer functions represented in Figure 11, a mean value model of (3) and (4) must be considered as follows:

$$-d\left(s\right)V_g+\frac{(Ls+R)}{N}{I}_{LL}\left(s\right)+V_c\left(s\right)=0,$$

(26)

$$I_{LL}\left(s\right)-I_o\left(s\right)-Cs{V}_c\left(s\right)=0.$$

(27)

By setting $I_o\left(s\right)=0$, the following transfer functions can be obtained through (26) and (27):

$$\frac{V_c\left(s\right)}{d\left(s\right)}{|}_{I_o\left(s\right)=0}=\frac{N{V}_g}{LC{s}^2+RCs+N},$$

(28)

$$\frac{I_{LL}\left(s\right)}{d\left(s\right)}{|}_{I_o\left(s\right)=0}=\frac{NC{V}_{g}s}{LC{s}^2+RCs+N}.$$

(29)

By setting $d\left(s\right)=0$, the following transfer functions can be obtained through (26) and (27):

$$\frac{V_c\left(s\right)}{I_o\left(s\right)}{|}_{d\left(s\right)=0}=\frac{-(Ls+R)}{LC{s}^2+RCs+N},$$

(30)

$$\frac{I_{LL}\left(s\right)}{I_o\left(s\right)}{|}_{d\left(s\right)=0}=\frac{N}{LC{s}^2+RCs+N}.$$

(31)

By setting $V_c^{*}=0$ in Figure 11 and using (28), (29), (30) and (31), it is possible to obtain the desired transfer function $\frac{V_c\left(s\right)}{I_o\left(s\right)}{|}_{V_c^{*}\left(s\right)=0}$.

However, this is a really complex transfer function to obtain analytically; therefore, the authors implemented the block diagram shown in Figure 11 on Simulink (MATLAB R2018b) and used the linear analysis tools to obtain the root locus, Bode and Nyquist plots depicted in Figure 12.

The curves represented in Figure 12a–e are related to the transfer function $\frac{V_c\left(s\right)}{I_o\left(s\right)}{|}_{V_c^{\ast }\left(s\right)=0}$. The curves represented in Figure 12f,g are related to the transfer function $\frac{I_{LL}\left(s\right)}{I_o\left(s\right)}{|}_{V_c^{\ast }\left(s\right)=0}$. The curves represented in Figure 12h–j are related to the transfer function $\frac{V_c\left(s\right)}{V_c^{\ast }\left(s\right)}{|}_{I_o\left(s\right)=0}$.

In Figure 12a,b, one can analyze the disturbance rejection Bode plot as a function of ${\omega }_c$ using $\gamma =\frac{{\omega }_c}{10}$. It is clear that the faster the current control is, the better the disturbance rejection capability becomes (higher negative gain, meaning that, for the same value of load disturbance $\left(I_o\right)$, less impact is caused to the output voltage $\left(V_c\right)$). For the following analysis, the authors chose ${\omega }_c=1000\pi =2\pi \frac{F_s}{10}$ that is a safe value in relation to the switching frequency $F_s=5$ kHz. Thus, the voltage control bandwidth is chosen as follows: ${\omega }_v=\frac{{\omega }_c}{10}=100\pi$.

By analyzing the dominant poles as a function of the parameter $\gamma$ of the root locus represented in Figure 12c, one can notice that, in fact, as $\gamma$ increases, the system response becomes faster, but it also becomes more oscillatory.

In Figure 12d,e, one can analyze the disturbance rejection Bode plot as a function of $\gamma$. It becomes clear that, as the value of the parameter $\gamma$ increases, the system disturbance rejection capability increases as well. In other words, the system gain reduces, meaning smaller variation in $V_c\left(s\right)$ for a given input value of $I_o\left(s\right)$, and the Bode curves’ cutoff frequencies become higher, meaning faster response, resulting in a more robust system. For high values of $\gamma$, resonance peaks appear reflecting the complex poles shown in Figure 12c.

In Figure 12f,g, one can observe the effect of the load disturbance $\left(I_o\left(s\right)\right)$ on the output current $\left(I_{LL}\left(s\right)\right)$ for different values of $\gamma$. It is clear that, as the value of $\gamma$ increases, the output current becomes more oscillatory, as will be shown later in the experimental results.

In Figure 12h,i, one can analyze the reference tracking Bode plot as a function of $\gamma$. It is interesting to notice that it is possible to considerably increase the value of $\gamma$, improving the voltage-control disturbance-rejection functionality (see Figure 12d), while only slightly changing the reference tracking Bode curves in comparison to the curve obtained using Gao’s tuning method (see Figure 12h). One can compare, for example, the Bode plots referenced as $Gao$ $Method$ and as $\gamma =\frac{{\omega }_c}{50}$ in Figure 12d and in Figure 12h. In Figure 12d, the Bode curves referenced as $Gao$ $Method$ and as $\gamma =\frac{{\omega }_c}{50}$ are very different (meaning considerable disturbance rejection improvement), while, in Figure 12h, the Bode curves referenced as $Gao$ $Method$ and as $\gamma =\frac{{\omega }_c}{50}$ are quite similar (meaning small variation in the reference-tracking behavior). In other words, through the $k_{iv}$ tuning method proposed in this paper, one can improve the disturbance rejection capability while barely changing the reference tracking behavior. Of course, as the value of $\gamma$ increases, at a certain point, the reference tracking behavior starts to become poorly damped, moving towards instability. This fact is related to the resonance peaks shown in Figure 12h and can be confirmed by analyzing Figure 12j that shows the system phase margins as a function of $\gamma$, through Nyquist plots.

6. Simulation Results

6.1. Hybrid Microgrid Operating with Bidirectional Power Flow

The first simulation results are obtained using the software PSCAD/EMTDC (v4.6.0) and implementing the entire hybrid microgrid as shown in Figure 13. In this simulation, there are loads and distributed generation (DG) sources in both AC and DC microgrids in such a way that a bidirectional power flow occurs between the AC microgrid and the main grid, and between the DC microgrid and the rest of the hybrid microgrid.

The parameters used in this simulation are the ones shown in

Table 1. Parameters used in PSCAD/EMTDC simulation.

Parameter	Value
N	3
$V_g$	980 V
$V_c^{\ast }$	450 V
L	2.5 mH
C	9.3 μF
R	0.0 Ω
$V_{base}$	450 V
$I_{base}$	124 A
$P_{base}$	56 kW
${\omega }_v$	$100\pi$ rad/s
${\omega }_c$	$1000\pi$ rad/s
$\gamma$	$\frac{{\omega }_c}{10}$

. The microgrid rated power is equal to $P_{base}=56$ kW, which is ten times higher than the one of the experimental test bench of the present work. In this simulation, the authors wanted to reproduce high power variations, leading to high output-voltage disturbances.

As one can see, Figure 14, Figure 15 and Figure 16 show the simulation results related to the bidirectional operation of the DC microgrid receiving/exporting power from/to the rest of the hybrid microgrid. The signals presented in these figures are a result of a variety of connections and disconnections of different loads and generation sources to both AC and DC microgrids. A positive value of power means power being consumed by the DC microgrid loads and negative values of power means power being exported from the DC microgrid to the rest of the hybrid microgrid.

At $t=1.7$ s, a power flow reversion occurs. Right before this instant, the AC microgrid load and generation sources were all disconnected and all the DC microgrid sources were generating and exporting power (1 pu). After $t=1.7$ s, simultaneously, all the generation sources in the DC microgrid are disconnected and all the loads in the DC microgrid are connected. This corresponds to a really severe power step to the DC microgrid, resulting in a very severe voltage disturbance to the output-DC-link capacitors. This severe disturbance is imposed to the system in order to test the control disturbance rejection dynamics.

By analyzing Figure 15 and Figure 16 (zoom of the power flow inversion instant of Figure 15), one can notice that the output voltage $\left(v_c\right)$ only suffers a small sag of approximately 11% and recovers to 1 pu in about 10 ms with an overshoot of about 1.7%, after suffering from the power flow inversion. This result shows the high-disturbance-rejection characteristic obtained by tuning the voltage controller’s parameter using the proposed technique. This high-power-quality microgrid voltage is very important when feeding power to sensitive loads.

6.2. Evaluation of the Proposed Voltage Controller’s Design Technique in a Simulation Environment

A simulation was carried out in Simulink/MATLAB, using the block diagram depicted in Figure 11. The parameters used are described in

Table 2. Parameters used in Simulink/MATLAB simulation.

Parameter	Value
N	3
$V_g$	360 V
L	2.5 mH
C	1.175 mF
R	0.0 Ω
$V_{base}$	200 V
$I_{base}$	28 A
${\omega }_v$	$100\pi$ rad/s
${\omega }_c$	$1000\pi$ rad/s

. The results are shown in Figure 17 and Figure 18. At $t=5$ s, a load step is imposed on the system in the form of a current source corresponding to a 5.6 kW step.

In Figure 17, it is possible to analyze the output voltage $\left(V_c\right)$ behavior for different values of $\gamma$. These results are in accordance with the root locus and Bode plot presented in Figure 12c and Figure 12d, respectively, since the disturbance rejection is improved (smaller voltage sag and faster recovery time) as $\gamma$ increases and, at a certain point, the voltage behavior becomes oscillatory. These results will be compared to the experimental results later in this paper.

In Figure 18, one can notice that the system’s disturbance rejection behavior using $\gamma =\frac{{\omega }_c}{100}$, which is the value of gamma related to the proposed control method with the slowest response, is still much faster than the behavior obtained when the voltage controller’s parameters are designed using Gao’s method. Gao’s method only takes into account the system’s reference tracking behavior and disregards that of the disturbance rejection.

7. Experimental Results

The experimental validation of the proposed topology and proposed method for designing the controller’s parameters was executed using an experimental setup according to the diagram shown in Figure 19 with a three-leg interleaved converter (n = 3).

The main goal of the experimental results is to validate the proposed control design method aiming at improving the voltage controller disturbance rejection functionality. Thus, only unidirectional power flow is taken into account, through the connection and disconnection of a resistive load in the DC microgrid. In order to generate the DC-link voltage ($V_g=$ 360 V), a full bridge diode rectifier is used. Moreover, a three-phase variable autotransformer is used in order to increase the AC voltage to a level corresponding to the DC-rectified voltage equal to 360 V. A contactor is used to connect and disconnect the resistive load $\left(R_o\right)$ to the DC microgrid in order to produce power steps that disturb the output DC voltage $\left(v_c\right)$. The voltage controller, tuned according to the proposed method, should be able to reject these disturbances.

In this test bench, the components described in

Table 3. Experimental test-bench parameters.

Component	Value
$L_k$	2.5 mH
C	1.175 mF
$R_c$	47.0 kΩ
$R_o$	7.5 Ω

were used. Moreover, the output DC-link voltage reference $\left(v_c^{\ast }\right)$ has a value equal to 200 V, which leads to an output current $\left(i_o\right)$ of approximately 27 A and an output power $\left(P_o\right)$ of approximately $5.6$ kW, since the load resistance $R_o$ has the value equal to $7.5$ Ω. The results are obtained with ${\omega }_v=100\pi$ rad/s and ${\omega }_c=1000\pi$ rad/s. A picture of the experimental setup is shown in Figure 20.

7.1. Transient Operation Caused by Load Connection

In this subsection, experimental results are shown in order to verify the system’s dynamic behavior for different values of the parameter $\gamma$. In other words, the output voltage $\left(v_c\right)$, the output power $\left(P_o\right)$, the phase-1 current $\left(i_{L1}\right)$, the reduced-ripple output current $\left(i_{LL}\right)$ and the load current $\left(i_o\right)$ are shown during a transient situation caused by the connection of the load $\left(R_o\right)$.

By analyzing Figure 21, one can notice that, for the different applied values of $\gamma$, the real system behaves according to the expected from the root locus and Bode plots presented in Figure 12c,d, respectively, demonstrating the proposed tuning technique’s efficiency. In other words, as the value of $\gamma$ increases, the voltage sag amplitude decreases and the voltage recovery time becomes faster. However, as $\gamma$ increases, the signals’ oscillatory behavior increases as well, since the complex conjugate poles’ values become higher. It is important to notice that these results are very similar to the ones obtained in the simulation results.

It is also important to analyze the output current $\left(I_{LL}\right)$ behavior for different values of $\gamma$, which reflects the expected from the Bode plot shown in Figure 12f. In other words, for $\gamma =\frac{{\omega }_c}{2}$ and $\gamma =\frac{{\omega }_c}{1}$, the output current presents an undesired oscillatory behavior, with considerably high overshoots, that could exceed components’ current limits.

7.2. Microgrid Operation with Load Connection and Disconnection

In Figure 22, one can observe the DC microgrid operation during transient moments caused by a 5.6 kW load connection and disconnection using $\gamma =\frac{{\omega }_c}{10}$, ${\omega }_c=1000\pi$ and ${\omega }_v=100\pi$. This figure demonstrates that the system is stable and very robust since the microgrid voltage is kept constant during the transient moments, suffering a very negligible impact with the load steps (negligible sags and swells), resulting in a high power quality.

7.3. Steady-State Operation

The steady-state results are presented as depicted in Figure 23 and Figure 24. In Figure 23, one can notice the balanced phase currents $(i_{L1},i_{L2}$ and $i_{L3})$ obtained in the experimental analysis, which have a mean value of approximately 9 A.

In Figure 24, one can observe the phase-1 current $\left(i_{L1}\right)$ as well as the reduced-ripple output current $\left(i_{LL}\right)$ and the load current $\left(i_o\right)$. It can be observed that $i_{LL}$, with an approximate value of 28 A, is practically a constant signal with no ripple, proving that the interleaved topology along with the modulation technique using phase-shifted carrier signals work properly in producing an output current with reduced ripple, which diminishes the voltage ripple across the output capacitor. Since this reduced voltage ripple is obtained, a capacitor with reduced size and cost can be used in this application.

8. Conclusions

This paper introduced a new application of an interleaved converter as a power interface in a hybrid microgrid. The converter is responsible for regulating the DC microgrid voltage while controlling the power flow through the system. The authors proposed a new method for tuning the voltage controller in such a way as to improve the load disturbance rejection, which is a highly desired functionality in such application. Moreover, the authors presented a deep modeling of the MIMO system in order to execute the control design and a stability and robustness analysis. Finally, experimental results were presented validating the proposed topology and modeling.

The tuning technique proved to be efficient in designing the voltage controller aiming at obtaining robust disturbance rejection characteristics while maintaining proper reference tracking behavior. In addition, the experimental results proved that the topology and control allow for a satisfactory operation of the microgrid regarding its voltage profile (high power quality), besides allowing for the reduction of the output-DC-link capacitors, due to the obtained low-ripple output current, reducing the system’s size and weight.