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An LDPC Decoder Architecture for Wireless Sensor Network Applications

Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Corso Duca degli Abruzzi 24, Torino 10129, Italy
Author to whom correspondence should be addressed.
Sensors 2012, 12(2), 1529-1543;
Received: 18 November 2011 / Revised: 25 January 2012 / Accepted: 31 January 2012 / Published: 6 February 2012
(This article belongs to the Special Issue Microprocessors and System-on-Chip)
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The pervasive use of wireless sensors in a growing spectrum of human activities reinforces the need for devices with low energy dissipation. In this work, coded communication between a couple of wireless sensor devices is considered as a method to reduce the dissipated energy per transmitted bit with respect to uncoded communication. Different Low Density Parity Check (LDPC) codes are considered to this purpose and post layout results are shown for a low-area low-energy decoder, which offers percentage energy savings with respect to the uncoded solution in the range of 40%–80%, depending on considered environment, distance and bit error rate. View Full-Text
Keywords: LDPC decoder architecture; wireless sensor networks; power consumption LDPC decoder architecture; wireless sensor networks; power consumption
This is an open access article distributed under the Creative Commons Attribution License (CC BY 3.0).

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MDPI and ACS Style

Biroli, A.D.G.; Martina, M.; Masera, G. An LDPC Decoder Architecture for Wireless Sensor Network Applications. Sensors 2012, 12, 1529-1543.

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