Search Results (34)

Fiber Bragg Grating (FBG) sensors are widely used for strain and temperature monitoring due to their high sensitivity, compact size, electromagnetic immunity, and multiplexing capability. While conventional FBG interrogators remain bulky and costly, Photonic Integrated Circuit (PIC) platforms provide a promising route toward compact, scalable, and low-power FBG interrogation. However, the choice of architecture strongly determines the achievable resolution, bandwidth, multiplexing capacity, and robustness. This review compares on-chip demodulation architectures, evaluating their performance in resolution, bandwidth, and interrogation speed. We show that the optimal architecture depends strongly on the application: AWG-based schemes excel in compact, multi-FBG readout; ring-resonator systems are highly effective for tunable filtering; and interferometric phase-domain schemes offer the highest sensitivity for dynamic strain sensing. Despite these architectural advances, practical deployment remains constrained by system-level bottlenecks. These challenges primarily include source/detector integration, fiber–chip coupling, packaging robustness, and thermal drift. Overcoming these barriers requires a shift in future development from isolated photonic-device optimization toward comprehensive, system-level co-design. Full article

This paper introduces a hardware/software co-designed 3D object detection pipeline based on the PointPillars architecture for low-power embedded MPSoC deployment. The proposed system accelerates the computationally intensive stages in programmable logic (PL), including ROI filtering, coordinate transformation, pillarization, centroid extraction, and INT8 neural inference, using Vitis high-level synthesis (HLS) and an integrated Deep Learning Processing Unit (DPU). Control-oriented and irregular operations, such as data acquisition, Direct Memory Access (DMA) control, lightweight Non-Maximum Suppression (NMS), visualization, and logging, remain on the processing system (PS). The design targets the AMD Kria KV260 platform and achieves an accelerated core pipeline latency of 11.4 ms per frame at 300 MHz, corresponding to 87.4 Hz throughput, with 6.842 W board-level power consumption. Including PS-side NMS, the practical end-to-end latency is approximately 12.2 ms for typical KITTI scenes. Compared with existing Field-Programmable Gate Array (FPGA)-based implementations implementations, the proposed design reduces latency by up to $33\times$. It achieves a $202\times$ improvement in on-chip BRAM efficiency across HLS optimization versions through FIFO streaming, dataflow execution, and array partitioning. Experimental validation on physical hardware confirms that the proposed PL-accelerated hardware/software co-design provides a practical and cost-effective solution for real-time 3D LiDAR perception on embedded FPGA platforms. Full article

A Wedge Shaped T–Type magnetic flux concentrator (MFC) is proposed to improve the magnetic detection capability of tunneling magnetoresistance (TMR) sensors. The TMR chip used in this work integrates a CoFeSiB soft magnetic thin film on-chip and exhibits a sensitivity of 251 mV/Oe with a magnetic noise of 65.3 pT/sqrt(Hz). Based on magnetic circuit analysis and finite-element simulations, the key structural parameters of the Wedge Shaped T–Type MFC were optimized, including the air-gap distance, aspect ratio, and input–output cross-sectional ratio. The optimal parameters were determined as an air gap of 200 μm, an aspect ratio of 2, and a cross-sectional compression ratio exceeding 100. Sixteen MFC structures with different sizes were fabricated and integrated with the TMR sensors for experimental evaluation. The results show that the external flux concentrator does not introduce additional voltage noise while significantly improving the sensor response. With optimized structures, the sensor sensitivity increases from 251 mV/Oe to 17,812 mV/Oe, and the magnetic noise is reduced from 65.3 pT/sqrt(Hz) to 0.92 pT/sqrt(Hz) at 1 Hz. The experimental results demonstrate that the Wedge Shaped T–Type MFC effectively enhances the magnetic field gain and significantly improves the detection limit of TMR sensors. Full article

Silicon-compatible spintronic terahertz emitters (STEs) are crucial for on-chip ultrafast optoelectronic integration, yet their all-optical controllability remains a key challenge. Here, we fabricate a Ta-buffered CoFeB/Ir heterostructure on Si substrates and realize, for the first time, the enhancement and nonlinear modulation of coherent THz emission under continuous-wave (CW) optical pumping at room temperature. The THz emission, dominated by the inverse spin Hall effect, features an ultrabroad 0–2.5 THz bandwidth and robustness against femtosecond pump fluence and polarization variations. The all-optical modulation of THz generation originates from the competition between photothermal and photodoping effects in the Si substrate. The heterostructure-side pumping with a 450 nm CW laser yields an increased modulation of 46% at 2.546 W cm⁻² due to the photothermal effect, while the Si substrate-side pumping at 780 nm leads to 21.3% THz emission suppression by photodoping. Moreover, the THz enhanced modulation efficiency peaks at an Ir layer thickness of 1.2 nm. Our work demonstrates an all-optical controllable Si-based THz source, providing critical insights for the design of next-generation on-chip THz functional devices. Full article

Measurement of material thermodynamic parameters plays a crucial role in understanding the interactions between host materials and guest species. Therefore, developing a general-purpose system for thermodynamic parameter measurement is of great significance. In this work, a complete gas–solid interface thermodynamic parameter measurement platform was developed based on isothermal adsorption and a resonant microcantilever testing platform. Unlike conventional adsorption measurement systems that rely on manual, multi-cycle adsorption–desorption processes, the proposed platform integrates an automated hardware–software architecture together with a stepwise concentration-gradient protocol and on-chip thermal desorption, enabling continuous and efficient acquisition of adsorption isotherms. The study includes: (i) construction of an improved thermodynamic parameter extraction model based on the Sips model, (ii) development of an integrated resonant microcantilever control and acquisition module using a modified Fourier algorithm, and (iii) implementation of an automated testing and data analysis software framework developed in LabVIEW based on the Queued Message Handler (QMH) architecture. The system was validated from both hardware performance and material testing perspectives using CO₂ adsorption on H-SSZ-13 as a representative case. The results show that the system achieves a maximum sampling rate of 10,000 pts (points per second), with minimum root-mean-square (RMS) noise levels of 0.0083 Hz for frequency and 0.0109 °C for temperature. The PID temperature-control settling time (0.1%) is 24.9 ms, and the frequency-response settling time (0.01%) is 9.6 ms. Thermodynamic parameters including entropy change (ΔS), enthalpy change (ΔH), and Gibbs free energy change (ΔG) were successfully extracted during CO₂ adsorption at 294.15 K under different relative uptakes. Reproducibility was verified across three independent samples, yielding a standard deviation of 9.1 J·mol⁻¹ for ΔS at 2% relative uptake and relative standard deviations of 6.85% and 8.12% for ΔH and ΔG, respectively. These results demonstrate that the proposed thermodynamic measurement platform features a simple architecture, superior performance, and high reproducibility in gas–solid interface thermodynamic studies, showing strong potential for future commercialization. Full article

Low Earth orbit (LEO) satellite networks require real-time routing to cope with dynamic topology variations caused by continuous orbital motion. As an alternative to conventional routing approaches, deep reinforcement learning (DRL) has recently gained attention as an effective means for optimizing routing paths. To solve routing problems modeled as a grid-based Markov decision process (grid-based MDP), DRL methods such as CNN-based Dueling DQN have been proposed. However, these approaches are difficult to implement in practice. In particular, the substantial floating-point computation and memory traffic of CNN inference make real-time onboard inference challenging under the stringent power and resource constraints of satellite platforms. To address these constraints, this paper proposes an INT8 quantization and hardware–software co-design framework using heterogeneous SoC FPGA acceleration. We offload compute-intensive CNN inference to the programmable logic (PL), while the processing system (PS) orchestrates overall control and data movement, forming a collaborative PS–PL architecture. Furthermore, we integrate the NITI-style two-pass scaling with PS–PL exponent propagation to preserve end-to-end integer consistency without floating-point conversion. To demonstrate its practical onboard feasibility, we employ standard accelerator implementation choices—such as output-stationary scheduling and on-chip prefetching—and conduct an ablation study over independently tunable axes (PE array size and PS-side buffer reuse) to quantify their incremental contributions. Experimental results show that the proposed PS–PL cooperative scheme dramatically reduces computation time compared to a PS-only reference implementation on the same platform. Full article

This work extends our previous research on spectral clustering for mitigating nonlinear phase noise in optical communication systems by presenting the first complete FPGA implementation of the algorithm, including on-chip eigenvector computation with parallelization strategies. The implementation addresses the computational complexity challenges of spectral clustering through a heterogeneous CPU/FPGA co-design approach that partitions algorithmic stages between ARM processors and the FPGA fabric. While the achieved processing speeds of approximately 36 symbols per second do not yet meet the requirements for commercial optical transceivers, our hardware prototype demonstrates the feasibility and practical challenges of deploying advanced clustering algorithms on real-time hardware architectures. We detail the parallel Jacobi method for eigenvector computation, the Greedy K-means++ initialization strategy, and the comprehensive hardware mapping of all clustering stages. The system processes streaming m-QAM data through a windowed architecture and integrates a demapper to ensure label consistency, demonstrating improved bit error rate performance compared to K-means under severe phase noise conditions of −90 dBc/Hz at a 1 MHz offset. This implementation offers valuable insights into memory bandwidth limitations and resource utilization trade-offs, underscoring the crucial role of FPGAs as a bridge between algorithm development and high-speed optical system deployment. Full article

Background/Objectives: Nanogels (NGs) are promising carriers for drug delivery due to their tunable size, biocompatibility, and capability to encapsulate sensitive molecules. However, conventional batch synthesis often lacks control over key parameters, such as size distribution and encapsulation efficiency. This study aimed to develop a microfluidic platform for the reproducible synthesis of poly(α-glutamic acid) (PGA)-based NGs using strain-promoted azide–alkyne cycloaddition (SPAAC) click chemistry and to investigate the effects of flow parameters on the physicochemical properties of nanogels. Methods: Functionalized PGAs (with azide and DBCO) were co-injected into a microfluidic system within a flux of acetone to form NGs via SPAAC. Flow rate ratios (FRR) and total flow rates were systematically screened at 25 °C, with tests at 50 °C. We evaluated the particle size, polydispersity index (PDI), zeta potential, and encapsulation efficiency (EE%) of doxorubicin-loaded NGs. Results: NGs with tunable sizes ranging from ~50 nm to >170 nm and low PDI (<0.1 in optimal conditions) were obtained. Higher FRR and total flow rates yielded smaller and more uniform NGs. Doxorubicin loading did not affect the nanogel size and uniformity, and in some cases, it improved them. The EE% reached up to ~65%, and ~40% for the best formulations. Elevated temperature improved the characteristics of drug-loaded nanogels at intermediate solvent ratios. Compared to batch synthesis, the microfluidic process offers enhanced reproducibility and size control. Conclusions: Microfluidic SPAAC synthesis enables precise and scalable fabrication of PGA NGs with controllable size and drug loading. This platform supports future integration of on-chip purification and monitoring for clinical nanomedicine applications. Full article

The rapid advancement of deep neural networks has significantly increased demands for computational complexity and data volume. This trend is especially evident with the emergence of large language models, which have rendered traditional architectures such as CPUs and GPGPUs insufficient in meeting performance and energy efficiency requirements. Spatial accelerators present a promising solution by optimizing on-chip compute, storage, and communication resources. In exploring spatial accelerator design spaces, analytical model-based simulators and cycle-accurate simulators are commonly employed, each offering distinct advantages: high computational speed and superior simulation accuracy, respectively. However, the limited accuracy of analytical models and the slow simulation speed of cycle-accurate simulators impede the achievement of globally optimal solutions during design space exploration. Therefore, effectively leveraging the strengths of both simulator types while mitigating their inherent trade-offs is a critical challenge in designing customized spatial accelerators. In this work, we introduce a novel co-exploration methodology that integrates both coarse-grained and fine-grained approaches to navigate design and mapping spaces effectively. We utilize the rapid simulation capabilities of analytical models to perform coarse-grained global exploration, quickly eliminating designs and mapping configurations with inferior performance. Building on the results of this initial exploration, we employ cycle-accurate simulators to conduct fine-grained local exploration within the identified promising regions of the design and mapping spaces. This dual-phase approach aims to identify optimal hardware designs and dataflow mapping strategies that enhance performance and energy efficiency. The experimental results demonstrate that, compared to state-of-the-art methods, our approach reduces the number of exploration points by up to 99%, while achieving a 17.9% reduction in latency, a 2.5% decrease in energy consumption, and a 30.3% improvement in throughput. Full article

Lens-free on-chip microscopy (LFOCM) is a powerful computational imaging technology that combines high-throughput capabilities with cost efficiency. However, in LFOCM, the phase recovered by iterative phase retrieval techniques is generally wrapped into the range of −$\pi$ to $\pi$, necessitating phase unwrapping to recover absolute phase distributions. Moreover, this unwrapping process is prone to errors, particularly in areas with large phase gradients or low spatial sampling, due to the absence of reliable initial guesses. To address these challenges, we propose a novel biplane phase retrieval (BPR) method that integrates phase unwrapping results obtained at different propagation distances to achieve accurate absolute phase reconstruction. The effectiveness of BPR is validated through live-cell imaging of HeLa cells, demonstrating improved quantitative phase imaging (QPI) accuracy when compared to conventional off-axis digital holographic microscopy. Furthermore, time-lapse imaging of COS-7 cells in vitro highlights the method’s robustness and capability for long-term quantitative analysis of large cell populations. Full article

Micro electro-mechanical systems (MEMS) combining sensing and microfluidics functionalities, as are common in Lab-on-Chip (LoC) devices, are increasingly based on polymers. Benefits of polymers include tunable material properties, the possibility of surface functionalization, compatibility with many micro and nano patterning techniques, and optical transparency. Often, additional materials, such as metals, ceramics, or silicon, are needed for functional or auxiliary purposes, e.g., as electrodes. Hybrid patterning and integration of material composites require an increasing range of fabrication approaches, which must often be newly developed or at least adapted and optimized. Here, a microfabrication process concept is developed that allows one to implement attenuated total reflection Fourier transform infrared spectroscopy (ATR-FTIR) and electrochemistry on an LoC device. It is designed to spatially resolve chemical sensitivity and selectivity, which are instrumental for the detection of chemical distributions, e.g., during on-flow chemical and biological reaction chemistry. The processing sequence involves (i) direct-write and soft-contact UV lithography in SUEX dry resist and replication in polydimethylsiloxane (PDMS) elastomers as the fluidic structure; (ii) surface functionalization of PDMS with oxygen plasma, 3-aminopropyl-triethoxysilane (APTES), and a UV-curable glue (NOA 73) for bonding the fluidic structure to the substrate; (iii) double-sided patterning of silicon nitride-coated silicon wafers serving as the ATR-FTIR-active internal reflection element (IRE) on one side and the electrode-covered substrate for microfluidics on the back side with lift-off and sputter-based patterning of gold electrodes; and (iv) a custom-designed active vacuum positioning and alignment setup. Fluidic channels of 100 μm height and 600 μm width in 5 mm thick PDMS were fabricated on 2” and 4” demonstrators. Electrochemistry on-chip functionality was demonstrated by cyclic voltammetry (CV) of redox reactions involving iron cyanides in different oxidation states. Further, ATR-FTIR measurements of laminar co-flows of H₂O and D₂O demonstrated the chemical mapping capabilities of the modular fabrication concept of the LoC devices. Full article

The design and fabrication of a integrated symmetric directional coupler dependent o the pumping power and operating at a 1534 nm wavelength is reported. The twin-core waveguide was inscribed into Er³⁺/Yb³⁺ co-doped phosphate glass by a femtosecond laser direct writing technique. By optical pumping, the coupling ratio can be modulated due to the changes induced in the refractive index of the material. The experimental results demonstrated that the coupling ratio can be tuned continuously from 100/0 to 50/50 by increasing the pump’s power from 0 to 350 mW. The developed twin-core coupler has promising applications for on-chip all-optical signal processing and communication systems. Full article

This paper presents a compact hybrid G-band (170–260 GHz) heterodyne receiver module incorporating both Millimeter Microwave Integrated Circuits (MMICs) and a Schottky diode-based circuit. An on-chip sextupler and a Low Noise Amplifier (LNA), along with a diode-based Sub-Harmonic Mixer (SHM), are integrated into the demonstrated singular module, which is carefully designed and arranged with the co-simulations in electromagnetic and thermal domain. Through this methodology, a terahertz receiver module is fabricated with a volume of only 27 × 20 × 20 mm³. The measured results indicate that the double-sideband conversion gain of the receiver is 10.5–17.5 dB from 195 GHz to 230 GHz, while the noise temperature is 1009–1158 K. As a result, this terahertz receiver provides recorded miniaturized hardware applicable for terahertz Integration of Sensing and Communication (ISAC) systems. Full article

We developed a microfluidic chip integrated with nucleic acid purification and droplet-based digital polymerase chain reaction (ddPCR) modules to realize a ‘sample-in, result-out’ infectious virus diagnosis. The whole process involved pulling magnetic beads through drops in an oil-enclosed environment. The purified nucleic acids were dispensed into microdroplets by a concentric-ring, oil–water-mixing, flow-focusing droplets generator driven under negative pressure conditions. Microdroplets were generated with good uniformity (CV = 5.8%), adjustable diameters (50–200 μm), and controllable flow rates (0–0.3 μL/s). Further verification was provided by quantitative detection of plasmids. We observed a linear correlation of R² = 0.9998 in the concentration range from 10 to 10⁵ copies/μL. Finally, this chip was applied to quantify the nucleic acid concentrations of the severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2). The measured nucleic acid recovery rate of 75 ± 8.8% and detection limit of 10 copies/μL proved its on-chip purification and accurate detection abilities. This chip can potentially be a valuable tool in point-of-care testing. Full article

This paper introduces a digital interface application-specific integrated circuit (ASIC) for a micro-electromechanical systems (MEMS) vibratory gyroscope. The driving circuit of the interface ASIC uses an automatic gain circuit (AGC) module instead of a phase-locked loop to realize a self-excited vibration, which gives the gyroscope system good robustness. In order to realize the co-simulation of the mechanically sensitive structure and interface circuit of the gyroscope, the equivalent electrical model analysis and modeling of the mechanically sensitive structure of the gyro are carried out by Verilog-A. According to the design scheme of the MEMS gyroscope interface circuit, a system-level simulation model including mechanically sensitive structure and measurement and control circuit is established by SIMULINK. A digital-to-analog converter (ADC) is designed for the digital processing and temperature compensation of the angular velocity in the MEMS gyroscope digital circuit system. Using the positive and negative diode temperature characteristics, the function of the on-chip temperature sensor is realized, and the temperature compensation and zero bias correction are carried out simultaneously. The MEMS interface ASIC is designed using a standard 0.18 μM CMOS BCD process. The experimental results show that the signal-to-noise ratio (SNR) of sigma-delta (ΣΔ) ADC is 111.56 dB. The nonlinearity of the MEMS gyroscope system is 0.03% over the full-scale range. Full article