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15 pages, 12762 KiB

Open AccessReview

Advanced Doherty Power Amplifier Architectures for 5G Handset Applications: A Comprehensive Review of Linearity, Back-Off Efficiency, Bandwidth, and Thermal Management

by Shihai He and Huan Chen

Chips 2025, 4(2), 20; https://doi.org/10.3390/chips4020020 - 6 May 2025

Viewed by 1324

Abstract

This paper presents a comprehensive review of GaAs HBT-based Doherty power amplifiers (DPAs) targeting 5G New Radio (NR) handset applications. Focusing on the critical challenges of linearity enhancement, back-off efficiency improvement, bandwidth extension under low-voltage (3.4 V) operation, and chip thermal management, the [...] Read more.

This paper presents a comprehensive review of GaAs HBT-based Doherty power amplifiers (DPAs) targeting 5G New Radio (NR) handset applications. Focusing on the critical challenges of linearity enhancement, back-off efficiency improvement, bandwidth extension under low-voltage (3.4 V) operation, and chip thermal management, the authors analyze state-of-the-art DPAs published in recent years. Key innovations including dynamic power division technique, third order intermodulation (IM3) cancellation technology, and compact output combiners are comparatively studied. Using 5G NR signals, the critical performance of the latest reported PA such as maximum linear power, back-off efficiency, bandwidth, and operating voltage are quantitatively investigated. The measurement results demonstrated that the best performance in recent DPAs achieved high linear power of 31 dBm with 34% PAE and 30 dBm with 31% PAE at the N78 and N77 bands, respectively. The corresponding adjacent channel leakage ratios (ACLRs) were lower than −36.5 dBc without digital pre-distortion (DPD). This review provides a comprehensive understanding of the latest advancements and future directions in highly efficient and linear DPA designs for 5G handset front-end modules. Full article

(This article belongs to the Special Issue IC Design Techniques for Power/Energy-Constrained Applications)

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9 pages, 1212 KiB

Open AccessArticle

Doherty Power Amplifier Design via Differential Combining

by Jorge Julian Moreno Rubio and Abdolhamid Noori

Electronics 2024, 13(19), 3961; https://doi.org/10.3390/electronics13193961 - 8 Oct 2024

Cited by 2 | Viewed by 1870

Abstract

This paper introduces a novel differential combiner designed to effectively address parasitic capacitances of transistors used in power amplifier (PA) designs with precise compensation at a specified frequency. The combiner consists of a

λ / 4

transmission line with an integrated capacitor of [...] Read more.

This paper introduces a novel differential combiner designed to effectively address parasitic capacitances of transistors used in power amplifier (PA) designs with precise compensation at a specified frequency. The combiner consists of a

λ / 4

transmission line with an integrated capacitor of value

2 C_{O U T}

at its midpoint, which ensures accurate cancellation of parasitic effects. This design connects the drain pins of two transistors, which are considered identical in this configuration. By eliminating the need for complex parasitic compensation techniques, this method significantly simplifies the design process of Doherty Power Amplifiers (DPAs). Extensive simulations validate the effectiveness of this approach, highlighting its potential as a versatile and straightforward solution for next-generation communication systems. Full article

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16 pages, 3903 KiB

Open AccessArticle

A Broadband Three-Way Series Doherty Power Amplifier with Deep Power Back-Off Efficiency Enhancement for 5G Application

by Xianfeng Que, Jun Li and Yanjie Wang

Electronics 2024, 13(10), 1882; https://doi.org/10.3390/electronics13101882 - 11 May 2024

Cited by 4 | Viewed by 2195

Abstract

This article presents a new broadband three-way series Doherty power amplifier (DPA) topology, which enables a broadband output power back-off (OBO) efficiency enhancement of up to 10 dB or higher. The proposed DPA topology achieves Doherty load modulation and three-way power combining through [...] Read more.

This article presents a new broadband three-way series Doherty power amplifier (DPA) topology, which enables a broadband output power back-off (OBO) efficiency enhancement of up to 10 dB or higher. The proposed DPA topology achieves Doherty load modulation and three-way power combining through a transformer, which requires only a low coupling factor, thus facilitating its implementation in double-sided PCBs or monolithic microwave integrated circuit (MMIC) processes. The design equations for the proposed DPA topology are proposed and analyzed in detail. A proof-of-concept PA at the 2.1–2.8 GHz band using commercial GaN transistors was designed and fabricated to validate the proposed concept. Within the operating frequency band, it achieves a saturated output power (

P_{sat}

) of 44.5–46.5 dBm with a peak drain efficiency (DE) of 60–72%, and 43–52% DE at 10 dB OBO. Moreover, under a 20 MHz long-term evolution (LTE)-modulated signal, the PA demonstrates a 36.8–37.5 dBm average output power (

P_{avg}

) and 47–53% average drain efficiency (

{DE}_{avg}

). Notably, the adjacent channel leakage ratio (ACLR) is as low as −35–−28.2 dBc without any digital predistortion (DPD). Full article

(This article belongs to the Special Issue Advanced Wireless Technologies for Next-G Networks: Antennas, Circuits, and Systems)

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12 pages, 1231 KiB

Open AccessArticle

Design of Broadband Doherty Power Amplifier Based on Misaligned Current Phase

by Yinlong Hu, Decheng Gan and Weimin Shi

Energies 2024, 17(9), 2006; https://doi.org/10.3390/en17092006 - 24 Apr 2024

Cited by 2 | Viewed by 1599

Abstract

A broadband Doherty power amplifier (DPA) always experiences an efficiency degradation between two efficiency peaks, especially at two side bands. In this study, the efficiency degradation was demonstrated to be caused caused by the in-phase power combining at the saturation power level. To [...] Read more.

A broadband Doherty power amplifier (DPA) always experiences an efficiency degradation between two efficiency peaks, especially at two side bands. In this study, the efficiency degradation was demonstrated to be caused caused by the in-phase power combining at the saturation power level. To solve this problem, current misalignment was introduced into the broadband DPA design. The carrier and peaking PA have different current phases when performing the power combination at the saturation power level. In this work, it was also demonstrated that the efficiency in the high-power region of a DPA can be improved by elaborately using misaligned current phases. A detailed analysis and the design procedure of a broadband DPA are presented in this paper. And a 1.5–2.45 GHz broadband DPA was implemented and measured. The fabricated DPA achieves a saturation output power of 42.7–44.9 dBm, a saturation drain efficiency (DE) of 62.7–74.1% and a gain of 10.2–13.9 dB over 1.5–2.45 GHz. Moreover, the fabricated DPA also achieves a 6 dB back-off DE of more than 49.1% in the frequency band of interest. Full article

(This article belongs to the Section F3: Power Electronics)

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17 pages, 4192 KiB

Open AccessArticle

An Optimized Control System for the Independent Control of the Inputs of the Doherty Power Amplifier

by Pallav Kumar Sah, Matthew Poulton, Hung Luyen and Ifana Mahbub

Designs 2023, 7(6), 131; https://doi.org/10.3390/designs7060131 - 14 Nov 2023

Viewed by 2357

Abstract

This study presents a systematic design of an optimized drive signal control system for 2.5 GHz Doherty power amplifiers (DPAs). The designed system enables the analysis of the independent control of the amplitude and phase for the signals between the main and peak [...] Read more.

This study presents a systematic design of an optimized drive signal control system for 2.5 GHz Doherty power amplifiers (DPAs). The designed system enables the analysis of the independent control of the amplitude and phase for the signals between the main and peak amplifiers of the DPA. The independent control of the signal is achieved by incorporating a variable attenuator (VA) and a variable phase shifter (VPS) in each of the two parallel paths of the DPA. This integration allows for driving varying power levels with an arbitrary phase difference between the individual parallel PAs for reduced control complexity and power consumption. The specific VA (Qorvo QPC6614) and VPS (Qorvo QPC2108) components are used for the test system to provide an amplitude attenuation range from 0.5 dB to 31.5 dB and a phase range from

0^{\circ}

to

360^{\circ}

at the intended operating frequency of 2.5 GHz, offering the benefit of characterizing the behavior of PAs for an extensive range of drive signals to optimize the output performance, such as PAE or the ACLR. For experimental validation, the designed drive signal control system is integrated with GaN PAs (Qorvo QPD0005—DUT) with a

P_{1 d B}

of 37.7 dBm. Each PA is preceded by a drive amplifier with a gain of 17.8 dB to boost the power fed into the PA. In this manuscript, we analyzed and compared the PAE of the DPA and parallel-connected PA for diverse input signals generated using a designed optimized control system. Full article

(This article belongs to the Topic Distributed Optimization for Control)

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14 pages, 1403 KiB

Open AccessArticle

A Dual Load-Modulated Doherty Power Amplifier Design Method for Improving Power Back-Off Efficiency

by Yi Jin, Zhijiang Dai, Xiongbo Ran, Changzhi Xu and Mingyu Li

Sensors 2023, 23(14), 6598; https://doi.org/10.3390/s23146598 - 22 Jul 2023

Cited by 3 | Viewed by 2378

Abstract

In this paper, the load modulation process of a Doherty power amplifier (DPA) is analyzed to address the issue of why designed DPAs have a very low efficiency in the back-off state in some cases. A general formula of the real load modulation [...] Read more.

In this paper, the load modulation process of a Doherty power amplifier (DPA) is analyzed to address the issue of why designed DPAs have a very low efficiency in the back-off state in some cases. A general formula of the real load modulation process is also given for analyzing the load modulation of a peak PA matching network. This provides a new perspective for improving the back-off efficiency of a DPA. To improve the power back-off efficiency of a DPA, a dual load-modulated DPA (D-DPA) design method is proposed. The core principle of the proposed design method is to control the load modulation process from the carrier PA to the peaking PA based on the design method of the traditional two-way DPA. The efficiency of the peaking PA in the back-off region is enhanced, thereby improving the efficiency in the entire back-off region of the DPA. Based on the proposed design method, a D-DPA operating at 2 GHz is designed and fabricated. The test results show that the saturated output power and gain are 43.7 dBm and 9.7 dB, respectively, while the efficiency at 6 dB output power back-off is 59.2%. The designed D-DPA eliminates the efficiency pit of the traditional two-way DPA in the output power back-off region. Full article

(This article belongs to the Special Issue MIMO Technologies in Sensors and Wireless Communication Applications)

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20 pages, 2933 KiB

Open AccessArticle

A Comparative Analysis of Doherty and Outphasing MMIC GaN Power Amplifiers for 5G Applications

by Victoria Díez-Acereda, Sunil Lalchand Khemchandani, Javier del Pino and Ayoze Diaz-Carballo

Micromachines 2023, 14(6), 1205; https://doi.org/10.3390/mi14061205 - 7 Jun 2023

Cited by 4 | Viewed by 2844

Abstract

A comparison between a fully integrated Doherty power amplifier (DPA) and outphasing power amplifier (OPA) for fifth Generation (5G) wireless communications is presented in this paper. Both amplifiers are integrated using pHEMT transistors from the OMMIC’s 100 nm GaN-on-Si technology (D01GH). After a [...] Read more.

A comparison between a fully integrated Doherty power amplifier (DPA) and outphasing power amplifier (OPA) for fifth Generation (5G) wireless communications is presented in this paper. Both amplifiers are integrated using pHEMT transistors from the OMMIC’s 100 nm GaN-on-Si technology (D01GH). After a theoretical analysis, the design and layout of both circuits are presented. The DPA uses an asymmetric configuration where the main amplifier is biased in class AB and the auxiliary amplifier is biased in class C, while the OPA uses two amplifiers biased in class B. In the comparative analysis, it has been observed that the OPA presents a better performance in terms of maximum power added efficiency (PAE), while the DPA provides higher linearity and efficiency at 7.5 dB output back-off (OBO). At a 1 dB compression point, the OPA exhibits an output power of 33 dBm with a maximum PAE of 58.3% compared to 44.2% for the DPA for an output power of 35 dBm, and at 7.5 dB OBO, the DPA achieves a PAE of 38.5%, while the OPA achieves 26.1%. The area has been optimized using absorbing adjacent component techniques, resulting in an area of 3.26 mm² for the DPA and 3.18 mm² for the OPA. Full article

(This article belongs to the Special Issue Power Semiconductor Devices and Applications)

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14 pages, 6748 KiB

Open AccessArticle

Design of Ultra-Wideband Doherty Power Amplifier Using a Modified Combiner Integrated with Complex Combining Impedance

by Jian Chen, Zhihui Liu, Tao Dong and Weimin Shi

Sensors 2023, 23(8), 3882; https://doi.org/10.3390/s23083882 - 11 Apr 2023

Cited by 3 | Viewed by 2909

Abstract

To be compatible with future wireless communication systems, it is very necessary to extend the bandwidth of the Doherty power amplifier (DPA). In this paper, a modified combiner integrated with a complex combining impedance is adopted to enable an ultra-wideband DPA. Meanwhile, a [...] Read more.

To be compatible with future wireless communication systems, it is very necessary to extend the bandwidth of the Doherty power amplifier (DPA). In this paper, a modified combiner integrated with a complex combining impedance is adopted to enable an ultra-wideband DPA. Meanwhile, a comprehensive analysis is performed on the proposed method. It is illustrated that the proposed design methodology can provide power amplifier (PA) designers with more freedom in implementing ultra-wideband DPAs. As a concept of proof, a DPA working over 1.2–2.8 GHz (a relative bandwidth of 80%) is designed, fabricated and measured in this work. Experimental results showed that the fabricated DPA delivers a saturation output power of 43.2–44.7 dBm with a gain of 5.2–8.6 dB. Meantime, the fabricated DPA achieves a saturation drain efficiency (DE) of 44.3–70.4% and a 6 dB back-off DE of 38.7–57.6%. Full article

(This article belongs to the Special Issue MIMO Technologies in Sensors and Wireless Communication Applications)

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10 pages, 4031 KiB

Open AccessArticle

Asymmetric Doherty Power Amplifier with Input Phase/Power Adjustment and Envelope Tracking

by Fei Yang, Jun Li, Hongxi Yu, Sen Yan, Anxue Zhang, Kaida Xu and Zhonghe Jin

Electronics 2021, 10(19), 2327; https://doi.org/10.3390/electronics10192327 - 23 Sep 2021

Cited by 1 | Viewed by 3329

Abstract

In this paper, the design and implementation of a Doherty power amplifier (DPA) are proposed using gallium nitride high electron mobility transistors (GaN HEMTs). Class-F and Class-C modes are combined to obtain an asymmetric DPA. The precise active load-pull controlling of fundamental and [...] Read more.

In this paper, the design and implementation of a Doherty power amplifier (DPA) are proposed using gallium nitride high electron mobility transistors (GaN HEMTs). Class-F and Class-C modes are combined to obtain an asymmetric DPA. The precise active load-pull controlling of fundamental and harmonic terminations of the DPA is simulated and analyzed, including the parasitics of the transistors. The measurements of the DPA with the phase difference, input power ratio adjustment, and envelope tracking of the auxiliary PA are discussed in detail in order to achieve a competitive performance. A greater than 63% drain efficiency is obtained within the 10-dB input power dynamic range at 2.1 GHz. The peak of the drain efficiency reaches 73%, with a corresponding output power of 46 dBm. Full article

(This article belongs to the Section Microwave and Wireless Communications)

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15 pages, 4661 KiB

Open AccessArticle

Ultra-Compact mm-Wave Monolithic IC Doherty Power Amplifier for Mobile Handsets

by Maryam Sajedin, Issa Elfergani, Jonathan Rodriguez, Raed Abd-Alhameed, Monica Fernandez-Barciela and Manuel Violas

Electronics 2021, 10(17), 2131; https://doi.org/10.3390/electronics10172131 - 2 Sep 2021

Cited by 2 | Viewed by 2868

Abstract

This work develops a novel dynamic load modulation Power Amplifier (PA) circuity that can provide an optimum compromise between linearity and efficiency while covering multiple cellular frequency bands. Exploiting monolithic microwave integrated circuits (MMIC) technology, a fully integrated 1W Doherty PA architecture is [...] Read more.

This work develops a novel dynamic load modulation Power Amplifier (PA) circuity that can provide an optimum compromise between linearity and efficiency while covering multiple cellular frequency bands. Exploiting monolithic microwave integrated circuits (MMIC) technology, a fully integrated 1W Doherty PA architecture is proposed based on 0.1 μm AlGaAs/InGaAs Depletion-Mode (D-Mode) technology provided by the WIN Semiconductors foundry. The proposed wideband DPA incorporates the harmonic tuning Class-J mode of operation, which aims to engineer the voltage waveform via second harmonic capacitive load termination. Moreover, the applied post-matching technique not only reduces the impedance transformation ratio of the conventional DPA, but also restores its proper load modulation. The simulation results indicate that the monolithic drive load modulation PA at 4 V operation voltage delivers 44% PAE at the maximum output power of 30 dBm at the 1 dB compression point, and 34% power-added efficiency (PAE) at 6 dB power back-off (PBO). A power gain flatness of around 14 ± 0.5 dB was achieved over the frequency band of 23 GHz to 27 GHz. The compact MMIC load modulation technique developed for the 5G mobile handset occupies the die area of 3.2 mm². Full article

(This article belongs to the Special Issue Power Amplifier for Wireless Communication)

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