- Article
The Effect of BEOL Design Factors on the Thermal Reliability of Flip-Chip Chip-Scale Packaging
- Dejian Li,
- Bofu Li,
- Shunfeng Han,
- Dameng Li,
- Baobin Yang,
- Baoliang Gong,
- Zhangzhang Zhang,
- Chang Yu and
- Pei Chen
With the development of high-density integrated chips, low-k dielectric materials are used in the back end of line (BEOL) to reduce signal delay. However, due to the application of fine-pitch packages with high-hardness copper pillars, BEOL is suscep...