Optimization Technologies for Digital Signal Processing

A special issue of Technologies (ISSN 2227-7080). This special issue belongs to the section "Information and Communication Technologies".

Deadline for manuscript submissions: 30 April 2026 | Viewed by 11

Special Issue Editor


E-Mail Website
Guest Editor
School of Integrated Circuits, Wuxi Campus, Southeast University, Wuxi 214026, China
Interests: digital signal processing techniques; digital signal processor design; compiler design; artificial intelligence; embedded software design; real-time operation system design

Special Issue Information

Dear Colleagues,

This Special Issue will cover original research and extensive review articles on optimization techniques for digital signal processing, including, but not limited to, the following topics:

Algorithmic Optimization

Includes mathematical and signal-processing-level transformations to reduce complexity:

  • Common subexpression elimination;
  • Strength reduction (e.g., replacing multiply with shift);
  • Efficient algorithms: FFT, CORDIC, IIR over FIR, etc.;
  • Approximation methods (lookup tables, series expansions);
  • POSIT encoding.

Parallelism and Pipelining

Covers techniques that exploit concurrency at various levels:

  • Instruction-level: ILP, VLIW, superscalar;
  • Data-level: SIMD;
  • Task-level: multi-core parallelism;
  • Pipelining: both software and hardware level;
  • Loop unrolling and software pipelining;
  • Systolic array for matrix multiplications.

Memory and Data Handling Optimization

Focuses on efficient data movement and storage:

  • Tiling and blocking for cache locality;
  • Double buffering to overlap I/O and computation;
  • Scratchpad memory and local buffer management;
  • Cache-friendly data access and alignment;
  • RTOS for signal processing.

Hardware and Low-Level Optimization

Platform-specific enhancements that leverage hardware capabilities:

  • Fixed-point vs. floating-point tradeoffs;
  • Use of MAC, SIMD, and saturation arithmetic;
  • Custom instructions in ASIC/FPGA;
  • Hand-coded intrinsics or inline assembly.

Toolchain and Real-Time System Considerations

Optimizations enabled via compilers, toolchains, and system-level decisions:

  • Compiler optimization flags and profile-guided optimization;
  • Bit-exact simulation, profilers, and cycle-accurate models;
  • Deterministic algorithms for real-time systems;
  • Buffer deadline management and task scheduling.

Prof. Dr. Jiajun Zhang
Guest Editor

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Keywords

  • digital signal processing (DSP)
  • signal processing optimization
  • low-power DSP
  • high-performance DSP
  • real-time signal processing
  • resource-contrained DSP
  • fast DSP algorithms
  • approximate computing
  • loop unrolling
  • CORDIC algorithm
  • POSIT arithmetic
  • quantization techniques
  • cache optimization
  • compiler optimization
  • intrisics

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Published Papers

This special issue is now open for submission.
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