Special Issue "Statistical Integrated Circuit Design"
A special issue of Mathematics (ISSN 2227-7390).
Deadline for manuscript submissions: 31 July 2019
Prof. Dr. Paolo Crippa
Department of Information Engineering, Marche Polytechnic University, Via Brecce Bianche, 12, I-60121 Ancona (AN), Italy
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Interests: microelectronics; analog and mixed-signal integrated circuits; electronic device modeling; statistical IC design; signal processing; pattern recognition; bio-signal classification; system identification; neural networks; stochastic processes
Recent advances in electron device fabrication technology to obtain tiny, fast, and low-power integrated circuits (ICs) have caused continuous reduction in the feature size of the devices.
Therefore, at the nanometer geometries used in current technologies, investigating the statistical behavior of integrated devices becomes of paramount importance in IC design.
The scaling of feature size has progressed more rapidly than the scaling of process tolerances, so that with the entrance of the device scaling in the nanometer realm, advanced CMOS devices have been increasingly affected by process variations.
To assess and reduce the impact of these variations on IC performance, systematic and statistical variations across the die must be accurately modeled and simulated at both device and circuit levels.
The aim of this Special Issue is to publish original research articles that cover recent advances in the theory and application of statistical design of ICs.
Potential topics include, but are not limited to, the following:
- Atomistic level device modeling;
- Device mismatch modeling;
- IC design strategies at schematic and layout level;
- The mathematical approach to stochastic process variations;
- Mathematical modeling and numerical methods for statistical simulation;
- The Montecarlo, quasi-Montecarlo, and non-Montecarlo techniques;
- Parametric yield estimation and minimization;
- Statistical timing analysis;
- Statistical simulation tools.
Prof. Dr. Paolo Crippa
Manuscript Submission Information
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- statistical device modeling
- statistical timing analysis
- statistical IC design
- device variations
- device mismatch
- mismatch models
- clock skew
- non-Montecarlo simulations
- parametric yield
- yield optimization
- integrated circuit