Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness
AbstractThe trigger voltage of the direct-connected silicon-controlled rectifier (DCSCR) was effectively reduced for electrostatic discharge (ESD) protection. However, a deep NWELL (DNW) is required to isolate PWELL from P-type substrate (PSUB) in DCSCR, which wastes part of the layout area. An area-efficient embedded resistor-triggered silicon-controlled rectifier (ERTSCR) is proposed in this paper. As verified in a 0.3-μm CMOS process, the proposed ERTSCR exhibits lower triggering voltage due to series diode chains and embedded deep n-well resistor in the trigger path. Additionally, the proposed ERTSCR has a failure current of more than 5 A and a corresponding HBM ESD robustness of more than 8 KV. Furthermore, compared with the traditional DCSCR, to sustain the same ESD protection capability, the proposed ERTSCR will consume 10% less silicon area by fully utilizing the lateral dimension in the deep n-well extension region, while the proposed ERTSCR has a larger top metal width. View Full-Text
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Hou, F.; Du, F.; Yang, K.; Liu, J.; Liu, Z. Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness. Electronics 2019, 8, 445.
Hou F, Du F, Yang K, Liu J, Liu Z. Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness. Electronics. 2019; 8(4):445.Chicago/Turabian Style
Hou, Fei; Du, Feibo; Yang, Kai; Liu, Jizhi; Liu, Zhiwei. 2019. "Area-Efficient Embedded Resistor-Triggered SCR with High ESD Robustness." Electronics 8, no. 4: 445.