Electrical Modeling and Structural Parameter Optimization of Shielded Quad-Axis Differential Through-Silicon Vias
Abstract
1. Introduction
2. Parasitic Parameter Extraction and Equivalent Circuit Modeling of Shielded Quad-Axis Differential Through-Silicon via (SQDTSV) Structure
3. Optimization of the Structure and Material Parameters of Shielded Quad-Axis Differential Through-Silicon Vias
4. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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| Comparison Type | SDTSVs | Coaxial TSVs | GSSG TSVs |
|---|---|---|---|
| Frequency range | Up to 100 GHz [8]. | 1–40 GHz [9]. | High-frequency applications [10]. |
| Complexity of process | Similar to coaxial TSVs but without the need for additional steps. | A coaxial structure needs to be formed. | The GSSG structure needs to be precisely arranged and occupies a large amount of space. |
| Electromagnetic shielding effect | Similar to coaxial TSV. | The copper ring effectively shields the electromagnetic field. | The effect is relatively poor. |
| Advantage | The S parameters exhibit excellent matching over a frequency range of up to 100 GHz. The peripheral metal layer not only serves as a shielding layer to suppress surrounding electromagnetic interference, but also acts as a return path for the internal differential transmission lines, thereby improving the utilization of resources. | Reduce signal attenuation by 35% and time delay by 25%. No additional grounding for TSV. | Effectively suppress noise coupling and electromagnetic interference. Modeling and measurement have been successfully accomplished at high frequencies. |
| Symbolic Representation | The Range of Optimization Obtained Through Parameter Scanning | The Optimized Numerical Value (SNLP) | |
|---|---|---|---|
| Height | h | 20–35 μm | 31.69 μm |
| Signal line radius | 1–1.2 μm | 1.18 μm | |
| Isolated layer | 0.1–0.15 μm | 0.12 μm | |
| Shielding layer thickness | 1.4–1.6 μm | 1.47 μm | |
| Filled dielectric radius | 13.8–15.8 μm | 14.37 μm | |
| Signal line pitch | p | 5–6 μm | 5.32 μm |
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© 2026 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license.
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Li, J.; Pan, Z. Electrical Modeling and Structural Parameter Optimization of Shielded Quad-Axis Differential Through-Silicon Vias. Electronics 2026, 15, 2186. https://doi.org/10.3390/electronics15102186
Li J, Pan Z. Electrical Modeling and Structural Parameter Optimization of Shielded Quad-Axis Differential Through-Silicon Vias. Electronics. 2026; 15(10):2186. https://doi.org/10.3390/electronics15102186
Chicago/Turabian StyleLi, Jiawen, and Zhongliang Pan. 2026. "Electrical Modeling and Structural Parameter Optimization of Shielded Quad-Axis Differential Through-Silicon Vias" Electronics 15, no. 10: 2186. https://doi.org/10.3390/electronics15102186
APA StyleLi, J., & Pan, Z. (2026). Electrical Modeling and Structural Parameter Optimization of Shielded Quad-Axis Differential Through-Silicon Vias. Electronics, 15(10), 2186. https://doi.org/10.3390/electronics15102186

