Investigation of Temperature-Dependent Gate Degradation in Normally-Off AlGaN/GaN High-Electron-Mobility Transistor p-GaN

Abstract

The effect of temperature on gate degradation behavior was analyzed in Schottky-type p-GaN gate HEMTs under a positive gate voltage. TDDB measurements were conducted at various temperatures, revealing an accelerated gate failure rate at lower temperatures. A Weibull distribution analysis was employed to predict the 10-year rated gate voltage, showing that the rated voltage at −10 °C is significantly lower than at 60 °C. Furthermore, the derived activation energy of −0.22 eV indicates that gate degradation intensifies in colder environments. Hole accumulation occurring at the p-GaN/AlGaN interface can promote degradation by facilitating electron injection and accelerating defect generation in the presence of strong electric fields. At higher temperatures, hole release mitigates charge accumulation, thereby extending device longevity. These findings highlight the necessity of reliability assessments for p-GaN gate HEMTs suitable for environments with low temperatures, including space and polar environments.

1. Introduction

GaN, characterized by its wide energy bandgap and high breakdown voltage compared to Si, exhibits exceptional stability under harsh environmental conditions such as high and low temperatures. The spontaneous and piezoelectric polarization in the AlGaN/GaN heterojunction forms a two-dimensional electron gas channel, providing high electron mobility and velocity saturation [1,2]. These features enable rapid switching speeds, making GaN well suited for high-voltage and high-frequency applications [3,4]. In power semiconductor devices, normally-off operation is preferred for reduced power consumption and improved stability. The shift toward normally-off (enhancement-mode, E-mode) operation in power semiconductor devices is driven by the need for improved safety, reduced power consumption, and enhanced system stability. Among various E-mode architectures, Schottky gate p-GaN/AlGaN/GaN structures have gained prominence in commercial devices due to their superior suppression of gate leakage current compared to ohmic gate contacts [5]. Despite these advantages, the reliability of the gate stack under positive gate bias remains a critical concern. When a positive gate voltage is applied, strong electric fields develop at the reverse-biased Schottky gate electrode and the p-GaN junction. These fields can induce threshold voltage shifts and, in severe cases, lead to catastrophic device failure [6,7,8]. As a result, understanding and mitigating gate degradation mechanisms is essential for the long-term deployment of GaN-based power devices in safety-critical and mission-critical systems. Several studies have already reported the degradation of the p-GaN gate under varying temperatures, but most gate breakdown studies have focused on room temperature and high temperature [9,10,11,12,13,14]. However, there is growing interest in the performance of power electronics in low-temperature environments such as harsh outdoor applications, including space stations and polar regions. Accordingly, examining the gate reliability of p-GaN gate HEMTs at reduced temperatures is essential.

To address this, we systematically evaluate TDDB characteristics across a various temperature range, focusing on the impact of temperature on degradation behavior and long-term device reliability. Specifically, this paper investigates the lifetime evaluation of commercial devices through TDDB (Time-Dependent Dielectric Breakdown) stress tests conducted at room temperature, high temperature, and low temperature. Based on the results, Weibull plots were generated to predict the gate voltage conditions required for stable operation over a 10-year period. Additionally, to examine the temperature dependence of TDDB degradation in p-GaN/AlGaN/GaN HEMTs, TDDB stress tests were carried out under identical gate stress voltage at various temperatures, and the activation energy was extracted from the Arrhenius plot. The negative activation energy suggests that the degradation under forward gate voltage stress increases as the temperature decreases in p-GaN/AlGaN/GaN HEMTs.

2. Materials and Methods

The devices tested in this work are commercially available 650 V E-mode AlGaN/GaN HEMTs with a Schottky p-GaN gate (GS-065-004-1-L-TR) [15]. Figure 1 illustrates the device schematic of p-GaN/AlGaN/GaN HEMT [16]. The measurement of I-V characteristics and the TDDB test were performed using Keithley’s 2410 and 2651A source meters coupled with a vacuum chamber and temperature controller. Figure 2a and Figure 2b show I_D-V_G and I_G-V_G curves of a p-GaN HEMT from −10 to 175 °C, respectively. The threshold voltage defined at ID = 1 mA with V_D = 0.1 V was found to be 1.8 V at room temperature. For the TDDB experiment, a constant gate voltage was applied, and both the source and drain were set to ground. During the experiment, an abrupt increase in the gate stress current was identified as a failure at the gate stack of the device, and the test was repeated several times using identical devices with the same parameters.

3. Results and Discussion

A constant gate voltage is applied during time-dependent gate breakdown measurements, with both the source and drain maintained at 0 V. Given that the gate-rated voltage of the device is 10 V, the gate stress voltage conditions were set to 9.1, 9.3, and 9.5 V. The time-to-breakdown (t_BD) is identified as the critical point at which the gate stress current exhibits a sudden increase. The T_BD results were analyzed to create a Weibull plot, which was then utilized to predict gate lifetime voltages at different temperatures.

Even under identical gate voltage conditions and for devices with the same structure, the time to breakdown (TBD) varies among devices. This probabilistic behavior is effectively modeled using the Weibull distribution [17]. The Weibull plot is based on the Weibull cumulative distribution function (CDF), which describes the probability of failure (F(t)) before a given time (t) as F(t) = 1 − exp(−(t/η)β). From the Weibull plot, both the scale factor (η) and shape factor (β) can be determined.

Figure 3a,b show the TBD measurement results at T of −10 °C and the corresponding Weibull plot derived from those results. The mean-time-to-failure (MTTF) corresponding to a 63% failure rate is 4973 s at 9.1 V, 755 s at 9.3 V, and 368 s at 9.5 V, showing a decrease as the stress voltage increases. Analysis based on Weibull distribution was proceeded in terms of the gate voltage other than the electric field because the electric field in the back-to-back gate diode of p-GaN/AlGaN/GaN structure is hardly straightforward compared with the oxide field of Si MOSFET.

Figure 4a shows the lifetime prediction at −10 °C, which is determined to be 7.45 V. This result is 0.7 V lower than the 10-year lifetime voltage at 60 °C, indicating that gate degradation in p-GaN HEMT becomes more severe at lower temperatures.

Figure 5 illustrates the schematic energy band diagram of the p-GaN gate HEMT under positive gate stress. In the Schottky-type p-GaN gate, applying a strong positive gate bias results in the injection of a considerable number of holes from the gate electrode into the p-GaN region. These holes either accumulate or become trapped at the p-GaN/AlGaN interface, effectively lowering the AlGaN energy barrier. Consequently, the electrons in the two-dimensional electron gas channel can overcome the lowered AlGaN barrier and move into the p-GaN region. As electrons reach the depletion of p-GaN, they interact with the holes present in the p-GaN layer. Under the influence of the strong electric field within the p-GaN layer, both carriers are energized as they accelerate significantly. The energized carriers induce impact ionization, leading to the formation of defects within the gate/p-GaN interface and the p-GaN layer, thereby causing degradation [18,19]. Under high-temperature stress, hole release from the p-GaN/AlGaN interface can be intensified. This results in a higher AlGaN energy barrier, effectively suppressing electron injection from the 2DEG into the p-GaN region. Consequently, the time-to-breakdown is extended at higher temperatures [20,21,22].

To analyze the temperature dependence of t_BD, a gate stress voltage of 9.5 V was performed at various temperatures. Prior to the TDDB test, a gate step voltage stress experiment was conducted in the range of 0.5 V to 10 V with 0.5 V increments. Based on the experimental results, a gate breakdown voltage of 10 V was observed across all three temperatures, and the TDDB stress voltage was accordingly set to 9.5 V for each temperature condition. To examine TDDB characteristics under varying thermal conditions, experiments were conducted at −10, 25, and 60 °C with a step of 35 °C, and the experiments were repeated under the same gate stress for each temperature. The mean-time-to-failure (MTTF) corresponding to a 63% failure rate is 251 s at −10 °C, 501 s at 25 °C, and 1977 s at 60 °C, respectively, showing that low temperature accelerates the gate degradation in p-GaN HEMTs. As seen in Figure 6b, the shape factors(β) extracted from the Weibull plot are 4.73, 3.65, and 2.37 for −10, 25, and 60 °C, respectively, indicating that there is an increase in β with decreasing temperature. This suggests that the variation in time-to-breakdown (TBD) among devices becomes smaller at lower temperatures.

And as seen in Figure 7, the activation energy of −0.22 eV was extracted from the Arrhenius plot, which means that the degradation caused by forward gate voltage stress intensifies as the temperature decreases.

4. Conclusions

In conclusion, the gate degradation of p-GaN gate HEMTs under positive gate voltage has been analyzed at low temperatures. The 10-year rated voltage was determined from the Weibull plot, revealing that the value at −10 °C is lower than that at 60 °C. The activation energy of −0.22 eV was extracted from the Arrhenius plot, indicating that gate degradation in the p-Gan HEMTs is accelerated at low temperature. Under positive gate stress, degradation is caused by hole accumulation at the p-GaN/AlGaN interface, which facilitates electron injection from the 2DEG into the p-GaN region. The acceleration of these electrons by the gate electric field facilitates defect formation, ultimately causing breakdown. At high temperatures, the release of holes reduces the accumulation of positive charges, thereby extending the degradation time.