Investigation of Temperature-Dependent Gate Degradation in Normally-Off AlGaN/GaN High-Electron-Mobility Transistor p-GaN
Round 1
Reviewer 1 Report
Comments and Suggestions for AuthorsThis work reports a temperature-dependent gate degradation of Schottky-type p-GaN gate high electron mobility transistors (HEMTs) under positive gate voltage stress at low temperature, which still needs exploration. The conclusion of this work is interesting, but I still have some questions about the methods.
- The authors mention that the MTTF of the HEMT is 368s at -10℃ with VG of 9.5V in Fig. 3(a) and (b), while the MTTF of the HEMT is 251s at -10℃ with VG of 9.5V in Fig. 6(a) and (b). Why do the authors choose two different sets of data here?
- According to the reference [1], the temperature-dependent gate degradation increases as the temperature increases in the range of 25-75℃. However, the data in this work shows a better gate reliability at 60℃ compared to that at room temperature. Authors need to check the accuracy of data and data processing. If the data is accurate, the authors need to further analyze the results in conjunction with references.
[1] M. Ťapajna, O. Hilt, E. Bahat-Treidel, J. Würfl and J. Kuzmík, "Gate Reliability Investigation in Normally-Off p-Type-GaN 208 Cap/AlGaN/GaN HEMTs Under Forward Bias Stress," in IEEE Electron Device Letters, vol. 37, no. 4, pp. 385-388, April 2016, 209 doi: 10.1109/LED.2016.2535133.
- The authors say “When devices are subjected to high-temperature stress, the release of holes from the p-GaN/AlGaN interface can be enhanced. This results in a higher AlGaN energy barrier, effectively suppressing electron injection from the 2DEG into the p-GaN region.” I believe the theory is correct, but it has some temperture scope. For instance, when the temperature increases, the channel electron energy increases, which will increase the possibility of electron injection into p-GaN region. Therefore, the effect of temperature on carrier behavior is very complicated, and the authors need more data or references to improve the theoretical explanation.
There are some small mistakes in the paper.
Line 77: The-time-to breakdown(tBD)
Line 82: "the time to breakdown(tBD)" is repetitive
Line 111: Gate/p-GaN
Line144: time-to-breakdown(tBD)
Line 168-170: p-Gan
Author Response
1.The authors mention that the MTTF of the HEMT is 368s at -10℃ with VG of 9.5V in Fig. 3(a) and (b), while the MTTF of the HEMT is 251s at -10℃ with VG of 9.5V in Fig. 6(a) and (b). Why do the authors choose two different sets of data here?
-->Fig. 3 analyzes the MTTF at different gate voltages, whereas Fig. 6 examines the MTTF variation with temperature at a fixed gate voltage of 9.5 V. Since the purpose of experiments is different, we used data from different device groups for these measurements. E-mode GaN technology is not mature yet and they have some device-to-device variation in device characteristic parameters although we tested commercialized discrete devices. We had two different group (or batch) of devices in terms of purchase period, so each group was tested separately depending on the experiment purpose, i.e voltage dependence or temperature dependence.
2.According to the reference [1], the temperature-dependent gate degradation increases as the temperature increases in the range of 25-75℃. However, the data in this work shows a better gate reliability at 60℃ compared to that at room temperature. Authors need to check the accuracy of data and data processing. If the data is accurate, the authors need to further analyze the results in conjunction with references.
[1] M. Ťapajna, O. Hilt, E. Bahat-Treidel, J. Würfl and J. Kuzmík, "Gate Reliability Investigation in Normally-Off p-Type-GaN 208 Cap/AlGaN/GaN HEMTs Under Forward Bias Stress," in IEEE Electron Device Letters, vol. 37, no. 4, pp. 385-388, April 2016, 209 doi: 10.1109/LED.2016.2535133
--> Measurement results from P-GaN devices, as reported in recent studies below, indicate that degradation becomes more severe as the temperature decreases.
Previous studies 1: F. Masin, M. Meneghini, E. Canato, C. De Santi, A. Stockman, E. Zanoni, P. Moens, G. Meneghesso; Positive temperature dependence of time-dependent breakdown of GaN-on-Si E-mode HEMTs under positive gate stress. Appl. Phys. Lett. 29 July 2019; 115 (5): 052103.
Previous studies 2: J. He et al., "Low-Temperature Accelerated Gate Reliability of Schottky-type p-GaN Gate HEMTs," 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Vienna, Austria, 2020, pp. 290-293, doi: 10.1109/ISPSD46842.2020.9170191.
3.The authors say “When devices are subjected to high-temperature stress, the release of holes from the p-GaN/AlGaN interface can be enhanced. This results in a higher AlGaN energy barrier, effectively suppressing electron injection from the 2DEG into the p-GaN region.” I believe the theory is correct, but it has some temperature scope. For instance, when the temperature increases, the channel electron energy increases, which will increase the possibility of electron injection into p-GaN region. Therefore, the effect of temperature on carrier behavior is very complicated, and the authors need more data or references to improve the theoretical explanation.
-->Previous studies [20] explain that as temperature increases, scattering increases, leading to a reduction in carrier acceleration and impact ionization. Consequently, we understand that higher temperatures result in reduced channel electron injection into the P-GaN layer.
Previous study: F. Masin, M. Meneghini, E. Canato, C. De Santi, A. Stockman, E. Zanoni, P. Moens, G. Meneghesso; Positive temperature dependence of time-dependent breakdown of GaN-on-Si E-mode HEMTs under positive gate stress. Appl. Phys. Lett. 29 July 2019; 115 (5): 052103.
Author Response File: 
Author Response.pdf
Reviewer 2 Report
Comments and Suggestions for AuthorsThe manuscript investigates the temperature dependent reliability analysis of AlGaN/GaN HEMT with p-GaN. Although the manuscript is well organized, I have few suggestions for the improvement and acceptability of the mauscript as follows:
i) The abbreviation in the abstract is not correct. It could be either TDDB or TBD. Please correct this.
ii) Discuss elaborately the advantages of p-GaN Schottky gate. What if the contact is non-rectifying?
iii) Please mention the device model in page 2.
iv) The authors should include more values for gate stress while measuring the TDDB such as 9.7 V , 9.9 V.
v) Why the authros did not test upto negative 40 degree Celsius?
vi) The step size of 35 degrees seem too large. The authors should use smaller step size while measuring the MTTF.
vii) Also, please mention why you chose 9.5 V for TBD characteristics and Weibull plot.
Comments on the Quality of English LanguageThe English language my be improved.
Author Response
1. The abbreviation in the abstract is not correct. It could be either TDDB or TBD. Please correct this.
--> Corrected as suggested on page1, line 9.
2. Discuss elaborately the advantages of p-GaN Schottky gate. What if the contact is non-rectifying?
--> If a non-rectifying contact (ohmic contact) is used, the gate leakage current increases compared to a Schottky gate contact. It limits the gate drivability because large gate bias cannot be applied. That’s why most commercialized GaN devices employ Schottky gate other than Ohmic gate.
3.Please mention the device model in page 2.
-->added as suggested on page 2, line 64.
4.The authors should include more values for gate stress while measuring the TDDB such as 9.7 V , 9.9 V.
--> At a temperature of -10 ℃ and gate voltages above 9.5 V, gate failure occurred rapidly during the TDDB test with large deviation, making it difficult to obtain reliable data. Therefore, we conducted experiments at gate voltages of 9.1 V, 9.3 V, and 9.5 V.
5.Why did the authors not test up to negative 40 degree Celsius?
--> I am afraid that the temperature range was limited by our equipment capacity. We utilized an ethanol cooling chiller, which had a temperature setting limitation of -10 ℃.
6.The step size of 35 degrees seem too large. The authors should use smaller step size while measuring the MTTF.
--> In this study, we aimed to analyze the TDDB characteristics in both low-temperature condition and typical operating conditions at room temperature. Accordingly, we set the temperature conditions at -10 ℃, 25 ℃, and 60 ℃. In future research, we plan to conduct experiments with more refined temperature settings using JEDEC standard of 15 degrees spacing.
7.Also, please mention why you chose 9.5 V for TBD characteristics and Weibull plot.
--> We conducted a gate step voltage stress experiment at temperature conditions of -10 ℃, 25 ℃, and 60 ℃ (VG,stress = 0.5~10 V, with a 0.5 V step). From these experiments, we extracted the gate breakdown voltage of 10 V for all three temperature conditions. Then we chose 9.5 V for TBD and Weibull analysis because it was the highest voltage that we could obtain reliable and confirmative data at room temperature.
Author Response File: Author Response.pdf
Reviewer 3 Report
Comments and Suggestions for Authors1．The author predicted the device lifetime through TDDB measurements. Various models have been proposed to describe the voltage acceleration behavior of breakdown time, such as the E model and the 1/E model. Please specify which model was adopted in this study and why choose it.
2．The authors suggest that under forward gate bias, holes are injected from the gate into the p-GaN layer and subsequently accumulate at the p-GaN/AlGaN interface or become trapped by defects. However, in Figure 5, only hole accumulation is presented, while the process of hole trapping is not depicted.
3．The Arrhenius plot fitting in the letter is based on only three data points, which may affect the accuracy of the fitting. It is recommended to use at least four to five data points for improved credibility.
4．Since Figure 7 consists of only one image, there is no need to label it as Fig. 7(a).
5．The letter mentions that the negative activation energy indicates exacerbated degradation at lower temperatures. Have previous researchers reported similar conclusions before? How to explain this negative action energy based on physical mechanism?
Author Response
1.The author predicted the device lifetime through TDDB measurements. Various models have been proposed to describe the voltage acceleration behavior of breakdown time, such as the E model and the 1/E model. Please specify which model was adopted in this study and why choose it.
--> Due to Schottky gate p-GaN HEMT’s complex gate structure, back-to-back diode structure of gate is formed, and gate field cannot be calculated straightforwardly as is MOSFET. In this work, a voltage-accelerated TDDB model was adopted instead of a conventional field-based model, due to the difficulty of defining an effective electric field across the Schottky-type p-GaN gate structure.
2.The authors suggest that under forward gate bias, holes are injected from the gate into the p-GaN layer and subsequently accumulate at the p-GaN/AlGaN interface or become trapped by defects. However, in Figure 5, only hole accumulation is presented, while the process of hole trapping is not depicted.
--> A diagram of the hole trapping phenomenon was added in Fig. 5.
3.The Arrhenius plot fitting in the letter is based on only three data points, which may affect the accuracy of the fitting. It is recommended to use at least four to five data points for improved credibility.
--> The three temperature conditions were chosen because the equipment could not be set below -10 ℃, and at temperatures above 60 ℃, the stress test duration increased significantly, making the experiments difficult to conduct. Therefore, these three temperature conditions were selected to ensure a reliable analysis. Also, the 3T reliability test is a standard procedure. In future research, we plan to set more refined temperature intervals to obtain additional data points.
Previous studies 1: Jiabei He, Jin Wei, Yang Li, Zheyang Zheng, Song Yang, Baoling Huang, Kevin J. Chen; Characterization and analysis of low-temperature time-to-failure behavior in forward-biased Schottky-type p-GaN gate HEMTs. Appl. Phys. Lett. 1 June 2020; 116 (22): 223502.
Previous studies 2: F. Masin, M. Meneghini, E. Canato, C. De Santi, A. Stockman, E. Zanoni, P. Moens, G. Meneghesso; Positive temperature dependence of time-dependent breakdown of GaN-on-Si E-mode HEMTs under positive gate stress. Appl. Phys. Lett. 29 July 2019; 115 (5): 052103.
4.Since Figure 7 consists of only one image, there is no need to label it as Fig. 7(a).
--> The label was revised.
5.The letter mentions that the negative activation energy indicates exacerbated degradation at lower temperatures. Have previous researchers reported similar conclusions before? How to explain this negative action energy based on physical mechanism?
--> There are previous studies on p-GaN that have reported negative activation energy values. As the temperature increases, hole emission at the p-GaN/AlGaN interface increases, maintaining a higher AlGaN energy barrier. Consequently, electron injection from the 2DEG into the p-GaN region is suppressed, ultimately mitigating gate degradation in p-GaN devices as the temperature rises.
Previous studies 1: Jiabei He, Jin Wei, Yang Li, Zheyang Zheng, Song Yang, Baoling Huang, Kevin J. Chen; Characterization and analysis of low-temperature time-to-failure behavior in forward-biased Schottky-type p-GaN gate HEMTs. Appl. Phys. Lett. 1 June 2020; 116 (22): 223502.
Previous studies 2: F. Masin, M. Meneghini, E. Canato, C. De Santi, A. Stockman, E. Zanoni, P. Moens, G. Meneghesso; Positive temperature dependence of time-dependent breakdown of GaN-on-Si E-mode HEMTs under positive gate stress. Appl. Phys. Lett. 29 July 2019; 115 (5): 052103.
Author Response File: Author Response.pdf
Round 2
Reviewer 1 Report
Comments and Suggestions for AuthorsI appreciate the authors for taking my suggestions into account; most of my concerns have been effectively addressed.
Author Response
We sincerely thank the reviewer for the encouraging feedback. We are glad that our revisions have effectively addressed your concerns.
Reviewer 2 Report
Comments and Suggestions for AuthorsI would like to thank the authors for clearing my doubts. The manuscript is much better now and can be accepted.
Author Response
We truly appreciate your thoughtful comments and are pleased to know that the revised manuscript has met your expectations. Thank you for your positive evaluation.
