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Volume 11
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10.3390/electronics11071115
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Article

Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield

by
Chung-Huang Yeh
*,†,
Jwu-E Chen
†,
Chia-Jui Chang
and
Tse-Chia Huang
Department of Electrical Engineering, National Central University, Taoyuan 300, Taiwan
*
Author to whom correspondence should be addressed.
†
These authors contribute equally to this work.
Electronics 2022, 11(7), 1115; https://doi.org/10.3390/electronics11071115
Submission received: 3 March 2022 / Revised: 29 March 2022 / Accepted: 29 March 2022 / Published: 31 March 2022
(This article belongs to the Section Circuit and Signal Processing)
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Abstract

In this work, we use statistical concepts to evaluate the joint probability distribution of manufacturing and test parameters and estimate the future trend of wafer test yield. Owing to the difference between the development speeds of testing technology and manufacturing technology, the testing capability of wafers is far behind the manufacturing capability of the semiconductor. Therefore, with the advancement in technology, the test yield loss caused by the tester inaccuracy has become an important problem. In this article, we propose an enhanced integrated circuit (IC) test scheme (ITS) that uses multiplex testing to improve test quality and test pass rate by retesting, and we rely on the cost evaluation mechanism to obtain the best test and the best profit. Furthermore, the International Roadmap for Devices and Systems (IRDS) 2017 data are used to estimate future test yield trends, and the results prove that the enhanced test scheme (ETS) can effectively estimate the best retest time to obtain the best test yield and the best profit.
Keywords: guardband test; threshold test; test quality; defect level; manufacturing yield guardband test; threshold test; test quality; defect level; manufacturing yield

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MDPI and ACS Style

Yeh, C.-H.; Chen, J.-E.; Chang, C.-J.; Huang, T.-C. Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield. Electronics 2022, 11, 1115. https://doi.org/10.3390/electronics11071115

AMA Style

Yeh C-H, Chen J-E, Chang C-J, Huang T-C. Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield. Electronics. 2022; 11(7):1115. https://doi.org/10.3390/electronics11071115

Chicago/Turabian Style

Yeh, Chung-Huang, Jwu-E Chen, Chia-Jui Chang, and Tse-Chia Huang. 2022. "Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield" Electronics 11, no. 7: 1115. https://doi.org/10.3390/electronics11071115

APA Style

Yeh, C.-H., Chen, J.-E., Chang, C.-J., & Huang, T.-C. (2022). Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield. Electronics, 11(7), 1115. https://doi.org/10.3390/electronics11071115

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