# True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices

^{*}

## Abstract

**:**

## 1. Introduction

- a novel approach to generate true random numbers based on RO-PUF design for FPGA devices;
- four possible TRNG implementations that can be derived from the configurability of the RO-PUF design to generate random numbers based on the combination of the relative position of the competing ROs and the type of coding of the counters;
- demonstration of random number generation capability of the four possible TRNG implementations, one without the need of any post-processing stage, and by means of the XOR bias corrector in the remaining three configurations;
- assessment and validation of the randomness degree of the TRNG implementations by means of the NIST 800-22 standard and NIST 800-90b recommendation;
- integration of two hardware security primitives in a compact design, optimizing both resource and power consumption.

## 2. Background

#### 2.1. Random Number Generators

#### 2.2. RO-Based PUFs

## 3. PUF/TRNG Design and Implementation

#### 3.1. Variability/Entropy Unit

#### 3.2. RO Pair Selection Strategy

#### 3.3. Output Bit Repository

#### 3.4. PUF/TRNG IP Integration

#### 3.5. Output Bits Characterization

- Stability (${S}_{i}$): This provides a measure of the the capacity of the i-th bit of the counters to obtain the same value in response to successive invocations of the PUF/TRNG module, thus determining the level of reproducibility of this value. Its ideal value is 1, and it is calculated through Equation (4) as the average of n RO pair competitions, where the stability of each j-th RO pair is calculated according to Equation (5).$${S}_{i}=\frac{1}{n}\sum _{j=1}^{n}{s}_{i,j}\left(R{O}_{j}\right)\phantom{\rule{14.22636pt}{0ex}}$$$${s}_{i,j}\left(R{O}_{j}\right)=\left\{\begin{array}{cc}{p}_{j}({b}_{i}=1)\hfill & \mathrm{if}\phantom{\rule{14.22636pt}{0ex}}{p}_{j}({b}_{i}=1)\ge 0.5\hfill \\ 1-{p}_{j}({b}_{i}=1)\hfill & \mathrm{if}\phantom{\rule{14.22636pt}{0ex}}{p}_{j}({b}_{i}=1)<0.5,\hfill \end{array}\right.$$$${p}_{j}({b}_{i}=1)=\frac{1}{t}\sum _{k=1}^{t}{b}_{i,j,k}\phantom{\rule{14.22636pt}{0ex}}$$
- Probability (${P}_{i}$): This represents the feasibility of obtaining the value ’1’ in the i-th position of the counters in n competitions, which allows the possible bias in the PUF/TRNG output to be analyzed. Its ideal value is 0.5, and it is calculated as the average probability for all the RO pairs and all the comparisons, as shown in Equation (7).$${P}_{i}=P({b}_{i}=1)=\frac{1}{n}\sum _{j=1}^{n}{p}_{j}({b}_{i}=1)$$The values of these metrics taken into account in our design of the PUF/TRNG correspond to the means calculated on the total number of PUF implementations (m).
- Entropy intra (Hintra): This calculates the uncertainty that exist to obtain the value 0 or 1 in the i-th bit of the counters in n RO pair competitions. It is calculated, through Equations (8)–(10), as an average measurement over the m implementations of the PUF/TRNG (in the same or in different FPGAs), 1 being its ideal value.$$Hintr{a}_{i}=-\frac{1}{m}\sum _{l=1}^{m}{p}_{l}\left(0\right)(lo{g}_{2}\left({p}_{l}\left(0\right)\right)+{p}_{l}\left(1\right)(lo{g}_{2}\left({p}_{l}\left(1\right)\right)$$$$\mathrm{where}\phantom{\rule{14.22636pt}{0ex}}{p}_{l}\left(1\right)=\frac{1}{n}\sum _{j=1}^{n}maj(R{O}_{j},i),\phantom{\rule{14.22636pt}{0ex}}{p}_{l}\left(0\right)=1-{p}_{l}\left(1\right)$$$$\mathrm{and}\phantom{\rule{14.22636pt}{0ex}}maj(R{O}_{j},i)=round\left(\frac{1}{t}\sum _{k=1}^{t}{b}_{i,j,k}\right)$$
- Entropy inter (Hinter): Like Hintra, this metric indicates the measure of the uncertainty to obtain the value 0 or 1 in the i-th bit of the counters, but differs in that it calculates the average over the results of competitions of n RO pairs located in the same position of different FPGAs. Both entropy values are useful for determining the uniqueness property of the bits. Its ideal value is 1, and it is calculated through Equations (11)–(13).$$Hinte{r}_{i}=-\frac{1}{n}\sum _{j=1}^{n}\left({p}_{j}\left(0\right)\right(lo{g}_{2}\left({p}_{j}\left(0\right)\right)+{p}_{j}\left(1\right)\left(lo{g}_{2}\left({p}_{j}\left(1\right)\right)\right)$$$$\mathrm{where}\phantom{\rule{14.22636pt}{0ex}}{p}_{j}\left(1\right)=\frac{1}{m}\sum _{l=1}^{m}maj(R{O}_{j},i),\phantom{\rule{14.22636pt}{0ex}}{p}_{j}\left(0\right)=1-{p}_{j}\left(1\right)$$$$\mathrm{and}\phantom{\rule{14.22636pt}{0ex}}maj(R{O}_{j},i)=round\left(\frac{1}{m}\sum _{l=1}^{m}{b}_{i,j,l}\right)$$

## 4. TRNG: Randomness Statistical Assessment and Entropy Source Validation

#### 4.1. TRNGs Assessment—NIST 800-22 Standard

#### 4.1.1. First Assessment Stage: Characterization of LSBs

- generate bit sequences of length bl = 480;
- generate 100 bit sequences for each TRNG;
- collect data from 24 candidate TRNGs;
- collect data from the 10 IP modules implemented in a test system.

#### 4.1.2. Second Assessment Stage: TRNG Configurations

- generate bit sequences of length bl = 1,000,000;
- generate 100 bit sequences for each TRNG;
- collect data from four candidate TRNGs;
- collect data from the 10 IP modules implemented in a test system.

#### 4.1.3. Third Assessment Stage: Bitstream Post-Processing

#### 4.1.4. Statistical Assessment Results

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## Abbreviations

RO | Ring Oscillator |

PUF | Physical Unclonable Function |

FPGA | Field Programmable Gate Array |

ASIC | Application-Specific Integrated Circuit |

MSFRO | Multistage Feedback Ring Oscillator |

PDLs | Programmable Delay Lines |

NL-FRO | Nonlinear Feedback Ring Oscillator |

NIST | National Institute of Standards and Technology |

PRNG | Pseudo-Random Number Generators |

TRNG | True-Random Number Generators |

SoC | System on Chip |

AXI | Advanced eXtensible Interface |

PL | Programmable Logic |

PS | Processing System |

HW | Hardware |

SW | Software |

LSB | Least Significant Bit |

MSB | Most Significatn Bit |

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**Figure 2.**(

**a**) A generic ring oscillator scheme with the enable stage and (

**b**) its jitter representation.

**Figure 4.**(

**a**) Variability/Entropy block diagram. (

**b**) Implementation scheme of 4 ROs of 4 stages in a CLB. (

**c**) RO pair comparison module.

**Figure 6.**(

**a**) FSM diagram to coordinate the interaction between the RO pair selection strategy, Variability/Entropy Unit, and Output Bit Repository blocks. (

**b**) Value of the FSM output signals in each state.

**Figure 7.**Stability, probability, and entropy metrics calculated for each bit of the counters under the binary-closest RO-PUF/TRNG configuration.

**Figure 8.**Color map of the rate of NIST 800-22 tests passed by each RO-PUF/TRNG implementation (the darker the color, the higher the pass rate) assessing raw data.

**Figure 9.**Color map of the rate of NIST 800-22 tests passed by each RO-PUF/TRNG implementation (the darker the color, the higher the pass rate) assessing data post-processed with von Neumann and Xor bit correctors.

**Figure 10.**Test pass rates of a TRNG (Binary/Farthest) using the NIST 800-22 standard when exposed to different temperature conditions.

Register | Type | Parameter | Description |
---|---|---|---|

CONTROL | input | no_chls | Number of competitions. |

PT | PUF/TRNG functionality. | ||

BG | Counter code type. | ||

NR | RO pair relative distance. | ||

PT_str | IP operation start. | ||

reset | Setting IP default values. | ||

PUFADDR | input | PT_addr | IP output memory read address. |

DATAOUT | output | ID | User-defined IP identifier. |

PT_addw | IP output memory write address. | ||

PT_end | IP operation end flag. | ||

PUFOUT | output | PT_out | IP output memory data. |

No. | Statistical Test | Min. Bitstream Length/Bit-Block Size |
---|---|---|

1 | Approximate Entropy | bs ≤ $lo{g}_{2}$(bl)-5 |

2 | Block Frequency Test | bl ≥ 10${}^{2}$ |

3 | Cumulative Sums (Cusum) ${}^{\u26052}$ | bl ≥ 10${}^{2}$ |

4 | Discrete Fourier (Spectral) Transform | bl ≥ 10${}^{3}$ |

5 | Frequency (Monobit) | bl ≥ 10${}^{2}$ |

6 | Linear Complexity | bl ≥ 10${}^{6}$ |

7 | Longest Run of Ones (Block) | bl ≥ 128 |

8 | Runs | bl ≥ 10${}^{2}$ |

9 | Non-overlapping Template Matching ${}^{\u2605148}$ | bl: refer to [43] |

10 | Overlapping Template Matching | bl ≥ 10${}^{6}$ |

11 | Rank Binary Matrix | bl ≥ 38912 |

12 | Random Excursions ${}^{\u26058}$ | bl ≥ 10${}^{6}$ |

13 | Random Excursions Variant ${}^{\u260518}$ | bl ≥ 10${}^{6}$ |

14 | Serial ${}^{\u26052}$ | bs ≤ $lo{g}_{2}$(bl)-2 |

15 | Maurer’s “Universal Statistical” | bl ≥ 387840 |

**Table 3.**Count of NIST 800-22 subset tests successfully passed by the random bit sequences extracted from the 24 feature combinations derived from the RO-PUF/TRNG design.

LSBs | 1 | 2 | 4 | |||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|

Loc. | CLOSEST | FARTHEST | CLOSEST | FARTHEST | CLOSEST | FARTHEST | ||||||||||||||||||

Code | G | B | G | B | G | B | G | B | G | B | G | B | ||||||||||||

Cntr | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 |

PUF 0 | 5 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 1 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 2 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 5 | 7 | 7 | 7 |

PUF 3 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 4 | 7 | 7 | 6 |

PUF 4 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 2 | 5 | 7 | 7 |

PUF 5 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 |

PUF 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 3 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 8 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 |

PUF 9 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 |

**Table 4.**Comparison of tests successfully approved by 4 LSBs collected from each entropy source against 4 LSBs concatenated from each counter within the NIST 800-22 subset.

LSBs | 4 | 4${}^{\u2020}$ | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|

Location | CLOSEST | FARTHEST | CLOSEST | FARTHEST | ||||||||

Counter Code | G | B | G | B | G | B | G | B | ||||

Counter | 1 | 2 | 1 | 2 | 1 | 2 | 1 | 2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |

PUF 0 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 1 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 2 | 7 | 7 | 7 | 7 | 5 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 3 | 7 | 7 | 7 | 7 | 4 | 7 | 7 | 6 | 7 | 7 | 7 | 7 |

PUF 4 | 7 | 7 | 7 | 7 | 2 | 5 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 5 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 7 | 3 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 8 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

PUF 9 | 7 | 7 | 7 | 7 | 6 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |

^{†}: 2 LSBs concatenated from each counter. G: Gray code. B: Binary code.

LSBs | 4${}^{\u2020}$ | |||
---|---|---|---|---|

Counter Code | Gray | Binary | ||

Location | Closest | Farthest | Closest | Farthest |

Counter | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |

PUF 0 | 9 | 11 | 11 | 15 |

PUF 1 | 10 | 13 | 12 | 15 |

PUF 2 | 10 | 13 | 11 | 15 |

PUF 3 | 10 | 12 | 12 | 15 |

PUF 4 | 9 | 12 | 11 | 15 |

PUF 5 | 10 | 12 | 12 | 15 |

PUF 6 | 10 | 11 | 13 | 15 |

PUF 7 | 10 | 11 | 12 | 15 |

PUF 8 | 11 | 12 | 10 | 15 |

PUF 9 | 8 | 10 | 10 | 15 |

^{†}: 2 LSBs concatenated from each counter.

Inputs | Outputs | |
---|---|---|

von Neumann | XOR | |

0 0 | none | 0 |

0 1 | 1 | 1 |

1 0 | 0 | 1 |

1 1 | none | 0 |

LSBs | 4 ^{†} | |||||
---|---|---|---|---|---|---|

Corrector | von Neumann | XOR | ||||

Counter Code | Gray | Binary | Gray | Binary | ||

Location | Closest | Farthest | Closest | Closest | Farthest | Closest |

Counter | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 | 1 & 2 |

PUF 1 | 10 | 12 | 13 | 15 | 15 | 15 |

PUF 2 | 13 | 15 | 13 | 15 | 15 | 15 |

PUF 3 | 13 | 10 | 13 | 15 | 15 | 15 |

PUF 4 | 11 | 11 | 11 | 15 | 15 | 15 |

PUF 5 | 11 | 11 | 10 | 15 | 15 | 15 |

PUF 6 | 12 | 11 | 13 | 15 | 15 | 15 |

PUF 7 | 10 | 11 | 11 | 15 | 15 | 15 |

PUF 8 | 12 | 13 | 13 | 15 | 15 | 15 |

PUF 9 | 13 | 13 | 15 | 15 | 15 | 15 |

PUF 10 | 10 | 11 | 11 | 15 | 15 | 15 |

^{†}: 2 LSBs concatenated from each counter.

**Table 8.**Average test pass rate of 4 TRNGs using the NIST 800-22 statistical test suite against related works.

Test | This Work | [24] | [17] | [44] | [29] | [23] | [22] | ||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|

XOR | R | R | PP | XOR | VN | A | B | ||||||

GC | GF | BC | BF | 3LSB | 3LSB | ||||||||

1 | 98 | 98 | 98 | 97 | 98 | 98 | 100 | 98 | 98 | 95 | 100 | 100 | 99 |

2 | 99 | 98 | 98 | 99 | 99 | 99 | 95 | 100 | 99 | 99 | 100 | 99 | 99 |

3 | 98 | 98 | 98 | 97 | 98 | 98 | 95 | 99 | 98 | 99 | 98 | 100 | 98 |

4 | 98 | 98 | 99 | 98 | 99 | 99 | 100 | 98 | 100 | 100 | 97 | 98 | 98 |

5 | 99 | 98 | 99 | 97 | 99 | 99 | 95 | 99 | 99 | 99 | 97 | 100 | 98 |

6 | 99 | 98 | 98 | 98 | 98 | 98 | 100 | 99 | 98 | 99 | 96 | 96 | 98 |

7 | 99 | 99 | 99 | 98 | 98 | 99 | 100 | 98 | 99 | 100 | 100 | 99 | 98 |

8 | 99 | 99 | 99 | 99 | 99 | 99 | 100 | 99 | 98 | 94 | 96 | 96 | 98 |

9 | 98 | 98 | 99 | 98 | 98 | 99 | 100 | 99 | 95 | 97 | 99 | 98 | 98 |

10 | 98 | 98 | 98 | 98 | 98 | 99 | 100 | 99 | 99 | 99 | 100 | 100 | 98 |

11 | 98 | 98 | 98 | 98 | 98 | 98 | 100 | 99 | 98 | 99 | 100 | 100 | 98 |

12 | 99 | 99 | 99 | 98 | 99 | 99 | 100 | 99 | 100 | 99 | 100 | 98 | 99 |

13 | 99 | 98 | 99 | 97 | 98 | 98 | 100 | 98 | 100 | 100 | 99 | 100 | 99 |

14 | 98 | 98 | 98 | 98 | 98 | 99 | 100 | 99 | 100 | 99 | 98 | 100 | 98 |

15 | 98 | 98 | 98 | 98 | 99 | 99 | 95 | 99 | 100 | 100 | 97 | 99 | 99 |

$\mu $ | 98.5 | 98.2 | 98.5 | 97.9 | 98.4 | 98.7 | 98.7 | 98.8 | 98.7 | 98.5 | 98.5 | 98.9 | 98.3 |

XOR | Raw | ||||
---|---|---|---|---|---|

GC | GF | BC | BF | ||

IID | IID Permutation | Pass | Pass | Pass | Pass |

Chi-square Independence | Pass | Pass | Pass | Pass | |

Chi-square Goodness-of-fit | Pass | Pass | Pass | Pass | |

LRS Test | Pass | Pass | Pass | Pass | |

Non-IID | Most Common Value Estimate | 0.995915 | 0.995351 | 0.995543 | 0.993609 |

Collision Estimate | 0.917535 | 0.905876 | 0.896818 | 0.895582 | |

Markov Estimate | 0.999247 | 0.999097 | 0.997907 | 0.998003 | |

Compression Estimate | 0.836274 | 0.830815 | 0.882088 | 0.843385 | |

t-Tuple Estimate | 0.931433 | 0.921623 | 0.921623 | 0.939780 | |

LRS Estimate | 0.919974 | 0.996316 | 0.989705 | 0.986412 | |

MultiMCW Prediction Estimate | 0.998528 | 0.998482 | 0.996301 | 0.994446 | |

Lag Prediction Estimate | 0.995447 | 0.996420 | 0.995430 | 0.994662 | |

MultiMMC Prediction Estimate | 0.995224 | 0.996530 | 0.994583 | 0.996677 | |

LZ78Y Prediction Estimate | 0.997862 | 0.998061 | 0.996336 | 0.994705 |

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## Share and Cite

**MDPI and ACS Style**

Rojas-Muñoz, L.F.; Sánchez-Solano, S.; Martínez-Rodríguez, M.C.; Brox, P.
True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices. *Electronics* **2022**, *11*, 4028.
https://doi.org/10.3390/electronics11234028

**AMA Style**

Rojas-Muñoz LF, Sánchez-Solano S, Martínez-Rodríguez MC, Brox P.
True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices. *Electronics*. 2022; 11(23):4028.
https://doi.org/10.3390/electronics11234028

**Chicago/Turabian Style**

Rojas-Muñoz, Luis F., Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, and Piedad Brox.
2022. "True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices" *Electronics* 11, no. 23: 4028.
https://doi.org/10.3390/electronics11234028