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Peer-Review Record

Hardware/Software Solution for Low Power Evaluation of Tsunami Danger

J. Low Power Electron. Appl. 2022, 12(1), 6; https://doi.org/10.3390/jlpea12010006
by Mikhail Lavrentiev 1,*, Konstantin Lysakov 1, Andrey Marchuk 1,2, Konstantin Oblaukhov 1 and Mikhail Shadrin 1
Reviewer 1: Anonymous
Reviewer 2: Anonymous
J. Low Power Electron. Appl. 2022, 12(1), 6; https://doi.org/10.3390/jlpea12010006
Submission received: 13 November 2021 / Revised: 12 January 2022 / Accepted: 18 January 2022 / Published: 21 January 2022
(This article belongs to the Special Issue Low Power AI)

Round 1

Reviewer 1 Report

The introduction should clearly define the scope of the paper. The sentence in line 14 id not very clear. The abstract should clearly state that the paper is about simulating or preventing tsunami disasters. However from the paper result that the paper deals with the power consumption of computation of the simulation/prevention of the tsunami.
In line 75 the introduction describe the paper structure. This should be in new line and I recommend to describe all the chapters. 
There are some abbreviations, which are not defined. It is recommended to introduce a table of abbreviations.
The introduction also must discuss what are the previous results of other authors. In the references are most listed articles of the authors.
In the text please use impersonal wording instead of personal such as in line 131. Instead of  "We will evaluate" should be "It was evaluated" since the results of the paper were all ready done.
Line 179-163 describe the AXI interface of the external memory types. Please specify what is the difference between the Xilinx Memory Interface Generator (MIG)? Please refer to Figure 3 before it is presented. Also Figure 3 is not the "Xilinx VC709 schematic architecture" but is much more the proposed implementation in the VC709 board.
Figure 4 text should be under the text, with the same remark as for figure 3.
Table 1: Miss type error: Umber isn't it "Number?". In the table is is presented the Core i9-9900K having 8 PE. It is recommended to separate the processing elements supposed to be results of the research (not specified until line 217) and processors (core of i9).
Processor energy consumption need to be clarified. In the previous line of the table it is specified the whole system energy consumption, while processor energy consumption is related to each processor or just one?
Please specify the relation between the whole energy consumption and one processor energy consumption. Give equation and present the method how was measured? Also make clear difference in the table between power consumption and energy consumption.
IF the paper concentrate to the power consumption of the tsunami simulation/prevention system, then please give details on how it was calculated the energy consumption? It would be well come to present details about the processing element also? Is it a processor or is a special IP? 

Author Response

We are grateful for the Reviewers for their comments and criticism as well as for the time they spent analyzing our paper.

 

Point 1: The introduction should clearly define the scope of the paper. The sentence in line 14 id not very clear. The abstract should clearly state that the paper is about simulating or preventing tsunami disasters. However from the paper result that the paper deals with the power consumption of computation of the simulation/prevention of the tsunami.

 

Response 1: We add two sentences to the Abstract

Lines 11-13: “Carbon footprint reduction issues are drawing more and more attention these days. Reducing the energy consumption is among the basic directions along this line. In the paper the low energy approach in tsunami danger evaluation is concerned.”

Lines 16-22: “Currently, the main tool for studying tsunamis is computer modeling. In particular, the expected tsunami height near the coastline, when a major underwater earthquake is detected, can be estimated by a series of numerical experiments of various scenarios of generation and the following wave propagation. Reducing the calculation time of such scenarios and the necessary energy consumption for this is the scope of this study. Moreover, in case of the major earthquake, the electric power shut down is possible (like, e.g. the accident at the Fukushima nuclear power station in Japan on May 11, 2011),…”

 

Point 2: In line 75 the introduction describe the paper structure. This should be in new line and I recommend to describe all the chapters.

 

Response 2: It has been done, lines 92-120.

 

Point 3: There are some abbreviations, which are not defined. It is recommended to introduce a table of abbreviations.

 

Response 3: Section 5. Abbreviation List has been introduced after Materials and Methods.

 

Point 4: The introduction also must discuss what are the previous results of other authors. In the references are most listed articles of the authors.

 

Response 4: Self citations were reduced to the suggested by the journal 10%. References to alternative software tools were included at lines 55-62: “Currently, the most widely used software for the tsunami propagation modeling are: MOST (Method of Splitting Tsunamis, NOAA Pacific Marine Environmental Laboratory, Seattle, USA) [3], COMCOT (Cornell University, USA; NS Science, New Zeland) [4], TUNAMI - N1/TUNAMI‐N2 (Tohoku University, Japan) [5]. All these programs being realized on PC, are able to simulate tsunami in the approximately 107 nodes computation grid at a rate of actual tsunami propagation (1 hour of processing time for 1 hour tsunami travel-time).”

 

Point 5: In the text please use impersonal wording instead of personal such as in line 131. Instead of  "We will evaluate" should be "It was evaluated" since the results of the paper were all ready done.

 

Response 5: Corrections have been done at lines 55, 92, 114, 158, 178, 347, 358.

 

Point 6: Line 179-163 describe the AXI interface of the external memory types. Please specify what is the difference between the Xilinx Memory Interface Generator (MIG)? Please refer to Figure 3 before it is presented. Also Figure 3 is not the "Xilinx VC709 schematic architecture" but is much more the proposed implementation in the VC709 board.

 

Response 6:  Now the reference to Figure 3 is before the figure (line 210). Captures of the Figures 3,4 have been updated. Explanations for the memory interfaces were added, see lines 211-216: “Purpose of DMA controller is to transfer data between calculator, memory and host. Our DMA controller can work with any kind of memory/bus controllers which support AXI4-MM protocol. Specifically, in VC709, it is used to transfer data between PCIe IP-core (which implements AXI4 protocol) and Xilinx Memory Interface Generator (MIG) which controls DDR3/DDR4 memory and implements AXI4 protocol also. In case of ZCU106 it is used to transfer data between CPU memory and MIG.”

 

Point 7: Figure 4 text should be under the text, with the same remark as for figure 3.

 

Response 7:  Corrections were made.

 

Point 8: Table 1: Miss type error: Umber isn't it "Number?". In the table is presented the Core i9-9900K having 8 PE. It is recommended to separate the processing elements supposed to be results of the research (not specified until line 217) and processors (core of i9).

 

Response 8:  Corrections of Table 1 have been done.

 

Point 9: Processor energy consumption need to be clarified. In the previous line of the table it is specified the whole system energy consumption, while processor energy consumption is related to each processor or just one?

 

Response 9:  Explanations were inserted in Lines 264-281: System power consumption – average power, consumed by whole computation platform from ac wall socket, measured by ac power meter during computation. That includes power supply unit, motherboard, disks, CPU/FPGA etc. Processor power consumption – power consumed by CPU or FPGA, measured by power sensors installed on board near CPU/FPGA. That includes all CPU cores, FPGA fabric, memory/PCIe controllers, etc. Measured power (P) converted to energy (E) using following equation:

where T – time used for compute one iteration of algorithm on bathymetry with 3200x2000 points. Power/energy consumption of one PE wasn’t calculated since it’s near impossible to distinguish power consumed by PE from other elements in FPGA design. 

 

Point 10: Please specify the relation between the whole energy consumption and one processor energy consumption. Give equation and present the method how was measured? Also make clear difference in the table between power consumption and energy consumption.

 

Response 10:  See the Response 9.

 

Point 11: IF the paper concentrate to the power consumption of the tsunami simulation/prevention system, then please give details on how it was calculated the energy consumption? It would be well come to present details about the processing element also? Is it a processor or is a special IP? 

 

Response 11:  In addition to explanations in lines 264-281, functional of the Processor Element was explained in Lines 282-286: PE is a special IP that implements one step of MacCormack algorithm. It processes computation grid as sequential stream and computes one point of grid per clock cycle using computation pipeline. Each PE has cache memory to keep previous lines of grid and reduce memory access to one reading per iteration.

 

Author Response File: Author Response.pdf

Reviewer 2 Report

The paper presents an FPGA (inherently a low power) implementation of tsunami risk assessment algorithm, results suggesting a 10x power reduction with respect to a conventional PC implementation. A dedicated hardware accelerator was conceived to carry out the necessary computation on an FPGA platform for a McCormack model. The FPGA implementation inherently reduces processing time and power consumption. Unfortunately, it is hard to grasp the novelty of the paper, as the authors already published a big part of their results in ref [5]. My recommendation is "major review" (but interpret it as marginally reject).

Some observations to improve the quality of the communication:

  1. Highlight the novelty of the paper. The FPGA implementation of the McCormack model could be a novelty, but I think this was already achieved in ref. [5]. A low power consumption is achieved because dedicated hardware tends to be more efficient in many terms (speed, power consumption, aria, etc.) then implementation on general purpose computing platforms (CPU, GPU, etc.). I think this is not a groundbreaking novelty.
  2. The organization of the paper is not adequate for this journal. Usually after the Introduction section, the proposed approach is given (signal model, algorithms, etc.), then experimental/simulation results, finally conclusions.
  3. There are many exaggerated formulations in the paper. Just a few one: "tsunami danger" - tsunami warning or tsunami risk; "disaster tsunamis" - are there non-disaster tsunamis?? ; "pipeline computing" - maybe simple pipelining; "debug board" - maybe development board (devboard) or demonstration board (demoboard); "frequancy" - frequency; 
  4. The validation of the FPGA implementation is missing. How can you prove that the values returned by the FPGA are correct? What is the numerical accuracy with respect to the PC implementation?

Author Response

We are grateful for the Reviewers for their comments and criticism as well as for the time they spent analyzing our paper.

 

Point 1: Highlight the novelty of the paper. The FPGA implementation of the McCormack model could be a novelty, but I think this was already achieved in ref. [9]. A low power consumption is achieved because dedicated hardware tends to be more efficient in many terms (speed, power consumption, aria, etc.) then implementation on general purpose computing platforms (CPU, GPU, etc.). I think this is not a groundbreaking novelty.

 

 

Response 1: We agree that FPGA implementation of the McCormack model has been done earlier.  Presented paper discuss the new aspect of such implementation, namely low power consumption. This has not been earlier neither discussed, no measured. We do not believe that all research papers do contain real groundbreaking novelty but rather new elements like modified algorithms, measurements etc. In that sense the new results are presented in the paper. The paper abstract, describing the low power consumption of the previously proposed FPGA implementation, has been preliminary coordinated with the special issue guest editor.

 

Point 2: The organization of the paper is not adequate for this journal. Usually after the Introduction section, the proposed approach is given (signal model, algorithms, etc.), then experimental/simulation results, finally conclusions.

 

Response 2: Preparing the paper, the authors did follow the template, suggested by the journal. So, after Introduction, the Results section is displayed. The Materials and Methods section follows. We are ready to rearrange the paper body according to the new guidelines.

 

Point 3: There are many exaggerated formulations in the paper. Just a few one: "tsunami danger" - tsunami warning or tsunami risk; "disaster tsunamis" - are there non-disaster tsunamis?? ; "pipeline computing" - maybe simple pipelining; "debug board" - maybe development board (devboard) or demonstration board (demoboard); "frequancy" - frequency

 

Response 3: Some changes were made, namely pipelining (line 29), frequency (table 1).

The term “tsunami danger” has been used on purpose, it is necessary to provide the corresponding services with the information how dangerous this particular tsunami is at the selected part of the coast. It depends mostly of the expected maximal tsunami wave height. So, term “tsunami danger” specifies the general “tsunami warning”.

There are favorably many non-disaster tsunamis, having maximal tsunami heights compared to 1 m or even less.

 

Point 4: The validation of the FPGA implementation is missing. How can you prove that the values returned by the FPGA are correct? What is the numerical accuracy with respect to the PC implementation?

.

Response 4: The corresponding references was added to discussion, lines 347-350:

“The validity of the method proposed was confirmed by comparison of numerical results of several test problems against the ones obtained by MOST software [14]. The precision and reliability the MOST method [3] which currently is used by NOAA (USA) is undoubted.”

 

 

 

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

The authors partially responded to my concerns, still the quality of the communication can be further impoved. My remaining issues:

  1. Point 1: Highlight the novelty of the paper. I agree with the authors, there cannot be all the time groundbreaking novelties, but highlight your contribution to the field, such as measurements or test scenarios, etc.
  2.  Point 3: There are many exaggerated formulations in the paper. Please reconsider again all my suggestions.
  3. I think there are many void statements in the paper. For example in the abstract: "The approach to design special FPGA based processors for fast solution of various engineering problems using PC could be extended on other areas of human activity." Thera are many problems with this statement: a) it is way too obvious (the sky is blue and the grass is green - sure they are, but is does not contribute) b) "other areas of human activity" - sure it can, point out exactly the areas you have in mind, all of them. Throughout the paper you can find many of such statements. Please remove the obvious ones.

 

Author Response

We would like to express our appreciate to the Reviewer for taking the time to provide constructive comments on our paper.

 

 

  1. Point 1: Highlight the novelty of the paper. I agree with the authors, there cannot be all the time groundbreaking novelties, but highlight your contribution to the field, such as measurements or test scenarios, etc.

 

Response 1: We add the following lines 36-43 to the Abstract:

“Presented paper discuss the new aspect of such implementation, namely low energy consumption. The corresponding measurements for three platforms (personal computer and two types of FPGA) have been done, comparison of the obtained results of energy consumption are given. As the numerical simulation of numerous tsunami propagation scenarios from different sources are needed for the purpose of coastal tsunami zoning, the integrated amount of the saving energy is expected to be really valuable. At the time being practically nobody of tsunami researchers use FPGA-based acceleration of computer code execution. Perhaps, saving energy aspect is able to promote the use of FPGA in tsunami researches.”

 

In addition, the Introduction was updated with the following (lines 72-79):

“As was observed, the use of FPGA-based Calculator provides not only high performance calculating tsunami wave propagation, but also leads to saving energy. This new aspect in tsunami simulation is here estimated in numbers (measured) at several hardware platforms and compared. For the coastal areas tsunami zoning a number (say, thousands) scenarios with a variety of tsunami source parameters (geo location, shape, amplitude) are computed. So, being used  even within the tsunami research community, the use of FPGA may leads to valuable energy save.”

 

  1.  Point 3: There are many exaggerated formulations in the paper. Please reconsider again all my suggestions.

 

Response 2: We are grateful for all the suggestions and have tried to incorporate as many as we could. After the first revision, many of the changes have already been made to the manuscript. Exсept of tsunami related terms, all mentioned expressions have been corrected. In the response to the 1st review we provide some of the tsunami-related explanations, but we do not include them to the manuscript. We do not agree that the term “tsunami danger” (which cannot be equated to terms such as “tsunami warning” or “tsunami risk”) should be considered as exaggerated. If there is a very strong preference, we could add to the paper a section (approximately a page long) which would focus on some specific features of tsunami research (like tsunami mitigation measures). However, in our opinion, it would widen the scope of the paper and deviate from its original goals.

 

  1. I think there are many void statements in the paper. For example in the abstract: "The approach to design special FPGA based processors for fast solution of various engineering problems using PC could be extended on other areas of human activity." Thera are many problems with this statement: a) it is way too obvious (the sky is blue and the grass is green - sure they are, but is does not contribute) b) "other areas of human activity" - sure it can, point out exactly the areas you have in mind, all of them. Throughout the paper you can find many of such statements. Please remove the obvious ones.

 

Response 3: Given a very long list of potential areas, where FPGA-based hardware acceleration of the computer code execution could be applied, we have provided in the Abstract (lines 43-47) a few illustrative examples, where the use of Graphic Processing Units (GPUs) is successful. Hence, with the help of FPGA even better performance (which is certainly on demand) is expected.

New Lines 43-47: “The approach to design special FPGA based processors for fast solution of various engineering problems using PC could be extended on other areas, like, e.g. bioinformatics (motif search in DNA sequences and other algorithms of genome analysis, molecular dynamics), seismic data processing (3D wave package decomposition, data compression, noise suppression and so on).”

 

Regarding the request to remove all obvious statements throughout the paper, we would like for the Reviewer to consider why we have kept such statements in the paper. Given the multi-sectoral nature of energy efficiency and the interest to this topic by a wide range of audiences, we believe what may be obvious for professionals in a specific field may not seem so trivial for professional in other sectors. Our goal was also to make the paper accessible and digestible to the broad range of readers some of whom may not have the scientific background. If the Reviewer still feels strongly about this point, we would be grateful if the Reviewer marked in the paper all such statements for us to address.

Author Response File: Author Response.pdf

Round 3

Reviewer 2 Report

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