Next Article in Journal
The Dynamic Optimization of the Departure Times of Metro Users during Rush Hour in an Agent-Based Simulation: A Case Study in Shenzhen, China
Previous Article in Journal
A Transparent Decision Support Tool in Screening for Laryngeal Disorders Using Voice and Query Data
Article Menu
Issue 11 (November) cover image

Export Article

Open AccessArticle
Appl. Sci. 2017, 7(11), 1106; https://doi.org/10.3390/app7111106

A Hardware-Efficient Vector Quantizer Based on Self-Organizing Map for High-Speed Image Compression

1
Shanghai Advanced Research Institute, Chinese Academy of Sciences, Shanghai 201210, China
2
University of Chinese Academy of Sciences, Beijing 100049, China
3
School of Engineering, Hiroshima University, Hiroshima 739-8530, Japan
*
Authors to whom correspondence should be addressed.
Received: 28 September 2017 / Revised: 22 October 2017 / Accepted: 24 October 2017 / Published: 25 October 2017
Full-Text   |   PDF [2921 KB, uploaded 26 October 2017]   |  

Abstract

This paper presents a compact vector quantizer based on the self-organizing map (SOM), which can fulfill the data compression task for high-speed image sequence. In this vector quantizer, we solve the most severe computational demands in the codebook learning mode and the image encoding mode by a reconfigurable complete-binary-adder-tree (RCBAT), where the arithmetic units are thoroughly reused. In this way, the hardware efficiency of our proposed vector quantizer is greatly improved. In addition, by distributing the codebook into the multi-parallel processing sub-blocks, our design obtains a high compression speed successfully. Furthermore, a mechanism of partial vector-component storage (PVCS) is adopted to make the compression ratio adjustable. Finally, the proposed vector quantizer has been implemented on the field programmable gate array (FPGA). The experimental results indicate that it respectively achieves a compression speed of 500 frames/s and a million connections per second (MCPS) of 28,494 (compression ratio is 64) when working at 79.8 MHz. Besides, compared with the previous scheme, our proposed quantizer achieves a reduction of 8% in hardware usage and an increase of 33% in compression speed. This means the proposed quantizer is hardware-efficient and can be used for high-speed image compression. View Full-Text
Keywords: image compression; vector quantization; self-organizing map; FPGA image compression; vector quantization; self-organizing map; FPGA
Figures

Graphical abstract

This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
SciFeed

Share & Cite This Article

MDPI and ACS Style

Huang, Z.; Zhang, X.; Chen, L.; Zhu, Y.; An, F.; Wang, H.; Feng, S. A Hardware-Efficient Vector Quantizer Based on Self-Organizing Map for High-Speed Image Compression. Appl. Sci. 2017, 7, 1106.

Show more citation formats Show less citations formats

Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Related Articles

Article Metrics

Article Access Statistics

1

Comments

[Return to top]
Appl. Sci. EISSN 2076-3417 Published by MDPI AG, Basel, Switzerland RSS E-Mail Table of Contents Alert
Back to Top