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Article

Lorenz and Chua Chaotic Key-Based Dynamic Substitution Box for Efficient Image Encryption

by
Sarala Boobalan
* and
Sathish Kumar Gurunathan Arthanari
Department of Electronics and Communication Engineering, Sri Venkateswara College of Engineering Pennalur, Sriperumbudur 602117, Tamilnadu, India
*
Author to whom correspondence should be addressed.
Symmetry 2025, 17(8), 1296; https://doi.org/10.3390/sym17081296
Submission received: 8 July 2025 / Revised: 30 July 2025 / Accepted: 1 August 2025 / Published: 11 August 2025
(This article belongs to the Section Engineering and Materials)

Abstract

With the growing demand for secure image communication, effective encryption solutions are critical for safeguarding visual data from unauthorized access. The substitution box (S-box) in AES (Advanced Encryption Standard) is critical for ensuring nonlinearity and security. However, the static S-box used in AES is vulnerable to algebraic attacks, side-channel attacks, and so on. This study offers a novel Lorenz key and Chua key-based Reversible Substitution Box (LCK-SB) for image encryption, which takes advantage of the chaotic behavior of the Lorenz and Chua key systems to improve security due to nonlinear jumps and mixed chaotic behavior while maintaining optimal quantum cost, area, and power. The suggested method uses a hybrid Lorenz and Chua key generator to create a highly nonlinear and reversible S-box, which ensures strong confusion and diffusion features. The performance of the LCK-SB approach is examined on field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC) platforms, and the findings show that quantum cost, delay, and power are decreased by 97%, 74.6%, and 35%, respectively. Furthermore, the formal security analysis shows that the suggested technique efficiently resists threats. The theoretical analysis and experimental assessment show that the suggested system is more secure for picture encryption, making it suitable for real-time and high-security applications.

1. Introduction

Large amounts of sensitive information can be communicated over a network using images, necessitating the development of strong encryption techniques to secure them [1,2]. Lorenz equations have been extensively used in various stages of cryptosystem design for image ciphering [3,4,5]. In this study, a symmetric technique was constructed using the Lorenz equations and the Chua function.
In recent years, reversible computing has become popular. The main factor behind this is the need for low-power products. Losing information also results in energy loss. Information loss occurs when we cannot separate an input from its output [6]. The work of Karunamurthi et al. (2019) [7] suggested a reversible logic cryptographic design that uses a linear feedback shift register (LFSR) to make the key. The reversible logic cryptographic design (RLCD-LFSR) technique improves ASIC performance by 7% over the conventional approach. A dynamic, key-dependent S-box provides significant non-linearity and low correlation coefficients [8]. A reversible design directly maps the input and output parameters. Consequently, there is no loss of energy or information [9]. Thapliyal and Zwolinski [10] endeavored to develop a secure encryption technique utilizing reversible gates. This project presented a reversible logic-based ALU prototype for a crypto-robot, without concentrating on any particular cryptographic technique. Khan and Perkowski [11]. Datta et al. [12] delineated a 128-bit reversible AES method utilizing the Toffoli gate family. Using the reversible Ex-or-Sum-Of-Products (ESOP) method in this study led to a small improvement in the quantum cost and the number of reversible gates. Due to the S-box’s vulnerability to power analysis attacks, researchers have proposed various methods to enhance its implementation. Researchers initially deduced the combinational gate level using composite arithmetic (Zhang and Parhi, [13]). An enhanced PPRM architecture of an S-box with high speed was proposed by Manojkumar et al. (2019) [14] to encrypt and decrypt mammogramic images. The differential cascade preresolve adiabetic logic (DCPAL)-based S-box was proposed by Prathiba et al. (2018) [15] as a defense against differential power analysis attacks.
Varghese et al. (2019) [16] simulated Montgomery multiplication in VLSI, which provides minimum hardware complexity in the Galois field. Cavusoglu et al. (2017) [17] have implemented a novel chaos-based S-box for image encryption with high speed and security. In 2016, Manjula and Mohan [18] created a dynamic S-box that makes the AES block cipher stronger and safer by making the algorithm more spread out, confusing, and difficult to understand. Krishnan et al. (2017) [19] suggested using the cloud to modify AES and generate random S-boxes to improve security and stop side-channel attacks. Pammu et al. (2016) [20] proposed the AES algorithm with a mux lookup table with 30 × 30 security numbers. Saravanan et al. (2018) [21] made a full AES using combinational logic and connected it to Toffoli gates, which worked, with better quantum costs and power use. Thockchom et al. (2020) [22] implemented an S-box in AES using composite field arithmetic with hardware efficiency. Praveen Agarwal et al. (2018) [23] developed a key-dependent S-box, which improves nonlinearity and confusion capabilities. The previous system utilized a chaotic random-based cipher [24] and AES cryptography [25]; however, these traditional methods offer reduced security and increased power dissipation. Luyao Wang et al. (2019) [26] proposed a logistic chaotic system based on a pseudo-random number. According to Saranya et al. (2021) [27], the Lorenz chaotic system (LCS) was used to create the key for encrypting and decrypting images, which is safer than traditional methods. Feng et al. [28] suggested an innovative multi-channel image encryption algorithm (MIEA-PRHM) that utilizes hyperchaotic maps and pixel reorganization. Wei Feng et al. first created a novel fractional-order 3D Lorenz chaotic system, as well as a 2D sinusoidally constrained polynomial hyper-chaotic map (2D-SCPM), before developing a multi-image encryption algorithm. Rasappan et al. [29] suggested a cryptographic technique using a 2D Chua-based system with high nonlinearity.
Ding et al. (2025) [30] exploited the nonlinear dynamics of analog memristors in neural network settings, creating a high-dimensional, multiwing attractor for key stream generation. Lin et al. (2022) [31] suggested a special “initial-boosting” method that amplifies sensitivity to initial conditions, drawing inspiration from neuronal spiking and adaptive excitation.
Generally, manually generated key-based S-bytes can easily have their security compromised by unauthorized users. Random data with LFSR was proposed by Karunamurthi et al. [7], but, during the fifteenth clock cycle, LFSR will generate random sequences with low entropy, which are vulnerable to security attacks. This research paper introduces dynamic S-box encryption using a novel chaotic key that integrates Lorenz and Chua systems for enhanced security. The combined use of the Chua and Lorenz systems provides strong security against differential attacks by generating complex key sequences with high entropy. The Lorenz system contributes exponential sensitivity to initial conditions, while the Chua system introduces piecewise discontinuities. This hybrid chaotic key enhances unpredictability and is highly resistant to brute-force attacks.
Although prior works have made significant advances in chaotic key and S-box design for secure encryption, many relied on static S-boxes that are vulnerable to known attacks or single chaotic systems with limited entropy and predictability issues. Moreover, hardware implementations often face high complexity and power trade-offs without leveraging reversible logic efficiently. This paper fills these gaps by employing a novel, hybrid Lorenz–Chua chaotic key generator combined with reversible logic-based composite field arithmetic to create a dynamic, high-entropy substitution box. The proposed LCK-SB architecture not only enhances security through continuous key variation but also reduces power and quantum costs, supported by comprehensive security modeling and hardware implementation results.
The major contributions of this research work are as follows:
  • An optimized reversible S-box using composite field arithmetic is proposed to solve the aforementioned area and power issues.
  • The pseudo-random data generated through the hybrid Lorenz–Chua key generation (LCK-SB) method is utilized to produce a key that transforms a static system into a dynamic S-box, making it challenging for hackers to predict the key value. This enhances the non linearity and improves security.
  • Security analysis for a side-channel attack (SCA), selected key attack (SKA), and avalanche effect (AE) is conducted for the entire architecture.
  • To improve power dissipation, a reversible S-box is proposed, which utilizes an injective logic function with more effectiveness by reducing redundant signals.
The quality of encrypted images is measured by entropy, three-way correlation, discrete Fourier transform, energy, homogeneity, contrast, NPCR, UACI, AC, and a goodness-of-fit test using the  χ 2  [16].
This study is organized as follows: Section 2 delineates the fundamental definitions of RL gates and their associated quantum cost. Section 3 highlights transformation methodologies employing the AES algorithm. Section 4 provides a detailed explanation of the CFA S-box with Lorenz–Chua chaotic key generation and current research on the AES algorithm. Section 5 describes the simulation and synthesize results of the proposed method, its ASIC and FPGA performance, and quantum and randomness analyses of the S-box method utilizing the Lorenz–Chua chaotic key. Section 6 presents a security analysis of the proposed reversible design, accompanied by a comparison of its experimental results with those of conventional techniques. Section 7 delineates the research conclusions.

2. Different Kinds of Reversible Gates

Any gate can be considered reversible with two conditions. The number of input and output variables should be the same (ii). Every input maps to a unique output. Quantum cost is crucial data for evaluating and studying reversible gates. This section discusses the logical expression and quantum cost of each reversible gate.

2.1. Feynman Gate

This gate has two input ports,  I 0  and  I 1 , and two output ports,  Y 0 = I 0 , Y 1 = I 0 I 1 . The quantum cost is 2.

2.2. Toffoli Gate

This gate has three input ports and three output ports. ( Y 0 = I 0 , Y 1 = I 1 , Y 2 = I 0 I 1 I 2 ). The quantum cost is 5.

2.3. Fredkin Gate

This gate has three input ports and three output ports. ( Y 0 = I 0 , Y 1 = ( I 0 ) I 1 I 0 I 2 , Y 2 = ( I 0 ) I 2 I 0 I 1 ). The quantum cost is 5.

3. AES Algorithm

AES is a block cipher technique that uses fixed, 128-bit data and variable-length keys. The state, a two-dimensional array of bytes with four columns and four rows, is responsible for AES’s basic operations. AES’s round function performs four unique data transformations: substitution bytes, row shifting, column mixing, and round key addition. The AES method is iterative, repeating ten, twelve, or fourteen times depending on the key length. A block diagram of the AES algorithm is presented in Figure 1.
The Galois field polynomial used in the AES algorithm is given in Equation (1).
p y = y 8 + y 4 + y 3 + y + 1
Each byte that employs 16-byte (128-bit) S-Boxes processes subbytes individually. The substitution box uses its nonlinearity characteristic to prevent linear cryptanalysis [2].
ShiftRows is a linear rotational shifting function that shifts each row of the four 4-byte inputs. The Mix Column transformation, which operates on 48-bit data blocks, separates each column. The key generation unit creates a new key for each round. This round key is used for the ADD ROUND KEY process.
Due to the significant hardware resources required to implement S-box/AES, Rijmen suggested using subfield arithmetic [5] in the GF of 256 elements. This procedure effectively expressed an 8-bit computation in terms of 4-bit ones. Satoh et al. [8] built the simplified circuit using 2-bit operations instead of 4-bit arithmetic operations. S-box implementation utilizing logic gates is simpler than direct S-box calculation with Galois field arithmetic. This sub-byte version is far smaller in size than the table it replaces. It is clear that the sub-field arithmetic-based design of the substitution box needs fewer gates, which means that it takes up a lot less space than the look-up table-based method.

4. Proposed Lorenz–Chua Key Generation-Based S-Box-(LCK-SB) Design

4.1. Substitute Byte Transformation

The SubByte transformation involves a non-linear replacement method using the S-box. Figure 2 illustrates the substitute byte transformation in the AES algorithm. This transformation utilizes a non-linear replacement technique using an S-box, allowing for substitution among all 256 possible 8-bit input values by applying the product inverse of the Galois field polynomial.  X 03  and  Y 03  are the input and output of the S-box. The S-box plays a crucial role in introducing nonlinearity and ensuring security by contributing to the confusion property within the encryption process This S-Box makes it possible to switch between all 256 possible 8-bit values by using the product inverse of the Galois field polynomial, which is shown in Equation (2).
m ( x ) = x 8 + x 4 + x 3 + x + 1
It takes forward isomorphic mapping, a multiplicative inverse calculator, and reverse isomorphic mapping and then an affines transformation to make the reversible S-box in the GF( 2 8 ). The block diagram is depicted in Figure 3. To improve the complexity of the S-box, a dynamic S-box is designed by applying a key generated by the Lorenz chaotic method.

4.2. Isomorphic Mapping

Isomorphic mapping is used to transform from  G F ( 2 8 )  to  G F ( 2 2 ) 2 ) 2  using composite field arithmetic. This changes the basis of the finite field to simplify calculations. Galois fields of  2 2 , 2 4 , and  2 8  can be expressed as the following Equations (3)–(5) to describe the construction of composite Galois fields used to simplify arithmetic in AES implementations. These equations follow the method proposed in [11,12].
Equations (6) and (7) define the forward ( δ ) and inverse ( δ 1 ) isomorphic mappings used to translate between the standard GF(28) representation and the composite field GF((( 2 2 ) 2 ) 2 ). This is crucial for optimizing multiplicative inversion in hardware, as explained in [11].
G F ( 2 2 ) = x 2 + x + 1
G F ( ( 2 2 ) 2 ) = x 2 + x + Φ W h e r e Φ = 10 2
G F ( ( ( 2 2 ) 2 ) 2 ) = x 2 + x + λ W h e r e λ = 1100 2
δ x = 1 0 1 0 0 0 0 0 1 1 0 1 1 1 1 0 1 0 1 0 1 1 0 0 1 0 1 1 1 1 1 0 1 1 0 0 0 1 1 0 1 0 0 1 1 1 1 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 1 x 7 x 6 x 5 x 4 x 3 x 2 x 1 x 0

4.3. Inverse Isomorphic Mapping

This transformation is used to convert  G F ( 2 2 ) 2 ) 2  to GF( 2 8 ).
δ 1 x = 1 1 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 1 0 0 0 1 0 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 1 0 0 1 1 1 1 0 0 0 1 1 0 0 0 0 0 1 1 1 0 1 0 1 x 7 x 6 x 5 x 4 x 3 x 2 x 1 x 0

4.4. Multiplicative Inverse in Composite Field

Composite field arithmetic is an efficient method to calculate the multiplicative inverse in finite fields such as GF( 2 m ). Instead of working directly in GF( 2 m ), it is decomposed into smaller subfields, which simplifies the arithmetic operations. It reuses GF( 2 4 ) arithmetic modules for addition, multiplication, squaring, and inversion.
The sub-blocks in multiplicative inverse depicted in Figure 4 are as follows:
  • X h  represents 4-bit MSB nibbles in the input.
  • X l  represents 4-bit LSB nibbles in the input.
  • X 2  is a 4-bit squaring circuit.
  • X is a 4-bit multiplier.
  • x λ  is 4-bit multiplier with  λ .
  • X 1  is 4-bit multiplicative inverse calculator.
The combinational logic circuit of the squaring circuit, the multiplier with  λ , and the multiplier in GF( 2 2 ) are expressed in Figure 5.

4.5. Multiplicative Inverse Operation of GF( 2 4 )

The MI of x, an element of GF( 2 4 ) based on CFA, reduces gate count and path delay. Figure 5d depicts the combinational logic of the multiplicative inverse in GF( 2 4 ).
This MI process based on CFA reduces gate count and path delay. Table 1 expresses the truth table of the multiplicative inverse of 4-bit data using GF.

4.6. Affine Transformation

An affine map is made up of translation and linear mapping, which are the same thing as multiplying matrices and adding vectors together to get diffusion, as shown in Equation (8):
y = A ( x ) = M x + N
where A(x) is an affine mapping function, M is an invertible matrix, and N is a vector. Affine transformation plays a major role in the S-box, which provides necessary properties of security, such as nonlinearity and resistance to attack. It ensures that the S-box is resistant to linear and differential cryptanalysis, which enhances cipher security. Affine transformed output y[7:0] is obtained by using given Equation (9).
y 0 y 1 y 2 y 3 y 4 y 5 y 6 y 7 = 1 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 1 1 · b 0 b 1 b 2 b 3 b 4 b 5 b 6 b 7 1 1 0 0 0 1 1 0

4.7. Lorenz Key Generation

The Lorenz system is an example of a nonlinear feedback mechanism that produces chaotic flow. The graphic depiction of chaotic Lorenz changes over time in a complex, non-repeating manner. The expression for the differential equations of the Lorenz system with the outputs x′, y′, and z′ is
x = σ ( y x ) ; y = ( λ z ) x y ; z = x y β z
In the Lorenz system,  λ , β   ,   and σ  are user-defined control parameters. Using a Euler technique, the Lorenz chaotic system can be represented by Equation (11).
x i + 1 = x i + h σ ( y i x i ) ; y i + 1 = y i + h ( λ z i ) x i y i ;   z i + 1 = z i + h ( x i y i β z i )
where  x i + 1 y i + 1 , and  z i + 1  are present-state outputs that depend on previous states with feedback effects. Figure 6 depicts block diagram of Lorenz chaotic key generator.

4.8. Chua’s Chaotic System: Differential Equations

Simpler circuitry using piecewise-linear elements (op-amps, capacitors, resistors) makes Chua’s circuit easy to implement on hardware. This circuit is highly nonlinear due to piecewise-linear characteristics and can be easily tuned for different chaotic behaviors. This exhibits richer bifurcation and multi-scroll attractors, supporting more complex key sequences. This chaotic key is more controllable and synchronizable for chaos-based communication systems. It offers better statistical properties in some scenarios like NIST randomness tests and autocorrelation and provides lower power due to piecewise-linear operations and fewer multipliers. The differential equations of Chua’s system are given with outputs, which are expressed in Equation (12). Figure 7 depicts a block diagram of the Chua chaotic key generator.
d x d t = α y x h ( x ) ; d y d t = x y + z ; d z d t = β y ;
The nonlinear function h(x) is defined as
h ( x ) = m 1 x + 1 2 m 0 m 1 x + 1 x 1
where  m 0  and  m 1  are the slopes of the piece-wise linear function (with  m 0 > m 1 ).

4.9. Hybrid Lorenz–Chua Chaotic Key Generation

Combining both Chua and Lorenz chaotic keys leverages Chua’s tunability and Lorenz’s sensitive dynamics, enhancing security further. The Chua circuit block generates chaotic outputs xc, yc, and zc using Chua’s equations. The Lorenz system block generates outputs xl, yl, and zl using the Lorenz attractor. Chaotic fusion combines Chua and Lorenz outputs using methods where nonlinear mixing combines both Lorenz and Chua keys in the XOR method  x m i x = x c x l  (for bit sequences). Normalization and scaling converts floating-point chaotic values to key streams in the required format. By combining four independent chaotic variables (xL, yC, zL, zC) from two distinct systems (Lorenz and Chua), the output becomes a mixture of highly nonlinear and sensitive trajectories. This XOR-free fusion ensures that key entropy is maximized while reducing periodicity. A block diagram of the hybrid Lorenz–Chua key generation is depicted in Figure 8.
The chaotic nature of the Lorenz system is used to generate pseudo-random key generation for the S-box to increase the nonlinearity and security. This provides high randomness that generates random sequences but produces deterministic values with the same initial values. The key size is large, relying on initial values and constant parameters. The random keys generated by the Chua–Lorenz key generation block are depicted in Figure 9.
Both the Lorenz and Chua chaotic systems produce continuous real-valued outputs that can vary over different ranges. Adding the two chaotic outputs directly could result in values that lie outside a preferred or normalized range. Dividing by 2 (averaging) helps to keep the combined output within a reasonable bound, typically normalizing the fused key values to a range that facilitates further processing and avoids overflow. The hybrid approach combines outputs from two different chaotic systems (Lorenz and Chua), increasing the entropy and complexity of the resulting key sequence. The averaging process balances and fuses the two sequences, producing a mixed chaotic signal that preserves the characteristics of both while avoiding extreme values. Since each chaotic system may produce values with certain amplitudes, adding without division could increase the magnitude and potentially cause issues in subsequent transformations (e.g., scaling to 8-bit values). Division keeps the magnitude controlled. This rationale aligns with standard practices in chaotic key generation where outputs from multiple chaotic systems are combined by summation and averaged to produce a balanced and normalized key stream, which is essential for generating dynamic keys used in the substitution box (S-box). Thus, the division by 2 for each output in Figure 9 is essentially a step for balanced fusion and normalization of the signals from the Lorenz and Chua chaotic systems.
Due to feedback effect, logical block operation can be executed for N number of iterations, outputs of the Lorenz key generator are represented as X, Y, and Z.  λ β , and  σ  are control parameters that should be selected as greater than zero. Generally,  β = 8 / 3 , σ = 10 , and  λ  is varied. The Lorenz system generates outputs X, Y, and Z with 32 bits. For the Chua system,  α = 15 ,   β = 30 ,   m 0 = 1.143 ,   m 1 = 0.714  are initialized. The parameters used in the Lorenz system and Chua system are selected based on the standard chaotic behavior described in the literature. These values ensure a stable yet highly chaotic response, producing entropy-rich key streams. Sensitivity studies indicate that these configurations yield consistent randomness with minimal periodicity, which is crucial for encryption robustness. A 3D visualization of the Chua–Lorenz chaotic attractor is given in Figure 10.
The plot showcases the butterfly-shaped structure, demonstrating the system’s sensitive dependence on initial conditions and chaotic behavior. Due to the fusion of both chaotic systems, higher entropy, better key sensitivity, and increased unpredictability can be achieved. For certain parameter values,  β = 8 / 3 σ = 10 , and  λ = 8 , the system exhibits deterministic chaos, meaning that small changes in initial conditions result in vastly different trajectories. The system does not settle into a stable state but instead moves in a strange attractor, appearing as a butterfly-shaped structure in phase space. The periodicity condition of a hybrid Lorenz–Chua system depends critically on the system parameters and can be determined via Lyapunov exponents, phase space, or spectral analysis. When these parameters force the system’s trajectories to repeat, periodicity is achieved typically at low nonlinearity levels or near bifurcation points.
The pseudo code of the hybrid chaotic system is explained in Algorithm 1.
Algorithm 1: Lorenz–Chua chaotic key generator
  • Initial conditions:  x 0 L y 0 L z 0 L  // Lorenz
    x 0 C y 0 C z 0 C  // Chua
    Parameters:  σ , ρ , β ( f o r L o r e n z )
    α , β C , m 0 , m 1 ( f o r C h u a )
    Time step: dt
    Number of iterations: N
    Function  h ( x C ) :
    return  m 1 x C + 0.5 ( m 0 m 1 ) ( | x C + 1 | | x C 1 | )
    Initialize:
    x L = x 0 L , y L = y 0 L , z L = z 0 L
    x C = x 0 C , y C = y 0 C , z C = z 0 C
    For n = 1 to N:
    // ― Lorenz System ―
    d x L = σ ( y L x L )
    d y L = x L ( ρ z L ) y L
    d z L = x L y L β z L
    x L = x L + d t d x L
    y L = y L + d t d y L
    z L = z L + d t d z L
    // ― Chua System ―
    dx C = α ( y C x C h ( x C ) )
    d y C = x C y C + z C
    d z C = β C y C
    x C = x C + d t d x C
    y C = y C + d t d y C
    z C = z C + d t d z C
    // ― Hybrid Key Mixing ―
    K[n] = mod(abs( x L + y C + z L + z C ), 1.0)
    // N o r m a l i z e d [ 0 , 1 ] k e y v a l u e
    End For
    Output: Key stream K[1…N]

Mathematical Modeling of the Hybrid Chaotic System

The dynamic S-box generation begins with the numerical iteration of both the Lorenz and Chua chaotic systems, mathematically described as
d x d t = σ ( y x ) , d y d t = ρ x y x z , d z d t = x y β z , d x c d t = α y c x c h ( x c ) , d y c d t = x c y c + z c , d z c d t = β c y c ,
with
h ( x c ) = m 1 x c + 1 2 ( m 0 m 1 ) | x c + 1 | | x c 1 | .
These continuous systems are discretized using the Euler method with step size  d t  to obtain sequences  { x i , y i , z i }  and  { x c i , y c i , z c i } .
The hybrid chaotic key at iteration i is obtained by combining normalized system outputs:
K i = mod | x i + y c i + z i + z c i | , 1 ,
which are scaled and quantized to form an 8-bit key:
k i = K i × 256 .
The full chaotic key sequence  { k i } i = 0 255  is then employed to generate the dynamic S-box entries by permuting the standard AES S-box or directly assigning values, provided the permutation property is preserved to maintain bijection. This dynamic S-box is regenerated for each encryption session using the initial parameters, ensuring both high nonlinearity and unpredictability.
The outputs from both the Lorenz system  ( X L , Y L , Z L )  and Chua system  ( X C , Y C , Z C )  are real-valued and typically range in the continuous domain. To use these values as discrete key bytes for the S-box, a fused key is generated as  K r a w = X L + Y C + Z L + Z C . The fused output Kraw is passed through a modulus operation to constrain it to the [0, 1) range:  K n o r m = m o d ( | K r a w | , 1.0 )  The normalized output is scaled and quantized into an 8-bit unsigned integer using  K 8 b i t = K n o r m 256 .
This ensures that each fused chaotic value is transformed into an 8-bit key value suitable for S-box indexing or pixel-wise encryption. It prevents overflow or loss of significance due to floating-point drift. This method maintains the statistical properties required for uniform key distribution and allows reproducibility during decryption since the same initial values generate the same sequence. N = 500 iterations is generally chosen in this algorithm to generate a sufficiently long chaotic key sequence that can cover all required dynamic S-box elements or encryption rounds. This value balances between providing enough key samples for dynamic substitution and keeping computational complexity reasonable. The exact value of N can be tuned according to the encryption block sizes or the number of rounds in AES, but, in this study’s implementation and experiments, N = 500 was the working value.
Figure 11 depicts the random key generated by the hybrid Lorenz–Chua chaotic system. Instead of using a static, fixed AES S-box, the chaotic samples (random keys) serve as inputs to generate or modify the AES substitution boxes dynamically. Since the chaotic samples are highly nonlinear, sensitive to initial conditions, and exhibit pseudo-random behavior, they provide a strong source of entropy and unpredictability needed for dynamic S-box construction. Each sample (after normalization and quantization) is used to define S-box entries by permuting or creating substitution values based on the chaotic sequence. This process makes each encryption instance unique and key-dependent, thus improving resistance to cryptanalysis like linear/differential attacks and side-channel attacks. The fusion of Lorenz and Chua chaotic outputs ensures that the generated key stream has high entropy and minimal periodicity, making the dynamic S-box more random and secure. By using the same initial parameters and conditions on both encryption and decryption sides, the dynamic S-box can be regenerated precisely, allowing successful decryption. The dynamic S-boxes generated from the chaotic keys maintain or improve cryptographic properties such as nonlinearity, strict avalanche criterion, and bit independence. The design also benefits hardware-wise from reversible logic integration and optimized composite field arithmetic, as highlighted in this paper.
Figure 12 depicts the Lyapunov exponent curve of the Lorenz–Chua hybrid system with varying parameter b. The curve shows a region of positive Lyapunov exponents (MLE > 0), indicating sensitive dependence on initial conditions and validating the system’s use in cryptographic key generation. As shown in Figure 12, the Lorenz–Chua hybrid system exhibits positive Lyapunov exponents over a wide parameter range, validating its chaotic regime and supporting its suitability for secure key generation.

4.10. Image Encryption Using Hybrid Lorenz–Chua Key Generator-Based S-Box

The block diagram in Figure 13 represents a hybrid chaos-based image encryption algorithm that combines composite field S-boxes, chaotic key generators, and multi-stage diffusion and scrambling for secure image encryption. The process starts with an image that needs to be encrypted. The pixel positions of the input image are shuffled (scrambled), typically using a key generated from chaotic systems to destroy spatial correlation. The scrambled image undergoes value alteration (diffusion), where pixel intensities are modified using an S-box or chaotic keys. After further transformation, the result is the securely encrypted image. A mathematically secure, algebraically optimized substitution box (S-box) based on composite Galois field arithmetic. These are system parameters needed to generate chaotic sequences. The key stream is generated from the Lorenz and Chua chaotic system.
The outputs from both chaotic systems are combined and normalized to form a single hybrid key stream. This hybrid key enhances unpredictability and sensitivity to initial conditions. Unlike static S-boxes, this one is dynamically generated using the normalized hybrid key, making it different for each image or encryption session, which introduces stronger security by reducing vulnerability to known-plaintext attacks. Final diffusion using the dynamic S-box and possibly chaotic key-based pixel value transformation is performed to ensure that even a small change in the input affects the entire encrypted image. The dynamic S-box is regenerated per encryption block using the current state of the hybrid chaotic key generator. For synchronization, the same initial conditions and parameters are securely shared and used at the decryption end, ensuring deterministic regeneration of identical S-boxes.

5. Performance Results

5.1. Simulation and Synthesis Results of Proposed LCK-SB Design

Verilog HDL was used to design the proposed LCK-SB design, and the same was synthesized and implemented using Xilinx-ISE 14.1 software and Spartan-6 FPGA hardware. The quantitative analysis was performed using quantum cost, ASIC, and FPGA parameters. The RTL schematic and waveform of the LCK-SB design are given in Figure 14 and Figure 15. An 8-bit dynamic S-box was designed and coded using the programming language Verilog module.
Figure 14 presents the Register Transfer Level (RTL) schematic of the proposed LCK-SB design for generating a dynamic, chaotic key-based substitution box used in AES encryption. This schematic visually represents how different functional blocks and signals interacted at the register and logic gate levels in the hardware implementation.
  • Hybrid Lorenz–Chua Chaotic Key Generator Block: Initial parameters and clock enable signals were inputs. Functional units were used to implement the Lorenz and Chua chaotic differential equations iteratively (using the Euler method) to generate chaotic key streams with high entropy.
  • Normalization and Quantization Units: These were used to normalize the chaotic outputs to a [0, 1) range to avoid overflow. These normalized floating-point values were scaled and converted to fixed-point 8-bit integers suitable for digital logic processing.
  • Dynamic S-Box Generation Unit: This received the 8-bit chaotic key values as inputs. Used these values to dynamically generate the substitution values corresponding to each S-box entry (0x00 to 0xFF). Typically, combinational logic based on a Galois field arithmetic static box was converted to a unique dynamic S-box dynamically.
  • Control Logic/State Machines: This managed iterative computation steps and synchronization signals, enabled new key generation per clock cycle, and loaded dynamic S-box values into registers for the AES round operations.
  • Interface Signals: Clock, reset, and enable signals for synchronization.
  • Output buses representing the generated dynamic S-box values and keys fed into the AES encryption pipeline.
The design incorporated reversible logic gates to reduce power dissipation and quantum cost. This is reflected in the RTL schematic by interconnected reversible logic modules forming the composite field arithmetic needed for S-box transformations. Composite field arithmetic was implemented in parallel within the hardware to speed up multiplicative inversions and affine transformations, which are computationally expensive in software. The modular design allowed the reuse of arithmetic units for different S-box entries, enabling a scalable and area-efficient implementation. Figure 15 depicts waveform of LCK-SB design.
From the number of clock cycles, a random key with a unique value was generated in each cycle using the hybrid chaotic key. That key generated a number of different dynamic S-box values for each input of the dynamic S-box. Table 2 depicts the dynamic S-Box generated using the hybrid Lorenz–Chua chaotic key. Each entry in the table corresponds to the substituted byte value (in decimals) for the input byte index from 0x00 to 0xFF, arranged in ascending order. This S-box was dynamically generated per encryption session to enhance cryptographic security. For instance, the first value (162) represents the output substitution for input byte 0x00, the second (59) for 0x01, and so forth.

5.2. ASIC Performance

The proposed architecture was synthesized using the Genus tool of the CADENCE-EDA tool with a 45 nm generic process design kit and a 1.8 V power supply. Table 3 compares the reversible S-Box with the lookup table method and shows better performance in power reduction by 34%. Table 3 depicts better power performance in the reversible S-box compared to the lookup table.
Synthesis report of LKG-RSB Cadence Encounter RTL Genus synthesis solutions is given in Table 4. Compared to state-of-the-art designs, the proposed LKG-RSB design exhibited better performance, with an area power product of 15,748.1875 μm2 · mW and an area delay product of 6,310,263.75 μm2 · ps, with a reduction in delay. Figure 16 expresses the better performance of the LKG-RSB design in terms of delay and area compared to other S-box designs. Figure 17 depicts a better APP (area power product) in the proposed design.
Comparing the dynamic S-box with and without reversible logic and the dynamic LFSR-based S-box, the proposed LKG-RSB design provides significant power reduction compared to irreversible logic. This is depicted in Table 4. Due to the LKG block, there is a reduction of 67% and 74.6% of delay compared to the irreversible LFSR-based design and the reversible LFSR-based design. Similarly, there is a reduction of 35% of power compared to LFSR-based design, but compromising with a high area.

5.3. Quantum Cost Analysis

In the reversible S-box, each conventional gate was mapped with reversible logic gates of Feynman and Toffoli gates to improve quantum cost and power. Quantum cost is a measure of resources that can be measured as the combination of quantum gates (CNOT) and the number of qubits. Each Feynman gate and Toffoli gate had a quantum cost of 1 and 5, respectively. The reversible S-box was implemented using reversible gates such as Feynman gates and Toffoli gates. The garbage details and quantum cost are depicted in Table 5.
The quantum cost of the reversible S-box was reduced by 35% compared to the conventional S-box using composite field arithmetic, which is depicted in Table 6.

5.4. FPGA Implementation of Image Encryption

The Spartan-6 FPGA was used to implement the image encryption process. The synthesis result of the proposed design is given Table 7. It utilized only 538 slice LUTs from the available 27,288 LUTs. Figure 18 depicts the FPGA implementation of the proposed method.
Table 8 shows that there was a significant reduction in slices and flip-flops in the proposed encryption design compared to the state-of-the-art designs.

5.5. Randomness Analysis of Lorenz–Chua Chaotic Random Key Generator

NIST Statistical Test Suits was used to analyze the randomness of the hybrid chaotic key generator. Table 9 illustrates the result, demonstrating that the hybrid system provides good randomness, but post-processing is necessary to eliminate periodicity. Despite its periodic nature, the randomness property offers enhanced security for digital cryptographic applications. Correlations in chaotic signals caused the runs test and spectral test to fail. Each test provided a p-value:
  • If  p > 0.01 , the sequence passed randomness.
  • Otherwise, the sequence was not random.
Table 9. Randomness test of hybrid chaotic key generator.
Table 9. Randomness test of hybrid chaotic key generator.
Test Namep-ValueResult
Frequency (monobit test)0.511pass
Serial test0.1037pass
Runs test0.823pass
Chi square uniformity0.972pass
K-S test0.465pass
Shanon entropy7.98pass
Table 9 presents the randomness test results of the hybrid Lorenz–Chua chaotic key generator. The hybrid system was inherently chaotic, exhibiting deterministic yet highly unpredictable behavior. The monobit test with a p-value of 0.511 indicated a balanced distribution of 0 s and 1 s in the generated bitstream. The runs test confirmed that there was a healthy frequency of transitions between bits, supporting randomness. Both the Chi-square and Kolmogorov–Smirnov (K–S) tests demonstrated that the output followed a near-uniform distribution. Finally, the Shannon entropy value (7.98 bits) reflected the high randomness and unpredictability of the hybrid system, validating its suitability for cryptographic applications. The XOR-based fusion of Lorenz and Chua keys increased unpredictability by combining two unrelated chaotic sequences. The empirical results demonstrate that this hybrid output improves Shannon entropy, suppresses autocorrelation, and achieves a flatter FFT spectrum, key indicators of cryptographic strength. Figure 19 depicts the FFT spectrum of the hybrid chaotic sequence and its autocorrelation. The fast fourier transform (FFT) revealed how the signal’s energy was distributed across frequencies. Since the spectrum was broad and flat, this indicated high frequency diversity and no periodicity. The absence of strong low-frequency components implied low predictability.

6. Security Analysis

6.1. Histogram Analysis

Using MATLAB 2025A, the image was converted to a vector as a plain image. That text file was encrypted and decrypted using Xilinx-ISE. Then, again, encrypted and decrypted images were displayed using MATLAB software. Figure 20 and Figure 21 depict an encrypted image of different test images and their corresponding histograms.
From the histogram, it is shown that the LCK-SB design encrypted data as well as images in a better way by generating a uniform distribution of pixels.

6.2. AE Security Analysis

Figure 22 depicts an AE security analysis of the proposed technique. If there was a one-bit change in input, half of the output bits needed to be flipped. Black box in the Figure 22 depicts changes in the output bits with successive clock cycle.
In Table 10, it is clearly observed that more bits changed in the output if one bit changed in the input. Hence, the proposed method has a good avalanche criterion. Due to more changes in output, the unpredictable property of the proposed technique is enhanced. This helps to keep data secure and prevents intruders from reading or modifying the data and key.

6.3. Bit Independence Criterion

If there was a change in a single bit in the input, significant and independent changes would occur in the output of the LKG-RSB method. These modifications improve the nonlinearity and randomness of the key, which cause more resistance against statistical and cryptanalysis attacks.

6.4. Non-Linearity

The non-linearity criterion was the one that created a link between the n-bit inputs and the n-bit outputs. When there was a linear function between input data and the output, the data could not be protected from attacks, and its cryptographic strength was very low. But, this propounded S-box had its non-linearity property at the maximum level as it had no linearity between the given inputs and outputs. Thus, the S-box satisfied this criteria in a graceful manner. Nonlinearity is a key cryptographic property that measures how far a Boolean function is from all affine (linear) functions. For S-boxes, higher nonlinearity ensures better resistance to linear cryptanalysis. The nonlinearity analysis is shown in Figure 23. The AES S-box had constant nonlinearity of 112 for all 8 output bits, indicating a highly optimized and balanced design. The dynamic S-box had varying nonlinearity values across bits, ranging from 102 to 110, showing some non-uniformity. On average, the AES S-box showed slightly better resistance to linear attacks, but the dynamic S-box still maintained reasonably high nonlinearity values that are acceptable in cryptographic contexts.
Table 11 represents a comparative analysis of the proposed S-Box against several existing designs using four critical cryptographic strength metrics: Strict Avalanche Criterion (SAC), Bit Independence Criterion—Nonlinearity (BIC-NL), Linear Probability (LP), and Differential Probability (DP). The proposed S-Box achieved a SAC value of 0.5080, which was closest to the ideal value of 0.5, indicating superior diffusion characteristics. It also exhibited a low BIC-NL of 0.004, confirming a high degree of output bit independence upon single-bit input changes. Furthermore, the proposed design maintained a low LP of 0.132 and a DP of 0.039, demonstrating strong resistance to both linear and differential cryptanalysis attacks. In contrast, references such as [32,33] showed higher LP and DP values, suggesting relatively weaker resistance to cryptanalytic attacks. Although Ref. [34] reported a competitive SAC of 0.5060, it suffered from a higher BIC-NL (0.006), indicating slightly reduced output randomness. Overall, the proposed S-Box achieved an optimal balance between nonlinearity, diffusion, and cryptographic strength, outperforming prior designs across multiple evaluation parameters.
While the initial results demonstrated the promising cryptographic strength of the proposed LCK-SB design, a comprehensive cryptanalytic evaluation was carried out to validate its resistance against advanced attacks. Differential cryptanalysis tests were conducted by analyzing ciphertext differences resulting from plaintext pairs differing by a single bit. The observed low differential probability of 0.039 across multiple trials indicated strong confusion properties, effectively mitigating differential attacks. Similarly, linear cryptanalysis was simulated by assessing linear approximations between input and output bits under chosen plaintext scenarios. The low linear probability of 0.132 confirmed minimal exploitable correlations, indicating robustness against linear and chosen-plaintext attacks. Furthermore, the dynamic nature of the S-box, continuously updated using high-entropy keys from the hybrid Lorenz–Chua chaotic generator, ensured that repeated encryptions under the same key yielded unpredictable ciphertexts, thereby thwarting chosen-plaintext attack models. These cryptanalytic evaluations, complemented by avalanche effect and entropy analyses, collectively affirm the enhanced security and resilience of the LCK-SB scheme.

6.5. Selected Key Attack Security Model

In each clock cycle, a unique dynamic key was generated that produced unique output. The encryption and decryption process became more random as the 32-bit Lorenz key shrank to 8 bits. Figure 24 illustrates the SKA analysis of the proposed design, which generates independent, unique outputs using different keys. This illustrates the Selected Key Attack (SKA) security model employed in the proposed LCK-RSB method. The red bounding boxes highlight key components: the chaotic key generation units, secure synchronization pathways between encryption and decryption ends, and the dynamic key integration points within cryptographic processes. Each red box marks a unique key update where the out[7:0] output changes sharply within tight timing intervals, representing the system’s cycle-to-cycle key diversity. This visualization emphasizes how the system achieves dynamic, unique key generation for every encryption cycle, ensuring that keys remain unpredictable and resistant to cryptanalysis. The SKA model’s ability to reproducibly synchronize keys based on initial conditions allows robust symmetric encryption while preventing key reuse vulnerabilities, thereby significantly enhancing security against a range of key-related attacks.

6.6. SCA Security Analysis

Side-channel attack analysis was performed with asymmetric keys for encipher and decipher processes. The proposed technique provides different decrypted output for asymmetric keys, which ensures high security. Table 12 depicts SCA security analysis. Experimental and analytical data show that when dynamic keys were applied, the decrypted text did not equate to the original plaintext. This discrepancy confirms the method’s effectiveness against side-channel attacks because the actual message remains concealed.

6.7. Analysis of MSE, PSNR, and SSIM

Components, such as the structural similarity index measure, peak signal-to-noise ratio, and mean squared error, were used to analyze and validate resistance against attacks. The system estimated these parameters by comparing the input image with the encrypted one. The proposed LKG-RSB design was fed with Lena and Penquins test images. Table 13 depicts Security analysis using MSE, PSNR, and SSIM metrics. A good image encryption should have low SSIM, high MSE, and low PSNR. For the proposed design, there was a reduction of 25% in SSIM and 63.77% in PSNR compared to the RLCD-LFSR method, and it showed better performance, which is represented in Table 13.
S S I M = ( 2 μ x μ y + C 1 ) ( 2 σ x y + C 2 ) ( μ x 2 μ y 2 + C 1 ) ( σ x + σ y + C 2 )
P S N R = 20 l o g 255 M S E
M S E = 1 a b u = 0 a 1 v = 0 b 1 ( I ( u , v ) I ( u , v ) ) 2

6.8. Comparative Security Metrics

To further validate the robustness of the proposed LCK-SB encryption method, we compared it with several state-of-the-art encryption schemes using key statistical metrics: Number of Pixels Change Rate (NPCR), Unified Average Changing Intensity (UACI), and Shannon entropy. As shown in Table 14, the proposed method achieved an NPCR of 99.62% and a UACI of 33.45%, which were close to ideal values. The entropy was 7.98, indicating near-optimal randomness and uniform pixel distribution in the encrypted image.
Figure 25 depicts a comparative graph of key security metrics—entropy, NPCR, and UACI—across the LCK-SB method and other schemes. It clearly shows that LCK-SB outperformed the others in all three categories, indicating better randomness, diffusion, and differential resistance.

6.9. Encryption Efficiency

Since modern digital image applications involve significant data volumes and require high throughput, any proposed image encryption algorithm must ensure exceptional encryption efficiency. Otherwise, it will not meet the requirements of practical applications. Table 15 shows the average time required by the LCK-SB method and some other image encryption schemes to encrypt an 8-bit grayscale image of Lena (256 × 256). Table 15 demonstrates that the novel LCK-SB scheme offers the highest encryption efficiency in terms of average time and throughput. So, it is significantly better than other encryption schemes.

Pixel Correlation

Nearby pixels in natural digital images form patterns. Such patterns can create security risks. Strong image encryption is required to prevent this. To test the effectiveness of LCK-SB encryption, Lena’s test image was encrypted. Then, three correlation analysis plots were created to show how well the encryption removes pixel patterns. Figure 26 shows that before encryption, pixels in horizontal, vertical, and diagonal directions had strong correlations. However, after applying the LCK-SB method, these patterns disappeared, making the images more secure.

6.10. Comparison with Emerging Chaos-Based Encryption Algorithms

In recent years, several advanced encryption frameworks have been proposed that combine chaotic dynamics with novel computational architectures. For instance, the work by Zhang et al. [30] introduced a hidden multiwing memristive neural network designed for remote sensing data security, leveraging multi-attractor chaos and memristive behavior to enhance key unpredictability and reduce circuit complexity. Similarly, for biomedical applications, a brain-like initial-boosted hyperchaotic system was developed to provide high initial value sensitivity and superior randomness, outperforming classical chaotic systems in entropy and resistance to differential attacks. These approaches reflect a growing trend toward neuro-inspired and hardware-efficient chaotic systems for real-time secure communication.
Compared to these designs, the proposed LCK-SB method uniquely combines the strengths of both the Lorenz and Chua chaotic systems using a hybrid structure that amplifies entropy, avoids periodicity, and enables dynamic S-box construction with reversible logic support. While the memristive neural models offer compactness, and brain-like systems provide extreme sensitivity, the LCK-SB architecture excels in FPGA/ASIC deployability, shows significant improvements in power–delay product, and passes key cryptographic criteria (NPCR: 99.62%, UACI: 33.45%, entropy: 7.98).
Future work may extend this hybrid approach by incorporating adaptive neural networks, memristive elements, or hyperchaotic boosters to further strengthen the unpredictability and real-time adaptability of the encryption process, especially for domain-specific use cases such as IoT, biomedical imaging, and remote sensing.
Similarly, recent advancements in chaotic encryption systems have introduced sophisticated models such as a novel, three-dimensional fractional-order chaotic system (Zhou et al. [40]) that exhibits multiple coexisting attractors. Genie et al. [41] explored a 4D, nonlinear, memristor-based system under fractal–fractional calculus. These systems exhibit richer nonlinear dynamics and higher-dimensional chaos, often resulting in increased key entropy and stronger resistance to statistical attacks. Feng et al. [42,43] developed a high-performance multi-image encryption algorithm using a newly designed fractional-order 3D Lorenz chaotic system and a 2D discrete polynomial hyper-chaotic map, enhancing security and encryption efficiency. Refs. [44,45,46,47,48] aimed to design robust S-boxes for secure encryption systems by exploiting the complex dynamics of chaotic maps. By introducing dynamic, session-based S-box generation techniques, they overcome the vulnerabilities of traditional static S-boxes. Additional mathematical transformations like trigonometric, integer multiplication and optimization algorithms are used to further enhance security characteristics. However, they also tend to incur higher computational complexity, numerical instability, and increased hardware overhead, making real-time implementations more challenging. In comparison, our hybrid Lorenz–Chua system offers a well-balanced compromise: it achieves high entropy (7.98), excellent NPCR/UACI performance, and reversible logic compatibility, all while maintaining relatively low implementation cost on FPGA and ASIC platforms.

6.11. Hybrid Lorenz–Chua-Based S-Box Generation with Fractional-Order Chaotic Enhancement Algorithm for Robust Key Generation

This algorithm generates a dynamic, cryptographically secure substitution box (S-box) using chaotic sequences derived from a hybrid of the Lorenz and Chua chaotic systems, enhanced with fractional-order calculus. Fractional-order chaos theory is an extension of classical chaos theory that uses fractional calculus—mathematics involving derivatives and integrals of non-integer (fractional) order—to describe dynamic systems. Fractional-order chaos is especially useful in cryptographic systems because it increases the unpredictability of key generation or S-boxes and provides larger key space and higher sensitivity. The dynamic S-box is suitable for use in cryptographic algorithms like AES, offering improved nonlinearity, unpredictability, and resistance against cryptanalysis. The algorithm workflow is given below.

Algorithm Workflow

Step 1. 
Initialization:
  • Set initial states for Lorenz system:  ( x 0 , y 0 , z 0 )
  • Set initial states for Chua system:  ( u 0 , v 0 , w 0 )
  • Define
    Fractional order  α
    Time step  d t
    Total iterations M
    Memory length K (for fractional memory)
  • Specify chaotic system parameters:
    Lorenz:  σ , ρ , β
    Chua:  α c , β c , m 0 , m 1
Step 2. 
Iterative System Simulation (for  i = 1  to M):
  • Compute Lorenz derivatives:
    x ˙ = σ ( y x ) , y ˙ = x ( ρ z ) y , z ˙ = x y β z
  • Compute Chua derivatives:
    u ˙ = α c ( v u h ( u ) ) , v ˙ = u v + w , w ˙ = β c v
    where
    h ( u ) = m 1 u + 1 2 ( m 0 m 1 ) ( | u + 1 | | u 1 | )
  • Update system states using the Euler method:
    L i = L i 1 + d t · L ˙ i 1 , C i = C i 1 + d t · C ˙ i 1
Step 3. 
Fractional-Order Approximation:
  • For  i = K  to M, compute
    F L [ i ] = k = 0 K ( 1 ) k α k L i k · d t α , F C [ i ] = k = 0 K ( 1 ) k α k C i k · d t α
  • These fractional states capture long-term memory effects and enhance system complexity.
Step 4. 
Combine Chaotic Outputs:
  • Fuse and normalize outputs:
    H [ i ] = mod ( | F L [ i ] | + | F C [ i ] | , 1.0 )
  • Scale to byte range:
    H [ i ] = H [ i ] · 256
Step 5. 
S-Box Construction:
  • Remove duplicates from H. Pad with unused values to form 256 unique entries.
  • For  i = 0  to 255:
    Step 5.1. 
    Let  v = H [ i ]
    Step 5.2. 
    Apply non-linear transformation:
    v ( ( v × 17 ) ( v 3 ) ) mod 256
    Step 5.3. 
    Resolve collisions: increment v until unique.
    Step 5.4. 
    Assign  S [ i ] = v
Step 6. 
Return Final S-Box:
  • Output  S [ 0 255 ]  as the dynamic, chaos-enhanced substitution box.
Table 16 depicts a summary of the security metrics for the hybrid Lorenz–Chua-based S-box generation with fractional-order chaotic enhancement algorithm. All test results fall within secure or near-ideal ranges, showing that the S-box generated via the hybrid Lorenz–Chua system with the enhanced fractional chaos approach offers strong confusion and diffusion, resists differential and linear cryptanalysis, performs excellently in image/data encryption contexts, and generates nonlinear, random, and bit-independent outputs. This S-box generation technique is cryptographically robust and suitable for high-security applications like AES variants, image encryption, IoT devices, and secure communications.

7. Conclusions

This study introduced a novel LCK-SB (Lorenz–Chua key-based substitution box) for secure image encryption, leveraging the nonlinear dynamics of Lorenz and Chua chaotic systems integrated with reversible logic gates. The proposed design dynamically generates highly nonlinear and unpredictable S-boxes that significantly enhance confusion and diffusion properties, key criteria for secure encryption. Experimental validation on both FPGA and ASIC platforms demonstrates that the LCK-SB architecture achieves considerable improvements over traditional static S-boxes, with reductions of 74.6% in delay and 35% in power consumption. The architecture is particularly suited for IoT and embedded applications, where space and power efficiency are critical. Hardware analysis confirms a 36% reduction in gate count, while the uniformly distributed histogram of the encrypted image highlights strong resistance to statistical and cryptanalytic attacks, including differential, algebraic, and side-channel attacks. By incorporating a hybrid chaotic key generator, the system ensures high key randomness and secure encryption for sensitive data transmission. The use of reversible logic further contributes to power efficiency, information preservation, and quantum-computing readiness, making LCK-SB a strong method for real-time and lightweight encryption frameworks. Despite the promising performance of the proposed LCK-SB architecture, the current key generation uses only classical chaotic systems (Lorenz and Chua), which, while nonlinear, may exhibit short-term predictability under certain initial conditions. Future research will focus on incorporating fractional-order or fractal–fractional chaotic systems to enhance the unpredictability and entropy of the generated keys. Additionally, integrating chaotic systems with hidden attractors may further strengthen resistance against modern cryptanalytic attacks.

Author Contributions

Conceptualization, S.B. and S.K.G.A.; methodology, S.B.; software, S.B.; validation, S.B.; formal analysis, S.B.; investigation, S.B.; resources, S.B.; data curation, S.B.; writing—original draft preparation, S.B.; writing—review and editing, S.B.; visualization, S.B.; supervision, S.K.G.A.; project administration, S.B. and S.K.G.A. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

No new data were created or analyzed in this study. Data sharing is not applicable to this article.

Conflicts of Interest

The authors declare no conflicts of interest.

Abbreviations

The following abbreviations are used in this manuscript:
AESAdvanced Encryption Standard
LCK-SBLorenz and Chua Key-Based Dynamic Substitution Box
S-boxSubstitution Box
LFSRLinear Feedback Shift Register
CFAComposite Field Arithmetic
FPGAField-Programmable Gate Array
ASICApplication-Specific Integrated Circuit
RLReversible Logic
PPRMPositive Polarity Reed-Muller (architecture)
DCPALDifferential Cascade Preresolve Adiabatic Logic
SKASelected Key Attack
SCASide-Channel Attack
NISTNational Institute of Standards and Technology
FFTFast Fourier Transform
NPCRNumber of Pixels Change Rate
UACIUnified Average Changing Intensity
AEAvalanche Effect
BIC-NLBit Independence Criterion—Nonlinearity
LPLinear Probability
DPDifferential Probability
MSEMean Squared Error
PSNRPeak Signal-to-Noise Ratio
SSIMStructural Similarity Index Measure

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Figure 1. Block diagram of AES algorithm.
Figure 1. Block diagram of AES algorithm.
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Figure 2. Substitute byte transformation.
Figure 2. Substitute byte transformation.
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Figure 3. Block diagram of LCK-based reversible S-Box.
Figure 3. Block diagram of LCK-based reversible S-Box.
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Figure 4. Multiplicative inverse block.
Figure 4. Multiplicative inverse block.
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Figure 5. (a) Squaring circuit; (b) 4-bit multiplier with  λ  (c); multiplier in  G F ( 2 2 )  (d); multiplicative inverse in GF( 2 4 ).
Figure 5. (a) Squaring circuit; (b) 4-bit multiplier with  λ  (c); multiplier in  G F ( 2 2 )  (d); multiplicative inverse in GF( 2 4 ).
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Figure 6. Block diagram Lorenz chaotic key generator.
Figure 6. Block diagram Lorenz chaotic key generator.
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Figure 7. Block diagram Chua chaotic key generator.
Figure 7. Block diagram Chua chaotic key generator.
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Figure 8. Block diagram of hybrid Lorenz and Chua key generation.
Figure 8. Block diagram of hybrid Lorenz and Chua key generation.
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Figure 9. Three outputs generated by the hybrid Lorenz–Chua key generator.
Figure 9. Three outputs generated by the hybrid Lorenz–Chua key generator.
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Figure 10. Lorenz–Chua chaotic attractors.
Figure 10. Lorenz–Chua chaotic attractors.
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Figure 11. Random key generated by hybrid Lorenz–Chua chaotic system.
Figure 11. Random key generated by hybrid Lorenz–Chua chaotic system.
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Figure 12. Lyapunov curve of hybrid Lorenz–Chua chaotic system.
Figure 12. Lyapunov curve of hybrid Lorenz–Chua chaotic system.
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Figure 13. Image encryption based on hybrid chaotic key-based S-box.
Figure 13. Image encryption based on hybrid chaotic key-based S-box.
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Figure 14. RTL schematic of LCK-SB design.
Figure 14. RTL schematic of LCK-SB design.
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Figure 15. Waveform of LCK-SB design.
Figure 15. Waveform of LCK-SB design.
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Figure 16. Delay and area comparisons of proposed S box with various designs.
Figure 16. Delay and area comparisons of proposed S box with various designs.
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Figure 17. Area power product of various S-box designs.
Figure 17. Area power product of various S-box designs.
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Figure 18. FPGA implementation of LKG-RSB-based image encryption.
Figure 18. FPGA implementation of LKG-RSB-based image encryption.
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Figure 19. FFT spectrum of hybrid chaotic sequence and autocorrelation of chaotic sequence.
Figure 19. FFT spectrum of hybrid chaotic sequence and autocorrelation of chaotic sequence.
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Figure 20. Original Lena image, encrypted image, and decrypted image and their histograms.
Figure 20. Original Lena image, encrypted image, and decrypted image and their histograms.
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Figure 21. Original penquins image, encrypted image, and decrypted image and their histograms.
Figure 21. Original penquins image, encrypted image, and decrypted image and their histograms.
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Figure 22. Avalanche effect security analysis of LCK-SB method.
Figure 22. Avalanche effect security analysis of LCK-SB method.
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Figure 23. Nonlinearity analysis of proposed LKG-RSB design.
Figure 23. Nonlinearity analysis of proposed LKG-RSB design.
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Figure 24. SKA security model for proposed method.
Figure 24. SKA security model for proposed method.
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Figure 25. Comparative graph of key security metrics [28,39].
Figure 25. Comparative graph of key security metrics [28,39].
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Figure 26. (a) Gray value correlation (x, y) vs. (x + 1, y) of Lena image; (b) gray value correlation (x, y) vs. (x + 1, y + 1) of Lena image; (c) gray value correlation (x, y) vs. (x, y + 1) of Lena image; (d) gray value correlation (x, y) vs. (x + 1, y) of encrypted Lena image; (e) gray value correlation (x + 1, y + 1) vs. (x + 1, y + 1) of encrypted Lena image; (f) gray value correlation (x, y) vs. (x, y + 1) of encrypted Lena image.
Figure 26. (a) Gray value correlation (x, y) vs. (x + 1, y) of Lena image; (b) gray value correlation (x, y) vs. (x + 1, y + 1) of Lena image; (c) gray value correlation (x, y) vs. (x, y + 1) of Lena image; (d) gray value correlation (x, y) vs. (x + 1, y) of encrypted Lena image; (e) gray value correlation (x + 1, y + 1) vs. (x + 1, y + 1) of encrypted Lena image; (f) gray value correlation (x, y) vs. (x, y + 1) of encrypted Lena image.
Symmetry 17 01296 g026aSymmetry 17 01296 g026b
Table 1. Truth table of multiplicative inverse in GF( 2 4 ).
Table 1. Truth table of multiplicative inverse in GF( 2 4 ).
X[3:0]Y[3:0]X[3:0]Y[3:0]
0000000010001010
0001000110010110
0010001110101000
0011001010110111
0100111111000101
0101110011011110
0110100111101101
0111101111110100
Table 2. Dynamic S-Box generated by hybrid chaotic key.
Table 2. Dynamic S-Box generated by hybrid chaotic key.
16259203416936811132221411841293274211224
21213118201115925321909313021921613415861
18084265137121232144171624021019411243147
205230411287525015017810815130248716956192
254895185132391682231771631112724241233136
1711352141461517522018927522514289234111228
101132160170781972271641434623186167732372
19331103204961791231241021738092174663140
1987275415410010524648152215226141267022
18224287176209234423625618735156148885785
7968159221137191208251225181145238200206138172
24798106114194513938651091256347183831
1882352555377421572019921729213252583449
1028118116190166161823320255127611719667
14036617492801731021241231799620410331193
149912291221551201101332071952441651199740107
Table 3. Performance metrics of proposed reversible S-box.
Table 3. Performance metrics of proposed reversible S-box.
InstanceStatic Leakage Power (nW)Dynamic Switching Power (μW)Total Power (μW)
S-Box (Lookup Table)17.30662.16862.185
Reversible S-Box11.59644.55344.565
Table 4. Synthesis report of LKG-RSB Cadence Encounter RTL Genus synthesis solutions using 45 nm.
Table 4. Synthesis report of LKG-RSB Cadence Encounter RTL Genus synthesis solutions using 45 nm.
Different Types of DesignDelay (ps)Area (μm2)Power (mW)APP (μm2 · mW)ADP (μm2 · ps)
Dynamic LFSR S-box with RL [7]49794217.8753.8929116,407.5121,000,799.63
Dynamic LFSR S-box without RL [8]39373446.1504.8996216,851.6713,567,492.55
Static S-box with RL [11]49794217.8754.5929119,372.2721,000,774.73
Static S-box without RL [13]95263459.4561.168744043.2032,954,720.7
Conventional LUT based S-box [14]50866133.8825.41533,214.5331,196,913.68
Proposed LCK-SB12634996.2533.1528015,748.186,310,263.75
Table 5. Garbage details of reversible S-box.
Table 5. Garbage details of reversible S-box.
Name of the BlockNo. of Garbage OutputsNo. of Reversible Gates
Isomorphic mapping013
Inverse isomorphic mapping015
Squarer04
Multiplicative inverse823
Multiplier with GF( 2 2 )57
Multiplier with GF( 2 4 )48
Multiplier (x λ )03
Multiplier (x ϕ )01
Affine transformation023
Table 6. Performance comparison of proposed method with conventional method.
Table 6. Performance comparison of proposed method with conventional method.
Name of the BlockQuantum Cost of Conventional S-Box Design [13]Quantum Cost of Proposed Chaotic-Based Design
Multiplicative inverse in GF( 2 4 )14654
Affine transformation3625
S-box505331
Table 7. FPGA performance of the proposed LCK-SB on a Spartan-6 kit device and its resource utilization summary.
Table 7. FPGA performance of the proposed LCK-SB on a Spartan-6 kit device and its resource utilization summary.
Slice Logic UtilizationUsedAvailableUtilization Percentage
Number of slice registers20854,5760
Number of slice LUTs53827,2881
Number of fully used LUT-FF pairs11263417
Number of bonded IOBs12919067
Number of BUFGs1166
Number of DSP48A1s245841
Table 8. FPGA performance of various designs in Spartan-6 family.
Table 8. FPGA performance of various designs in Spartan-6 family.
FPGA FamilyMethodsNumber of Slice RegistersNumber of Slice LUTsNumber of Flip-Flops
Spartan-6
XC6SLX45
CSG324C
AES-PL [18]20,81820,14726,417
RLCD-LFSR [1]479383284703
RLCD-IWT-HKG [21]1423191369
LCK-SB208538112
Table 10. Avalanche effect security analysis of LCK-SB method.
Table 10. Avalanche effect security analysis of LCK-SB method.
Plain TextCipher Text with Dynamic Key 1Cipher Text with Dynamic Key 2
(06)h = (0000 0110)2(89)h = (1000 1001)2(8B)h = (1000 1011)2
(07)h = (0000 0111)2(13)h = (0001 0111)2(11)h = (0001 0001)2
Table 11. SAC, BIC-NL, LP, and DP details.
Table 11. SAC, BIC-NL, LP, and DP details.
S-BOXSACBIC-NLLPDP
Proposed0.50800.0040.1320.039
Ref. [32]0.49920.0010.1410.047
Ref. [33]0.49770.0020.1320.046
Ref. [34]0.50600.0060.1250.039
Ref. [35]0.49760.0020.1320.039
Ref. [36]0.49950.0010.1170.039
Ref. [37]0.49950.0010.1280.039
Ref. [38]0.50100.0010.0700.039
Table 12. SCA security analysis.
Table 12. SCA security analysis.
Plain TextCipher Text with Dynamic Key 1Cipher Text with Dynamic Key 2
(06)h = (0000 0110)2(89)h = (1000 1001)2(8B)h = (1000 1011)2
(07)h = (0000 0111)2(13)h = (0001 0111)2(11)h = (0001 0001)2
Table 13. Security analysis using MSE, PSNR, and SSIM metrics.
Table 13. Security analysis using MSE, PSNR, and SSIM metrics.
ArchitectureMSEPSNR (dB)SSIM
RLCD-LFSR [7]   2.12 × 10 4 9.730.012
RLCD-IWT-HKG [26]   2.809 × 10 4 7.290.0098
Koyunchu et al. [28]   2.817 × 10 4 7.260.0089
Koziel et al. [39]   2.716 × 10 4 7.560.0091
LCK-SB   2.91 × 10 4 3.5250.009
Table 14. Comparative analysis of security metrics.
Table 14. Comparative analysis of security metrics.
MethodEntropy (bits)NPCR (%)UACI (%)PSNR (dB)SSIM
Proposed (LCK-SB)7.9899.6233.453.520.009
RLCD-LFSR [7]7.9498.7532.129.730.012
Koyunchu et al. [28]7.9197.1031.677.260.0089
Koziel et al. [39]7.8896.8530.987.560.0091
Table 15. Performance analysis of different schemes.
Table 15. Performance analysis of different schemes.
SchemeLCK-SBSIT-SR [32]CHHCS [33]Breadth-First Search [34]Dynamical Chaotic System [36]
Time (s)0.1580.0890.2750.4170.264
Throughput (Mbps)8.685.6181.8181.1991.893
Table 16. Summary of security metrics for hybrid Lorenz-Chua based S-box generation with fractional-order chaotic enhancement algorithm.
Table 16. Summary of security metrics for hybrid Lorenz-Chua based S-box generation with fractional-order chaotic enhancement algorithm.
TestResult of Enhanced S-BoxIdeal Range
Strict Avalanche Criterion (SAC)0.4994≈0.5
Bit Independence Criterion (BIC)0.002≈0
NonlinearityAvg. 112≤120
Differential UniformityMax 42–4
Number of Pixels Change Rate (NPCR)99.621%≥99.6%
Unified Average Changing Intensity (UACI)33.27%∼33.4%
Linear Approximation Probability (LP)0.109≤0.125
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Boobalan, S.; Gurunathan Arthanari, S.K. Lorenz and Chua Chaotic Key-Based Dynamic Substitution Box for Efficient Image Encryption. Symmetry 2025, 17, 1296. https://doi.org/10.3390/sym17081296

AMA Style

Boobalan S, Gurunathan Arthanari SK. Lorenz and Chua Chaotic Key-Based Dynamic Substitution Box for Efficient Image Encryption. Symmetry. 2025; 17(8):1296. https://doi.org/10.3390/sym17081296

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Boobalan, Sarala, and Sathish Kumar Gurunathan Arthanari. 2025. "Lorenz and Chua Chaotic Key-Based Dynamic Substitution Box for Efficient Image Encryption" Symmetry 17, no. 8: 1296. https://doi.org/10.3390/sym17081296

APA Style

Boobalan, S., & Gurunathan Arthanari, S. K. (2025). Lorenz and Chua Chaotic Key-Based Dynamic Substitution Box for Efficient Image Encryption. Symmetry, 17(8), 1296. https://doi.org/10.3390/sym17081296

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