# FPGA Realization of the Parameter-Switching Method in the Chen Oscillator and Application in Image Transmission

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## Abstract

**:**

## 1. Introduction

- (i)
- FPGA realization of the parameter-switching scheme to approximate the stable cycles of the Chen oscillator, using VHDL as the implementation language with a word length of 24 bits, on the Xilinx’s Artix-7 AC701 board. The VHDL implementation on the FPGA board agreed completely with the numerical simulations done in MATLAB;
- (ii)
- FPGA realization of a secure chaos-based image transmission system on the Xilinx’s Artix-7 AC701 board, using VHDL with a 24 bit word length, whereby the parameter-switching scheme was applied as a decryption mechanism to recover chaos-encrypted RGB and grayscale images. The backbone of the secure image transmission system was a synchronized master and slave Chen system, in which the state observer was the slave system that approximated the master system. The VHDL implementation and MATLAB numerical simulations of the image transmission were in complete agreement.

## 2. Theoretical Framework

#### 2.1. Parameter-Switching Method

**R**${}^{n}$→

**R**${}^{n}$ is a Lipschitz continuous nonlinear function, p∈

**R**is the switched parameter, ${\mathit{x}}_{0}$∈

**R**${}^{n}$ represents the initial value, T > 0, and A∈L(

**R**${}^{n})$ is a constant matrix. Modeling the Chen system in Equation (1) after the IVP in Equation (2) with parameter c = p as the control parameter and giving a and b their conventional values, then:

**Notation**

**1.**

**Notation**

**2.**

**Notation**

**3.**

**Remark**

**1.**

**Remark**

**2.**

**Remark**

**3.**

**Remark**

**4.**

#### 2.2. Synchronization of Two Chen Oscillators

**R**${}^{n}$ represents the state variable and f:

**R**${}^{n}$→

**R**${}^{n}$ is the nonlinear function. The Hamiltonian forms can be described as:

**R**${}^{n}$, in which $\mathcal{M}$ is a definite matrix greater than zero, constant and symmetric. Therefore, $\frac{\partial H}{\partial x}=\mathcal{M}x$. Furthermore, $\frac{\partial H}{\partial x}$ is the gradient vector derived from $H\left(x\right)$. Matrix $\mathcal{J}\left(x\right)$ fulfills $\mathcal{J}\left(x\right)+{\mathcal{J}}^{T}\left(x\right)=0$, while $\mathcal{S}\left(x\right)$ satisfies $\mathcal{S}\left(x\right)={\mathcal{S}}^{T}\left(x\right)$ for all $x\in {\mathit{R}}^{n}$. The vector field $\mathcal{J}\left(x\right)\frac{\partial H}{\partial x}$ is the conservative part of the system. $\mathcal{S}\left(x\right)$ represents the nonconservative part. $\mathcal{F}\left(x\right)$ is the destabilizing vector.

**Definition**

**1.**

**Theorem**

**1.**

**Theorem**

**2.**

## 3. VHDL Implementation and System Co-Simulation

#### 3.1. Parameter Switching Implementation

#### 3.2. Master–Slave Synchronization

## 4. Application in Image Transmission

## 5. Discussion

## 6. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

## Abbreviations

DSP | Digital signal processor |

FPGA | Field programmable gate Array |

HDL | Hardware design language |

I/O | Input/output |

IVP | Initial value problem |

LUT | Lookup table |

OGY | Ott, Grebogi, and Yorke |

PS | Parameter switching |

RAM | Random access memory |

RGB | Red, green and blue |

TRNG | True random number generator |

UPO | Unstable periodic orbit |

VHDL | Very high-speed integrated circuit Hardware Design Language |

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**Figure 1.**Parameter-switching scheme showing the switched parameters ${p}_{k}$ and their associated sub-interval ${i}_{k}$ times.

**Figure 2.**Bifurcation diagram of the Chen oscillator (1) showing the chaotic and stable regions as parameter c is varied. The “averaged” parameter p* = 26.0858 is selected from the stable window.

**Figure 3.**Chen oscillator and parameter-switching scheme using the 4th-order Runge–Kutta method. (

**a**) Co-simulation in MATLAB/Simulink with Active-HDL. (

**b**) Active-HDL block diagram of the VHDL implementation.

**Figure 4.**Chaotic phase portraits of the Chen system (1) for the set ${\mathcal{A}}_{N}$ corresponding to ${\mathcal{P}}_{N}$.

**Figure 5.**Co-simulation results of the approximation of the Chen system’s stable cycle, illustrating the “switched” solution ${A}^{S}$ (red), “averaged” solution A* (blue), and overplots of ${A}^{S}$ and A*.

**Figure 6.**Time series of the three states x, y, and z. (

**a**) MATLAB overplots: “switched” solution ${A}^{S}$ (red) and “averaged” solution A* (blue). (

**b**) Active-HDL: “switched” solution ${A}^{S}$ (upper) and “averaged” solution A* (lower).

**Figure 7.**Hamiltonian synchronization of master and slave Chen systems. (

**a**) Co-simulation in MATLAB/Simulink with Active-HDL. (

**b**) Active-HDL block diagram of the VHDL implementation.

**Figure 8.**Basins of attraction of the Chen system (1) on $x-y$ plane at $a=35$, $b=3$, and $c=24.75$; equilibrium point $E{P}_{0}$ has the red regions as its basin; equilibrium point $E{P}_{1}$ has green regions as its basin; while equilibrium point $E{P}_{2}$ has blue regions as its basin.

**Figure 9.**Image transmission system. (

**a**) Co-simulation diagram in MATLAB/Simulink with Active-HDL. (

**b**) Active-HDL block diagram.

**Figure 10.**Waveforms of the 640 × 480 grayscale image from transmission variable x, showing the original (red), encrypted (blue), and received (magenta) recovered by the parameter-switching technique. (

**a**) Co-simulation diagram in MATLAB/Simulink with Active-HDL. (

**b**) Active-HDL.

**Figure 11.**Waveforms of the 320 × 240 RGB image data from transmission variable y, showing the original (red), encrypted (blue), and received (magenta) recovered by the parameter-switching technique. (

**a**) Co-simulation diagram in MATLAB/Simulink with Active-HDL. (

**b**) Active-HDL.

**Figure 12.**Co-simulation image data, showing the original image (left), encrypted image (middle), and received image (right) recovered by the parameter-switching technique: (

**a**) 640 × 480 grayscale image, transmitted via state variable x; (

**b**) 320 × 240 RGB image, transmitted via state variable y.

**Table 1.**Correlation coefficients’ analysis of the original, encrypted, and received RGB and grayscale images, using the parameter-switching scheme for image decryption.

Transmission Variable | Correlation | RGB Image | Grayscale Image | ||
---|---|---|---|---|---|

Red | Green | Blue | |||

x | Original and Encrypted | 0.0342 | 0.0543 | 0.0315 | 0.0352 |

Encrypted and Received | 0.0342 | 0.0543 | 0.0315 | 0.0352 | |

Original and Received | 1 | 1 | 1 | 1 | |

y | Original and Encrypted | 0.0316 | 0.0498 | 0.0296 | 0.0362 |

Encrypted and Received | 0.0316 | 0.0498 | 0.0296 | 0.0362 | |

Original and Received | 1 | 1 | 1 | 1 | |

z | Original and Encrypted | 0.0649 | 0.0747 | 0.0711 | 0.0672 |

Encrypted and Received | 0.0649 | 0.0747 | 0.0711 | 0.0672 | |

Original and Received | 1 | 1 | 1 | 1 |

**Table 2.**Utilization of FPGA resources in the Xilinx Artix-7 AC701 board to implement the: (1) Chen chaotic oscillator, (2) parameter-switching scheme applied to approximate stable cycles of the Chen oscillator, and (3) the Hamiltonian form synchronization of Chen oscillators.

Chen Oscillator | Parameter Switching | Synchronization | |||||
---|---|---|---|---|---|---|---|

Resources | Available | Used | Utilization(%) | Used | Utilization(%) | Used | Utilization(%) |

Slice LUTs | 134,600 | 5615 | 4 | 5472 | 4 | 11,935 | 9 |

Memory LUTs | 46,200 | 0 | 0 | 0 | 0 | 0 | 0 |

Registers | 269,200 | 144 | <1 | 179 | <1 | 479 | <1 |

I/O pins | 400 | 73 | 18 | 73 | 18 | 145 | 36 |

Block RAMs | 13,140,000 | 0 | 0 | 0 | 0 | 0 | 0 |

DSPs | 740 | 44 | 6 | 40 | 5 | 64 | 9 |

**Table 3.**Utilization of FPGA resources in the Xilinx Artix-7 AC701 board to implement RGB and grayscale image transmissions by Chen oscillators using the parameter-switching scheme for decryption.

Resources | Available | RGB Image | Grayscale Image | ||
---|---|---|---|---|---|

Used | Utilization (%) | Used | Utilization (%) | ||

Slice LUTs | 134,600 | 73,157 | 54 | 83,810 | 62 |

Memory LUTs | 46,200 | 0 | 0 | 0 | 0 |

Registers | 269,200 | 885 | <1 | 948 | <1 |

I/O pins | 400 | 75 | 19 | 75 | 19 |

Block RAMs | 13,140,000 | 0 | 0 | 0 | 0 |

DSPs | 740 | 104 | 14 | 104 | 14 |

Parameter | This Work (RGB) | This Work (Grayscale) | Ref. [38] | Ref. [63] | Ref. [64] | Ref. [65] |
---|---|---|---|---|---|---|

FPGA | Artix-7 | Artix-7 | ZYNQ | Cyclone IV | Stratix IV | Virtex 5 |

Slice LUTs | 54% | 62% | 43% | 33% | 27% | 24% |

Registers | <1% | <1% | 25% | 27% | <1% | 5% |

I/O pins | 19% | 19% | 24% | N/A | 22% | 32% |

Block RAMs | 0% | 0% | N/A | 96% | 40% | N/A |

DSPs | 14% | 14% | N/A | 24% | 7% | 62% |

Algorithm | RK-4 | RK-4 | RK-4 | Euler | Euler | RK-4 |

Language | VHDL | VHDL | Verilog | Verilog | VHDL | VHDL |

Number | 24 bit | 24 bit | 32 bit | 32 bit | 19 bit | 32 bit |

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**MDPI and ACS Style**

Adeyemi, V.-A.; Nuñez-Perez, J.-C.; Sandoval Ibarra, Y.; Perez-Pinal, F.-J.; Tlelo-Cuautle, E. FPGA Realization of the Parameter-Switching Method in the Chen Oscillator and Application in Image Transmission. *Symmetry* **2021**, *13*, 923.
https://doi.org/10.3390/sym13060923

**AMA Style**

Adeyemi V-A, Nuñez-Perez J-C, Sandoval Ibarra Y, Perez-Pinal F-J, Tlelo-Cuautle E. FPGA Realization of the Parameter-Switching Method in the Chen Oscillator and Application in Image Transmission. *Symmetry*. 2021; 13(6):923.
https://doi.org/10.3390/sym13060923

**Chicago/Turabian Style**

Adeyemi, Vincent-Ademola, Jose-Cruz Nuñez-Perez, Yuma Sandoval Ibarra, Francisco-Javier Perez-Pinal, and Esteban Tlelo-Cuautle. 2021. "FPGA Realization of the Parameter-Switching Method in the Chen Oscillator and Application in Image Transmission" *Symmetry* 13, no. 6: 923.
https://doi.org/10.3390/sym13060923