# An Improved 4H-SiC MESFET with a Partially Low Doped Channel

^{*}

## Abstract

**:**

_{t}), gate-source capacitance (C

_{gs}) and saturation current (I

_{d}). The simulated results show that with the increase of H, the PAE of the device increases and then decreases when the value of N

_{PLDC}is low enough. The doping concentration and thickness of the PLDC are respectively optimized to be N

_{PLDC}= 1 × 10

^{15}cm

^{−3}and H = 0.15 μm to obtain the best PAE. The maximum PAE obtained from the PLDC-MESFET is 43.67%, while the PAE of the DR-MESFET is 23.43%; the optimized PAE is increased by 86.38%.

## 1. Introduction

## 2. Device Structure

_{PLDC}, respectively. The N

_{PLDC}was set to 1 × 10

^{17}cm

^{−3}, 1 × 10

^{16}cm

^{−3}and 1 × 10

^{15}cm

^{−3}. The H was set from 0 to 0.25 μm in a step of 0.05 μm.

_{d}), threshold voltage (V

_{t}), gate–source capacitance (C

_{gs}) and transconductance (g

_{m}). Those parameters are used in ADS to modify the EE_FET3 model. The modified EE_FET3 model and “Load-Pull PAE, Output Power Contours” model [15] were used to measure the PAE of the device under the same bias conditions. The working bias conditions were set as follows: V

_{gs}was −8.0 V, V

_{ds}was 28 V, RF was 850 MHz and Pavs_dBm was 28 dBm. Keeping the bias condition and changing the parameters obtained from ISE-TCAD, the PAE of the device under different thicknesses and doping concentrations can be calculated as follows [16].

_{out}is output power, P

_{in}is input power and P

_{dc}is DC power.

## 3. Results and Discussion

#### 3.1. The Effect of Doping Concentration and Thickness On the Device Parameters

_{PLDC}) and thickness (H) of the PLDC. The effect of N

_{PLDC}and H on V

_{t}is shown in Figure 2a. With the decrease of N

_{PLDC}, the absolute value of V

_{t}decreases obviously. When H increases, the V

_{t}overall trend is also decreasing. This is because the changes in N

_{PLDC}and H directly control the total carrier concentration in the channel, and V

_{t}is proportional to the total carrier. Figure 2b shows the effects of N

_{PLDC}and H on C

_{gs}. With the decrease of N

_{PLDC}and the increase of H, C

_{gs}decreases. On the one hand, the PLDC suppresses the under-gate depletion layer extending to the source side, and on the other hand, it reduces the total number of carriers in the channel, thereby reducing the input capacitance of the device. In the Figure 2c, g

_{m}increases first and then decreases. The reason for this formation may be that the thinner low doped layer can increase the gate’s ability to control the current by inhibiting the diffusion of the depletion layer to some extent. When H is thick enough, the ability of the gate to control the current will be reduced. So, g

_{m}decreases. In Figure 2d, I

_{dsat}is roughly decreased as H increases and N

_{PLDC}decreases. This is mainly caused by the decrease of the channel carrier concentration. When H is 0.25 μm, the parameters exhibit a sharp decrease and the DC characteristic of the device becomes poor. It is indicated by the simulation results that the PLDC-MESFET has smaller values of C

_{gs}, g

_{m}, V

_{t}and I

_{dsat}as compared to those of the original device.

#### 3.2. The Influences of Doping Concentration and Thickness on the PAE

_{PLDC}. When H is 0.20 μm and N

_{PLDC}is 1 × 10

^{15}cm

^{−3}or 1 × 10

^{16}cm

^{−3}, the PAE of the device decreases sharply. When H is 0.20 μm and N

_{PLDC}is 1 × 10

^{17}cm

^{−3}, the PAE of the device increases. When H is 0.25 μm, the simulation results show that the DC characteristics and AC characteristics of the device are poor, and the PAE of these structures is low. The maximum value of the PAE is obtained when the N

_{PLDC}is 1 × 10

^{15}cm

^{−3}, the H is 0.15 μm. The PAE of the new device is 43.67% while the PAE of the original device is 23.43%. The optimized PAE is increased by 86.38%. The PAE of the IUU-MESFET and DRBL AlGaN/GaN HEMT increase 18% and 48%, respectively. So, the PLDC has a great effect on improving the PAE of the device. In the paper 107 W CW SiC MESFET with 48.1% PAE, the experimental PAE of the device at 2 W (33 dBm) is close to 25% [17]. The PAE of the DR-MESFET is 23.43% at 0.63 W (28 dBm). This is essentially consistent with the simulation results.

#### 3.3. Mechanism Discussion

_{gs}is −8.0 V, V

_{ds}is 28 V, RF is 850 MHz and Pavs_dBm is 28 dBm. As shown in Figure 4a, the PAE increases with the increase of V

_{t}when g

_{m}is a constant. When V

_{t}is a constant, the PAE also increases with the increase of g

_{m}. When g

_{m}is between 40 and 60 mS, the PAE of the device has the biggest change. This can be observed by the distance between the two curves. Figure 4b shows the influence of I

_{dsat}and C

_{gs}on the PAE. With the increase of C

_{gs}, the PAE decreases. With the increase of I

_{dsat}, the PAE increase. Furthermore, the larger I

_{dsat}is, the slower PAE increases.

_{t}, the bigger the PAE, and the smaller the C

_{gs}, the bigger the PAE. For g

_{m}, a bigger g

_{m}means a higher current gain, so it a larger output can be obtained under the same input. According to Figure 4a, the PAE is proportional to g

_{m}. This is the reason why the PAE of the device decreases sharply when H is 0.20 μm and N

_{PLDC}is 1 × 10

^{15}cm

^{−3}or 1 × 10

^{16}cm

^{−3}. When H is 0.20 μm and N

_{PLDC}is 1 × 10

^{17}cm

^{−3}, the PAE of the device increases because g

_{m}is not the key factor compared with V

_{t}, I

_{dsat}and C

_{gs}. The PAE of the device is decided by the influences of those parameters.

_{PLDC}= 1 × 10

^{15}cm

^{−}

^{3}and H = 0.15 μm. Table 1 shows some main parameters of the two devices. It can be seen that the PAE of the PLDC-MESFET is 43.67%, which is higher than the PAE of 23.43% of the DR-MESFET. Compared the two devices, the PLDC-MESFET has a smaller threshold voltage, smaller input capacitance, smaller transconductance and smaller saturation current than the DR-MESFET. The increase of the PAE is influenced by the combination of these parameters. When the absolute value of V

_{t}decreases, the device is easier to turn on and gains a larger output current. So, the output power P

_{out}increases and a higher PAE is reached. According to Formula (2) [16], a smaller input capacitance C

_{gs}means the device has less energy loss when working in RF (charging and discharging).

_{dyn}is the dynamic power consumption flipped once, E

_{VD}is the energy obtained from the power source, E

_{c}is the capacitor stored energy, C is the gate–source capacitor and V

_{D}is the drain voltage. A small C

_{gs}also increases the input impedance of the device. Therefore, P

_{out}of the device increases and P

_{in}decreases. For I

_{dsat}, a small I

_{dsat}indicates a small P

_{out}. Under the influence of these parameters, the device has a big PAE. In there, g

_{m}is sacrificed to obtain a higher PAE. Though a larger g

_{m}is helpful to increase PAE, the influences of the other parameters on PAE are more obvious. So, the maximum value of PAE is 43.67% when N

_{PLDC}is 1 × 10

^{15}cm

^{−3}and H is 0.15 μm, as obtained by sacrificing some of the DC performances of the device.

## 4. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

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**Figure 1.**Schematic cross-sections of the (

**a**) DR 4H-SiC MESFET, (

**b**) partially low doped channel (PLDC) 4H-SiC MESFET.

**Figure 2.**The effect of N

_{PLDC}and H on the device parameters: (

**a**) V

_{t}-N

_{PLDC}and H, (

**b**) C

_{gs}-N

_{PLDC}and H, (

**c**) g

_{m}-N

_{PLDC}and H, (

**d**) I

_{dsat}-N

_{PLDC}and H.

**Figure 4.**The effect of device parameters on PAE: (

**a**) PAE-V

_{t}and g

_{m}, (

**b**) PAE-C

_{gs}and I

_{dsat}.

Parameters | DR 4H-SiC MESFET | PLDC 4H-SiC MESFET |
---|---|---|

I_{dsat} (mA/mm) | 448.00 | 319.90 |

V_{b} (V) | 125.35 | 130.20 |

g_{m} (mS/mm) | 59.30 | 49.30 |

V_{t} (V) | −7.52 | −6.49 |

C_{gs} (pF/mm) | 0.59 | 0.49 |

PAE (%) | 23.43 | 43.67 |

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**MDPI and ACS Style**

Jia, H.; Tong, Y.; Li, T.; Zhu, S.; Liang, Y.; Wang, X.; Zeng, T.; Yang, Y.
An Improved 4H-SiC MESFET with a Partially Low Doped Channel. *Micromachines* **2019**, *10*, 555.
https://doi.org/10.3390/mi10090555

**AMA Style**

Jia H, Tong Y, Li T, Zhu S, Liang Y, Wang X, Zeng T, Yang Y.
An Improved 4H-SiC MESFET with a Partially Low Doped Channel. *Micromachines*. 2019; 10(9):555.
https://doi.org/10.3390/mi10090555

**Chicago/Turabian Style**

Jia, Hujun, Yibo Tong, Tao Li, Shunwei Zhu, Yuan Liang, Xingyu Wang, Tonghui Zeng, and Yintang Yang.
2019. "An Improved 4H-SiC MESFET with a Partially Low Doped Channel" *Micromachines* 10, no. 9: 555.
https://doi.org/10.3390/mi10090555