Open Access
This article is
 freely available
 reusable
Materials 2019, 12(14), 2260; https://doi.org/10.3390/ma12142260
Article
On the Application of a Diffusive Memristor Compact Model to Neuromorphic Circuits
^{1}
Departamento de Física, FCEyN, UBA, Pabellón 1, Ciudad Universitaria, Buenos Aires 1428, Argentina
^{2}
Instituto Tecnológico de Buenos Aires, and National Scientific and Technical Research Council (CONICET), Buenos Aires 1437, Argentina
^{3}
Departament d‘Enginyeria Electrònica, Universitat Autònoma de Barcelona, 08193 Cerdanyola del Vallès, Spain
*
Correspondence: [email protected]
^{†}
These authors contributed equally to this work.
Received: 30 May 2019 / Accepted: 8 July 2019 / Published: 13 July 2019
Abstract
:Memristive devices have found application in both random access memory and neuromorphic circuits. In particular, it is known that their behavior resembles that of neuronal synapses. However, it is not simple to come by samples of memristors and adjusting their parameters to change their response requires a laborious fabrication process. Moreover, sample to sample variability makes experimentation with memristorbased synapses even harder. The usual alternatives are to either simulate or emulate the memristive systems under study. Both methodologies require the use of accurate modeling equations. In this paper, we present a diffusive compact model of memristive behavior that has already been experimentally validated. Furthermore, we implement an emulation architecture that enables us to freely explore the synapselike characteristics of memristors. The main advantage of emulation over simulation is that the former allows us to work with realworld circuits. Our results can give some insight into the desirable characteristics of the memristors for neuromorphic applications.
Keywords:
memristor; compact model; emulator; neuromorphic; synapse; STDP; pavlov1. Introduction
Memristive elements or resistive switches are twoterminal components that exhibit a hysteretic relation between voltage and current [1,2,3]. Because they are highly nonlinear and have the property of nonvolatility, there is a great interest in their use in the design of new applications in neuromorphic circuits [4,5,6,7,8,9,10,11,12,13,14,15], programmable logic [16,17,18] and chaotic circuits [19,20,21], as well as in the development of new memory technologies [22,23,24,25]. Unfortunately, it is not simple to come by samples of memristors. Moreover, each time a researcher desires to adjust a parameter to change their response, she needs to go through a laborious fabrication and testing process. The usual alternatives are to either simulate [26,27,28,29,30] or emulate [31,32,33,34,35,36,37] the memristive systems under study. Emulation has the additional advantage that it allows to test the interaction of memristors with real circuit components [38]. For this reason, we present a simple emulator, based on widelyavailable and lowcost hardware that can work with various numerical models of memristors.
Since synapses can be understood as twoterminal elements with variable conductance, there has been an increasing interest on the application of memristors as synaptic junctions [4,5,6,7,8,13]. In particular, it has been proposed to modulate memristors conductance by applying specific signals, namely action potentials, with shapes and time characteristics that define the response of the neuromorphic circuit such as in the case of the SpikeTimingDependent Plasticity (STDP) process [6,8]. STDP relates the change in connection strength between two neurons as a function of the temporal distance between pre and postsynaptic stimuli [39,40,41]. It has been observed that the synaptic strength increases (decreases) when the presynaptic cell fires before (after) the postsynaptic neuron.
In the literature, we find some sophisticated protocols and complex circuits that allow for qualitatively mimicking the behavior of synapses [4]. However, it has been recently shown that the response of memristors with diffusive dynamics is already very similar to that of a synaptic junction [29,42]. Thus, it is interesting to study the application of this type of memristors in neuromorphic computing systems.
Memristors have also been used as part of more complex neuromorphic circuits. Particularly, in those that mimic the classical learning rule known as Pavlovian conditioning [43,44,45]. In this learning procedure, a specific stimulus that provokes a given response is paired with a neutral stimulus and, as a result of this pairing, the neutral stimulus can later evoke a response in the absence of the specific stimulus [46].
Since memristors with diffusive dynamics are wellsuited to mimic the behavior of a synapse, in this work, we focus on the study of such type of memristors in simple neuromorphic circuits that present STDP behavior and Pavlovian conditioning, and study their performance as a function of the memristive device response time. To this aim, we consider a compact model of memristor that accurately describes the behavior of actual memristive systems [47,48,49]. This memristor model was implemented in an emulation architecture based on a microcontroller and a digital potentiometer. An exhaustive characterization of the emulator device and preliminary results of the STDP process were presented in Ref. [50].
1.1. Compact Model of Memristive Behavior
In this section, we review a compact model for memristors with diffusive dynamics that we have already introduced and have shown to represent accurately the experimentally measured behavior of actual devices [47,48,49].
Memristive devices are usually modeled by two equations. While one of the equations describes the I–V characteristic, the other governs the evolution of a state variable on which the I–V characteristic depends on. Many experimental reports show that, as multiple conductive channels in the insulator are created or destructed, metalinsulatormetal devices exhibit more than two conductive states. For this reason, we developed a model whose state variable tracks the fraction of active conductive channels [47,48,49]. Assuming that the channel creation probability follows a threshold distribution ${f}^{+}(v)$, the dependence of the creation of conductive channels ${\mathsf{\Gamma}}^{+}$ on the applied voltage v can be calculated as
where $H(x)$ is the Heaviside function. On the other hand, the destruction of conductive channels ${\mathsf{\Gamma}}^{}$ can be obtained by considering the destruction threshold distribution ${f}^{}(v)$. Both ${\mathsf{\Gamma}}^{+}$ and ${\mathsf{\Gamma}}^{}$ are used to define a recursive formula for the discretizedtime evolution of active conductive channels as
where h is the integration time step. The evolution of $\lambda $ is highly sensitive to the creation and destruction distributions ${f}^{\pm}(v)$. For instance, skewed distributions may be suitable to describe devices where transitions take place abruptly upon reaching a given threshold potential while bellshaped distributions may be used to describe those devices with gentle transitions [51]. For the sake of simplicity, we consider the latter approach with ${f}^{\pm}(v)$ following logistic distributions. Thus, the ${\mathsf{\Gamma}}^{\pm}$ functions are given by sigmoid functions
$${\mathsf{\Gamma}}^{+}(v)={\int}_{\infty}^{+\infty}H(v\xi ){f}^{+}(\xi )\mathrm{d}\xi ,$$
$$\lambda (v(t))=min\left\{{\mathsf{\Gamma}}^{}(v(t)),max\left[\lambda (v(th)),{\mathsf{\Gamma}}^{+}(v(t))\right]\right\}\phantom{\rule{4pt}{0ex}},$$
$${\mathsf{\Gamma}}^{\pm}(v)=\frac{1}{1+{e}^{{\alpha}_{\pm}(v\mp {\delta}_{\pm})}}.$$
Parameters ${\delta}_{\pm}$ and ${\alpha}_{\pm}$ are positive constants that account for the positive and negative threshold potentials and transition rates, respectively. Figure 1 depicts voltage distributions ${f}^{\pm}$ and the corresponding ${\mathsf{\Gamma}}^{\pm}$ functions. Equation (2) fixes the evolution of active channels $\lambda $ between the region delimited by ${\mathsf{\Gamma}}^{\pm}$. Conductive channels are neither aggregated nor dissolved instantaneously. Moreover, the response time depends on the magnitude of the driving signal. Experiments have shown that switching time and voltage are related by an exponential function. In order to account this phenomenon, the time evolution of active channels $w(t)$ is described by the differential equation
where ${\tau}_{0}$ is a characteristic response time, associated with a diffusive process, and ${v}_{0}$ a positive constant that weights the input stimuli.
$${\tau}_{0}exp\left(\frac{v(t)}{{v}_{0}}\right)\frac{d}{dt}w(t)+w(t)=\lambda (v(t)),$$
The model is completed by specifying a relationship between $w(t)$ and the I–V characteristics of the device. In previous works, the I–V characteristic equation was a nonlinear relationship that resembled that of two identical oppositebiased diodes [52,53]. As the main goal is to study the dynamics of switching effect, we simplified the I–V relation to that of a linear variable resistance described by
where ${R}_{\mathrm{on}}$ and ${R}_{\mathrm{off}}$ are the low and highresistance levels of the memristor, respectively. This simplified relation alleviates the computation burden of simulation and emulation processes, without changing the essence of the model.
$$R(t)={R}_{\mathrm{on}}w(t)+{R}_{\mathrm{off}}\left(1w(t)\right),$$
1.2. Emulation Architecture
Many emulation architectures have been proposed [31,32,33,34,35,36,37]. Following the work of Olumodeji and Gottardi [36], we base our design on an Arduino board and a digital potentiometer. A schematic of the emulator design is shown in Figure 2. The analogtodigital converters (ADCs) in the Arduino are used to measure the current that flows through the potentiometer. The microcontroller integrates the differential equations that model the behavior of the memristor and changes the resistance of the potentiometer. A description of the emulator architecture is given in Section 3.1. In Section 2.1, we present results that validate the correctness of the implemented emulator.
1.3. Memristors for Neuromorphic Applications
There is a vast literature on the application of memristors for machine learning and computation (see, e.g., [54,55,56,57,58] and references therein). In particular, a review of the pertinent bibliography reveals a special interest on the use of memristors in neuromorphic circuits [4,5,6,7,8,9,10,11,12,13,14,15]. The focus of this paper is to study the possibility of using memristors as neuronal synapses and to characterize the role of the parameters that influence the dynamics of the memristive behavior.
A synapse is a biological structure that allows the communication of two neurons which is located, for example, in the junction of an axon with a dendrite of a different cell. The modulation of the synaptic strength plays a crucial role in learning and memory formation. By adjusting the weight of cells’ connections, the neural network can be reconfigurated. The connection strength between network elements is adapted through processes known as learning rules. One type of these processes is the one described by the Hebbian theory where it is postulated that the synaptic modulation is driven by correlations between pre and postsynaptic neuronal activity. SpikeTimingDependent Plasticity (STDP) process [39,40,41,59] is one common protocol to analyze the adaptation of synaptic strength. The initial strength of connection is quantified by measuring the response of the postsynaptic neuron to the application of a measurement pulse to the presynaptic cell. Then, a periodic sequence of presynaptic and postynaptic stimuli, separated by a time $\Delta t$, is applied. The effect of such stimuli signals is evaluated by measuring the postsynaptic response to a new test pulse in the presynaptic neuron. STDP describes the dependence of the change of synaptic strength, before and after the treatment, on $\Delta t$. In Section 2.2, we review results of a series of experiments [50] with emulated memristors that mimic the STDP process of real biological synaptic junctions.
Classical conditioning is another type of learning theory that relates preceding stimuli and behavioral reactions in animals. Let us assume that there is an unconditioned stimulus (US) that provokes an unconditioned response (UR). There is also a neutral stimulus (NS) that initially does not provoke any response. If the neutral stimulus is presented to the subject simultaneously with the unconditioned stimulus in one or more opportunities, then an association is created and the NS becomes a conditioned stimulus (CS) that, even in the absence of the US, provokes a conditioned response (CR) like the unconditioned one. The typical example from Pavlov’s original research is the physiological reaction of dogs in the presence of food [46]. A dog naturally salivates (UR) in the presence of food (US). If, for example, a dog is stimulated by the sound of a bell (NS), no reaction in the digestive system is found. However, if the food is accompanied by a bell sound in several opportunities, the dog learns to associate the bell to food. Then, the sound of the bell becomes a CS that provokes salivation in the absence of food (CR).
There are many examples of neuromorphic circuits involving memristors that appear to mimic Pavlovian learning [31,43,44,45,60,61]. Tan et al. [45] note that Pavlovian conditioning comprises three different behaviors: (1) acquisition of the association by training trials where NS and US are either simultaneous or close in time, (2) extinction of the association (forgetting) when CS is applied alone, and (3) recovery by a training process after the last extinction. According to Tan and colleagues, no previous works addressed all three features of classical learning.
Figure 3 shows a block diagram of the experimental setup identical to that in Hu et al. [43]. The unconditioned stimulus is fed into neuron 3 through synapse 1. Since the response to the US is innate and assumed to be unchangeable, synapse 1 is simply implemented as a constant resistor. The conditioned stimulus is fed into neuron 3 through synapse 2. Given that actual conditioning occurs in this synapse, its implementation is slightly more complex and it involves a memristor. Moreover, this synapse receives feedback from neuron 3. The output of the experimental setup is a simple comparator that gives a binary signal (salivation/nosalivation) based on the output of neuron 3. In Section 2.3, we show that the simplified model in Equations (2)–(5) is useful to reproduce the essence of classical conditioning when used to emulate the memristor in Figure 3. A detailed description of the experimental setup, including circuits schematics, is given in Section 3.2.
2. Results and Discussion
2.1. Validation of the Emulation Architecture
We verified the correctness of the emulator design by implementing the memristor model introduced in Section 1.1 and comparing the resulting measurements with numerical simulations. The circuit schematic of the experimental setup and typical measurements are shown in Figure 4. The circuit under test, shown in Figure 4a, is comprised of an arbitrary wave generator that feeds the emulator device with a sinusoidal signal and an inseries measuring resistance that tracks the flowing current. Figure 4b shows experimental results for two driving frequencies. It can be seen that the rate at which the driving signal changes influences the apparent switching threshold [62]. In order to validate the memristor emulator, we solved Equations (2)–(5) numerically. These results are presented in Figure 4b showing a good agreement with the emulator results.
2.2. Synapse Mimicking
Part of the material in this section was already presented in Ref. [50]. The main goal is to reproduce the STDP process by an appropriate pulsing experiment with the memristor playing the role of the synapse. We used a simple circuit comprising an arbitrary waveform generator, a resistor, and the memristor emulator as it is schematized in Figure 4a. We applied a $500\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$period signal consisting of two stimulus pulses, one positive (the presynaptic stimulus) and one negative (the postsynaptic stimulus). The signal also included two measurement pulses, one of them $50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$ before the presynaptic pulse and the other $50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$ after the postsynaptic stimulus. While the stimuli were $50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$wide and had an absolute amplitude of $1.5\phantom{\rule{4pt}{0ex}}\mathrm{V}$, the measurement pulse was only $25\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$wide and $200\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{V}$ high. Pulse duration was partly determined by the frequency limitations of the emulator circuit (see Section 3.1). The measurement pulse amplitude was chosen in order to avoid a significant resistance change. Figure 5 shows a particular example where two stimuli overlap for $\Delta t=25\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$. Figure 5 also shows results tracking the current flowing through the emulator. As expected, the transient response of the current corresponds to the resistance change of the emulator. Let us remark that the results in Figure 5, as well as the results in all the remaining figures of this work, were experimentally obtained on the basis of emulated memristors.
Having fixed the pulsing protocol, model parameters were chosen on a trial and error basis, aiming to obtain the desired synapselike behavior: ${\alpha}_{\pm}=30\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\delta}_{\pm}=0.75\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${R}_{\mathrm{on}}=1\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${R}_{\mathrm{off}}=5\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, and ${v}_{0}=0.2\phantom{\rule{4pt}{0ex}}\mathrm{V}$. Since we are interested on the influence of the device’s response time, ${\tau}_{0}$ was varied. In order to understand the behavior of the memristor with the selected parameters, Figure 6 shows experimental results, measured on the emulator, for different values of ${\tau}_{0}$. The experimental setup is the same as in Figure 4a, where a sinusoidal signal is applied. The frequency (1 $\mathrm{Hz}$) and amplitude ($1.5\phantom{\rule{4pt}{0ex}}\mathrm{V}$) were set to be commensurate to those in the pulsing experiment. It is interesting to compare the resulting curves in Figure 6 with those in Figure 4b. Whereas in the latter case ${R}_{\mathrm{on}}$ and ${R}_{\mathrm{off}}$ are attained in each cycle (as evidenced by the same extreme slopes for both driving frequencies), in the former case, the memristance changes between two intermediate values. Moreover, the two extreme resistance values depend on the response time ${\tau}_{0}$.
Let us now return to the pulsing protocol in Figure 5. For a fixed $\Delta t$, we applied a driving signal that was composed of several periods of the stimulus signal. In this way, we studied the relation between $\Delta t$ and the resistive change of the device. Figure 7 shows the resistance behavior during the first eight periods for two $\Delta t$ and a pair of different initial conditions. The figure shows that the final value of the resistance is sensitive to the delay $\Delta t$ but not to the initial setting. We thoroughly characterized this behavior by exciting the memristor with 20 consecutive periods of the stimulus signal and changing the value of $\Delta t$. Figure 8 shows the relation between the final resistance and $\Delta t$. In particular, we show results for ${\tau}_{0}=5$, 10, and $20\phantom{\rule{4pt}{0ex}}\mathrm{s}$ (see Equations (2)–(5)). As it can be seen, the behavior depends on whether $\Delta t$ is smaller or greater than the pulsewidth ($50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$). Whenever there is destructive interference between the pre and postsynaptic stimuli ($\Delta t<50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$), the final state exhibits a strong dependence on $\Delta t$. However, no such dependence is observed when $\Delta t>50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$ and only ${\tau}_{0}$ influences the final resistance.
Figure 9 shows the influence of $\Delta t$ and ${\tau}_{0}$ on the ratio of change of the resistance in relation to its final state. Since the measured behavior of the resistance as a function of $\Delta t$ is qualitatively similar to that observed in real neurons, we believe that memristive devices that are modeled by this type of dynamic behavior are suitably to be used in neuromorphic circuits inspired by the STDP process. As the final state of resistance is affected by the parameter ${\tau}_{0}$, it will affect the resistance change ratio. The change of resistance decreases as ${\tau}_{0}$ increases.
2.3. Classical Conditioning
In this section, we show that the simplified model in Equations (2)–(5) is useful to reproduce the essence of classical conditioning. Figure 3 shows a block diagram of the experimental setup identical to that in Ref. [43]. Details of the experimental setup are given in Section 3.2.
Figure 10 shows typical results of our experimental setup for Pavlovian conditioning. Results are grouped into four blocks. In the first block, in the absence of association, the bell (signal ${V}_{b}$) is a neutral stimulus that does not provoke any response (no salivation in the last row). In the second block, the unconditioned stimulus (food, ${V}_{f}$) is accompanied by the unconditioned response. Although the bell follows immediately after the US has disappeared, no association is produced and there is no response to the neutral stimulus. In the third block, food and bell are simultaneous and the association is acquired: there is a conditioned response to the conditioned stimulus even after the unconditioned stimulus has disappeared. Moreover, after a lapse in which CS is applied alone, the association is forgotten. Finally, in the fourth block, the association is recovered. Note that the forgetting process takes longer than in the third block, which corresponds intuitively to the reinforcement of the association. In summary, all three features described by Tan et al. [45] as necessary for classical conditioning are present, viz. acquisition, extinction and recovery of the association.
One of the advantages of using an emulator instead of an actual memristor is the possibility of changing model parameters easily. It is this advantage that allows us to study the influence of the characteristic response time of the memristor ${\tau}_{0}$ on learning time and memory persistence. Figure 11 shows results for the same experimental setup as in Figure 10. Memory persistence is measured as the number of input bell pulses, after the food stimulus has disappeared that produces a conditioned response. Since small random variations may produce changes in the measurements, Figure 11 presents results of ten experiments. Although it can be expected that, as ${\tau}_{0}$ increases, the memory lasts longer, Figure 11 seems to exhibit a different picture. However, the fact is that, as ${\tau}_{0}$ increases, it takes longer to produce a strong association between the conditioned stimulus (bell) and the conditioned response (salivation). Weaker association for larger memristor response time is reflected in shorter memory persistence. Even in Block 3, no association is learned when ${\tau}_{0}=20\phantom{\rule{4.pt}{0ex}}\mathrm{s}$. Longer memory persistence in Block 4 is due to the strengthening of association after a second round of training.
In order to evaluate memory persistence without the confounding element of learning time, we conducted a different set of experiments where the system departs from a strong association (low memristor resistance, ∼1 $\mathrm{k}\mathsf{\Omega}$). At the beginning of each experiment, both the unconditioned and conditioned stimuli are present for five pulses. After this associationstrengthening period, both stimuli are interrupted for a variable lapse (measured as number of absent stimulus pulses or blank spaces). Finally, only the conditioned stimulus is enabled again after the nostimuli lapse. Memory persistence is measured as the number of CS pulses that produce a response in this final period of the experiment. Figure 12 shows a typical experiment and Figure 13 shows the results of five experiments. As it can be observed, the learned association persists longer as the characteristic time ${\tau}_{0}$ increases, as it intuitively expected. Moreover, there is no significant evidence of a stronger forgetting process as the period without stimuli gets longer.
The characteristic response time ${\tau}_{0}$ varies between the different memristive systems. Amorphous silicon devices present ${\tau}_{0}$ values of the order of ${10}^{3}$ to ${10}^{4}$ s [63,64], HfO${}_{x}$/AlO${}_{x}$ structures of the order of ${10}^{2}$ s [65], and Ti/HfO/Pt of the order of 1 s [66]. Moreover, many devices present a highly asymmetric behavior between ON/OFF switching times [67]. For these reasons, it is important to perform preliminary characterizations of the neuromorphic circuit to be implemented. Our results suggest that applications, where the information is to be retained for the longest time, should be based on devices with high ${\tau}_{0}$ value. However, this has the disadvantage that the resulting learning rules are going to be weaker. On the other hand, in applications where the reconfiguration of the connections is dynamic and it is expected to obtain appreciable changes in short times, the design should be based on devices with low ${\tau}_{0}$ where the learning rules are stronger.
3. Materials and Methods
3.1. Details of the Emulator Architecture
Figure 2 shows the schematic of the emulator design. A detailed description and analysis of the architecture of the emulator can be found in Ref. [50]. Time steps of the numerical integration algorithm are limited by the computation speed of the microprocessor. For this reason, we resorted to one of the fastest Arduino boards, the Arduino Due with an Atmel SAM3X8E processor running at 84 MHz [68]. The resulting integration time step was ∼400 $\mathsf{\mu}\mathrm{s}$ and, hence, frequency of input signals are required to be ≪ 2.5$\phantom{\rule{4pt}{0ex}}\mathrm{kHz}$.
We used a Renesas X9C103P [69] potentiometer that accepts bipolar voltage signals and has 100 possible resistance values between ∼35.0$\phantom{\rule{4pt}{0ex}}\mathsf{\Omega}$ and ∼9.5$\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$. Although we found this potentiometer adequate for our current implementation, it would be convenient to upgrade future designs with a higher resolution potentiometer.
The code used to interact with the digital potentiometer was developed by Timo Fager [70]. The X9C103P potentiometer is controlled by an external clock that sequentially changes the resistance by increment or decrement steps. The larger the change in resistance, the longer it takes to realize it due to this sequential programming feature, leading to larger integration time steps. Larger time steps, in turn, limit the highest admissible frequency of the input signals.
Analogtodigital converters (ADCs) of the Arduino Due admit inputs only between $0.0$ and $3.3$ $\mathrm{V}$. To prevent damage and malfunction of the microprocessor, there is a signal conditioner circuit to adapt the sensed voltage to adequate signal levels (see Figure 2). Essentially, the signal is buffered, attenuated and biased to comply with the ADC input range.
Measurement errors also limit the emulation accuracy. We found measurement errors much higher than the ADC resolution of the Atmel SAM3X8E microcontroller (12 bits, LSB $<1\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{V}$) due to several noise sources, suggesting that a better noiseresistant circuit design is needed, especially in signal adaptation stage in Figure 2. One of the possible noise sources is due to digital clock feedthrough. Noise problems were somewhat alleviated with low pass filters.
The model described in Section 1.1 is implemented in Arduino Due using a semiimplicit Euler integration algorithm. Algorithm 1 shows the pseudocode of the main loop. Function setResistance() uses the utilities in Ref. [70]. Function readVoltages() reads the results from the microcontroller’s ADCs and computes the voltage drop on the potentiometer on the basis of the signal adaptation circuit (see Figure 2). The remaining functions are explained in Algorithms 2 and 3.
Algorithm 1 Model implementation in Arduino Due: Main loop 

Algorithm 2 Model implementation in Arduino Due: Integration time step 

Algorithm 3 Model implementation in Arduino Due: Numerical Integration 

3.2. Details of the Conditioned Learning Experiment
Figure 3 shows a block diagram of the experimental setup identical to that in Ref. [43] and Figure 14 shows a schematic of our implementation. We must note that Figure 14 shows only the outputs of neurons 1 and 2 in Figure 3: ${V}_{f}$ is the response of neuron 1 to the unconditioned stimulus (i.e., food) and ${V}_{b}$ is the response of neuron 2 to the conditioned stimulus (i.e., bell sound).
The unconditioned stimulus ${V}_{f}$ is fed into neuron 3 through synapse 1. Since the response to the US is innate and assumed to be unchangeable, synapse 1 is simply implemented as a constant resistor ${R}_{\mathrm{syn}}$. The conditioned stimulus ${V}_{b}$ is fed into neuron 3 through synapse 2. Since actual conditioning occurs in this synapse, its implementation is slightly more complex and it involves an emulated memristor ${R}_{m}$ instead of a constant resistor. Since the strength of the input to neuron 3 depends on the voltage divider formed by ${R}_{c}$ and ${R}_{m}$, the input becomes stronger as ${R}_{m}$ decreases. The constant voltage source ${V}_{\mathrm{forget}}$ tries to force the memristor in high resistance values. In this sense, ${V}_{\mathrm{forget}}$ acts as a forgetting drive that is always present. The state of ${R}_{m}$ can also be altered by the feedback from the output of neuron 3, which is the actual source of association between salivation and the CS.
Simple calculations show that the voltage drop on the memristor is
$${V}_{m}=\frac{{R}_{s}}{{R}_{s}+{R}_{\mathrm{syn}}}{V}_{f}+{V}_{b}+{V}_{\mathrm{forget}}.$$
Observe that ${V}_{m}$ is independent of ${R}_{m}$ and it depends only on the stimuli. This fact implies that the learning (or forgetting) process is independent of the state of the association between NS/CS and the response.
The output of neuron 3 is fed into a comparator in order to obtain a binary output (${V}_{\mathrm{out}}$) such that a high level corresponds to a (conditioned or unconditioned) response to stimuli.
4. Conclusions
It has been argued in the literature that diffusive memristor devices may mimic the behavior of synapses. In this work, we presented a computationallyefficient simplification of an accurate and compact model of such devices. We believe that this model can be very useful in the study of complex neuromorphic circuits and we present its application to two simple examples.
The proposed model was used in a memristor emulator composed of a digital potentiometer and a microprocessor. The main advantage of emulation over simulation is its ability to interact with realworld circuits. In order to validate the correct operation of the emulator, several numerical simulations of a very simple circuit were made under different conditions, finding a good agreement with the experimental results. Although the implemented emulation architecture is simple, it has some limitations. In particular, it is based on a microprocessor with relatively low computing capacity. Future work with more complex circuits or a larger number of emulated memristors will require a faster microprocessor.
The emulated memristor was shown to mimic the SpikeTimingDependent Plasticity behavior of synapses. Moreover, it was found that the response time parameter of the memristor, ${\tau}_{0}$, affects the resistance change ratio in the STDP process. The larger ${\tau}_{0}$, the lower the change of resistance.
Finally, we introduced a memristorbased neuromorphic circuit that exhibited the main characteristics of Pavlovian conditioned learning. We also explored the influence of the response time ${\tau}_{0}$ in learning and memory persistence. In general, the larger ${\tau}_{0}$, the longer it takes the system to learn. However, once the conditioned response has been learned, a larger ${\tau}_{0}$ leads to a longer memory persistence.
Author Contributions
Conceptualization, G.A.P., P.I.F., E.M. and J.S.; methodology, G.A.P., P.I.F., E.M. and J.S.; software, A.C.F. and A.R.; validation, E.M. and J.S.; formal analysis, A.C.F. and A.R.; investigation, A.C.F. and A.R.; resources, G.A.P. and P.I.F.; data curation, A.C.F. and A.R.; writing—original draft preparation, G.A.P. and P.I.F.; writing—review and editing, E.M. and J.S.; visualization, A.C.F. and A.R.; supervision, E.M. and J.S.; project administration, G.A.P. and P.I.F.; funding acquisition, E.M. and J.S.
Funding
The participation of E.M. and J.S. in this work has been developed within the WakemeUP project (EUH2020ECSEL20171IA), cofunded by grants from Spain (PCI2018093107 grant from the Spanish Ministerio de Ciencia, Innovación y Universidades) and the ECSEL Joint Undertaking.
Conflicts of Interest
The authors declare no conflict of interest.
References
 Chua, L. Memristorthe missing circuit element. IEEE Trans. Circuit Theory 1971, 18, 507–519. [Google Scholar] [CrossRef]
 Chua, L.O.; Kang, S.M. Memristive devices and systems. Proc. IEEE 1976, 64, 209–223. [Google Scholar] [CrossRef]
 Chua, L.O. The fourth element. Proc. IEEE 2012, 100, 1920–1927. [Google Scholar] [CrossRef]
 Jo, S.H.; Chang, T.; Ebong, I.; Bhadviya, B.B.; Mazumder, P.; Lu, W. Nanoscale Memristor Device as Synapse in Neuromorphic Systems. Nano Lett. 2010, 10, 1297–1301. [Google Scholar] [CrossRef] [PubMed]
 Querlioz, D.; Bichler, O.; Gamrat, C. Simulation of a memristorbased spiking neural network immune to device variations. In Proceedings of the 2011 International Joint Conference on Neural Networks, San Jose, CA, USA, 31 July–5 August 2011; pp. 1775–1781. [Google Scholar] [CrossRef]
 LinaresBarranco, B.; SerranoGotarredona, T.; CamuñasMesa, L.; PerezCarrasco, J.; ZamarreñoRamos, C.; Masquelier, T. On SpikeTimingDependentPlasticity, Memristive Devices, and Building a SelfLearning Visual Cortex. Front. Neurosci. 2011, 5, 26. [Google Scholar] [CrossRef]
 Hu, S.G.; Wu, H.T.; Liu, Y.; Chen, T.P.; Liu, Z.; Yu, Q.; Yin, Y.; Hosaka, S. Design of an electronic synapse with spike time dependent plasticity based on resistive memory device. J. Appl. Phys. 2013, 113, 114502. [Google Scholar] [CrossRef]
 SerranoGotarredona, T.; Masquelier, T.; Prodromakis, T.; Indiveri, G.; LinaresBarranco, B. STDP and STDP variations with memristors for spiking neuromorphic learning systems. Front. Neurosci. 2013, 7, 2. [Google Scholar] [CrossRef] [PubMed]
 Bill, J.; Legenstein, R. A compound memristive synapse model for statistical learning through STDP in spiking neural networks. Front. Neurosci. 2014, 8, 412. [Google Scholar] [CrossRef] [PubMed]
 Prezioso, M.; MerrikhBayat, F.; Hoskins, B.; Adam, G.C.; Likharev, K.K.; Strukov, D.B. Training and operation of an integrated neuromorphic network based on metaloxide memristors. Nature 2015, 521, 61. [Google Scholar] [CrossRef]
 Saïghi, S.; Mayr, C.G.; SerranoGotarredona, T.; Schmidt, H.; Lecerf, G.; Tomas, J.; Grollier, J.; Boyn, S.; Vincent, A.F.; Querlioz, D.; et al. Plasticity in memristive devices for spiking neural networks. Front. Neurosci. 2015, 9, 51. [Google Scholar] [CrossRef]
 Covi, E.; Brivio, S.; Serb, A.; Prodromakis, T.; Fanciulli, M.; Spiga, S. Analog Memristive Synapse in Spiking Networks Implementing Unsupervised Learning. Front. Neurosci. 2016, 10, 482. [Google Scholar] [CrossRef]
 Shen, J.X.; Shang, D.S.; Chai, Y.S.; Wang, S.G.; Shen, B.G.; Sun, Y. Mimicking Synaptic Plasticity and Neural Network Using Memtranstors. Adv. Mater. 2018, 30, 1706717. [Google Scholar] [CrossRef] [PubMed]
 Kim, Y.; Kwon, Y.J.; Kwon, D.E.; Yoon, K.J.; Yoon, J.H.; Yoo, S.; Kim, H.J.; Park, T.H.; Han, J.W.; Kim, K.M.; et al. Nociceptive Memristor. Adv. Mater. 2018, 30, 1704320. [Google Scholar] [CrossRef] [PubMed]
 Yoon, J.H.; Wang, Z.; Kim, K.M.; Wu, H.; Ravichandran, V.; Xia, Q.; Hwang, C.S.; Yang, J.J. An artificial nociceptor based on a diffusive memristor. Nat. Commun. 2018, 9, 417. [Google Scholar] [CrossRef] [PubMed]
 Borghetti, J.; Li, Z.; Straznicky, J.; Li, X.; Ohlberg, D.A.; Wu, W.; Stewart, D.R.; Williams, R.S. A hybrid nanomemristor/transistor logic circuit capable of selfprogramming. Proc. Natl. Acad. Sci. USA 2009, 106, 1699–1703. [Google Scholar] [CrossRef] [PubMed]
 Xia, Q.; Robinett, W.; Cumbie, M.W.; Banerjee, N.; Cardinali, T.J.; Yang, J.J.; Wu, W.; Li, X.; Tong, W.M.; Strukov, D.B.; et al. MemristorCMOS hybrid integrated circuits for reconfigurable logic. Nano Lett. 2009, 9, 3640–3645. [Google Scholar] [CrossRef]
 Gao, L.; Alibart, F.; Strukov, D.B. Programmable CMOS/memristor threshold logic. IEEE Trans. Nanotechnol. 2013, 12, 115–119. [Google Scholar] [CrossRef]
 Itoh, M.; Chua, L.O. Memristor oscillators. Int. J. Bifurc. Chaos 2008, 18, 3183–3206. [Google Scholar] [CrossRef]
 Muthuswamy, B.; Chua, L.O. Simplest chaotic circuit. Int. J. Bifurc. Chaos 2010, 20, 1567–1580. [Google Scholar] [CrossRef]
 Muthuswamy, B. Implementing memristor based chaotic circuits. Int. J. Bifurc. Chaos 2010, 20, 1335–1350. [Google Scholar] [CrossRef]
 Waser, R.; Dittmann, R.; Staikov, G.; Szot, K. Redoxbased resistive switching memories–nanoionic mechanisms, prospects, and challenges. Adv. Mater. 2009, 21, 2632–2663. [Google Scholar] [CrossRef]
 Waser, R.; Aono, M. Nanoionicsbased resistive switching memories. In Nanoscience in Addition, Technology: A Collection of Reviews from Nature Journals; World Scientific: Singapore, 2010; pp. 158–165. [Google Scholar]
 Gale, E. TiO_{2}based memristors and ReRAM: Materials, mechanisms and models (a review). Semicond. Sci. Technol. 2014, 29, 104004. [Google Scholar] [CrossRef]
 LastrasMontaño, M.A.; Cheng, K.T. Resistive randomaccess memory based on ratioed memristors. Nat. Electron. 2018, 1, 466. [Google Scholar] [CrossRef]
 Abdalla, H.; Pickett, M.D. SPICE modeling of memristors. In Proceedings of the 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, 15–18 May 2011; pp. 1832–1835. [Google Scholar]
 Kvatinsky, S.; Friedman, E.G.; Kolodny, A.; Weiser, U.C. TEAM: Threshold adaptive memristor model. IEEE Trans. Circuits Syst. I Regul. Pap. 2013, 60, 211–221. [Google Scholar] [CrossRef]
 Volos, C.K.; Kyprianidis, I.M.; Stouboulos, I.N.; TleloCuautle, E.; Vaidyanathan, S. Memristor: A New Concept in Synchronization of Coupled Neuromorphic Circuits. J. Eng. Sci. Technol. Rev. 2014, 8, 157–173. [Google Scholar] [CrossRef]
 Wang, Z.; Joshi, S.; Savel’ev, S.E.; Jiang, H.; Midya, R.; Lin, P.; Hu, M.; Ge, N.; Strachan, J.P.; Li, Z.; et al. Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. Nat. Mater. 2017, 16, 101. [Google Scholar] [CrossRef] [PubMed]
 Xia, L.; Li, B.; Tang, T.; Gu, P.; Chen, P.; Yu, S.; Cao, Y.; Wang, Y.; Xie, Y.; Yang, H. MNSIM: Simulation Platform for MemristorBased Neuromorphic Computing System. IEEE Trans. Comput.Aided Des. Integr. Circuits Syst. 2018, 37, 1009–1022. [Google Scholar] [CrossRef]
 Pershin, Y.V.; Ventra, M.D. Experimental demonstration of associative memory with memristive neural networks. Neural Netw. 2010, 23, 881–886. [Google Scholar] [CrossRef]
 Kim, H.; Sah, M.P.; Yang, C.; Cho, S.; Chua, L.O. Memristor Emulator for Memristor Circuit Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 2012, 59, 2422–2431. [Google Scholar] [CrossRef]
 Ascoli, A.; Corinto, F.; Tetzlaff, R. A class of versatile circuits, made up of standard electrical components, are memristors. Int. J. Circuit Theory Appl. 2016, 44, 127–146. [Google Scholar] [CrossRef]
 Yesil, A. A new grounded memristor emulator based on MOSFETC. AEUInt. J. Electron. Commun. 2018, 91, 143–149. [Google Scholar] [CrossRef]
 Yu, D.S.; Sun, T.T.; Zheng, C.Y.; Iu, H.H.C.; Fernando, T. A Simpler Memristor Emulator Based on Varactor Diode. Chin. Phys. Lett. 2018, 35, 058401. [Google Scholar] [CrossRef]
 Olumodeji, O.A.; Gottardi, M. Arduinocontrolled HP memristor emulator for memristor circuit applications. Integration 2017, 58, 438–445. [Google Scholar] [CrossRef]
 Ermini, M.A.; Dhanasekar, J.; Sudha, V. Memristor emulator using MCP3208 and digital potentiometer. ICTACT J. Microelectron. 2018, 3. [Google Scholar] [CrossRef]
 SánchezLópez, C.; MendozaLopez, J.; CarrascoAguilar, M.; MuñizMontero, C. A floating analog memristor emulator circuit. IEEE Trans. Circuits Syst. II Express Br. 2014, 61, 309–313. [Google Scholar]
 Bi, G.q.; Poo, M.m. Synaptic Modifications in Cultured Hippocampal Neurons: Dependence on Spike Timing, Synaptic Strength, and Postsynaptic Cell Type. J. Neurosci. 1998, 18, 10464–10472. [Google Scholar] [CrossRef]
 Bi, G.q.; Poo, M.m. Synaptic Modification by Correlated Activity: Hebb’s Postulate Revisited. Annu. Rev. Neurosci. 2001, 24, 139–166. [Google Scholar] [CrossRef]
 Dan, Y.; Poo, M.M. Spike TimingDependent Plasticity of Neural Circuits. Neuron 2004, 44, 23–30. [Google Scholar] [CrossRef]
 Najem, J.S.; Taylor, G.J.; Weiss, R.J.; Hasan, M.S.; Rose, G.; Schuman, C.D.; Belianinov, A.; Collier, C.P.; Sarles, S.A. Memristive Ion ChannelDoped Biomembranes as Synaptic Mimics. ACS Nano 2018, 12, 4702–4711. [Google Scholar] [CrossRef]
 Hu, S.G.; Liu, Y.; Liu, Z.; Chen, T.P.; Yu, Q.; Deng, L.J.; Yin, Y.; Hosaka, S. Synaptic longterm potentiation realized in Pavlov’s dog model based on a NiOxbased memristor. J. Appl. Phys. 2014, 116, 214502. [Google Scholar] [CrossRef]
 Wang, L.; Li, H.; Duan, S.; Huang, T.; Wang, H. Pavlov associative memory in a memristive neural network and its circuit implementation. Neurocomputing 2016, 171, 23–29. [Google Scholar] [CrossRef]
 Tan, Z.H.; Yin, X.B.; Yang, R.; Mi, S.B.; Jia, C.L.; Guo, X. Pavlovian conditioning demonstrated with neuromorphic memristive devices. Sci. Rep. 2017, 7, 713. [Google Scholar] [CrossRef] [PubMed]
 Pavlov, P.I. Conditioned reflexes: An investigation of the physiological activity of the cerebral cortex. Ann. Neurosci. 2010, 17, 136. [Google Scholar] [CrossRef] [PubMed]
 Lorenzi, P.; Rao, R.; Irrera, F.; Suñé, J.; Miranda, E. A thorough investigation of the progressive reset dynamics in HfO2based resistive switching structures. Appl. Phys. Lett. 2015, 107, 113507. [Google Scholar] [CrossRef]
 Miranda, E.; Hudec, B.; Suñé, J.; Fröhlich, K. Model for the Current–Voltage Characteristic of Resistive Switches Based on Recursive Hysteretic Operators. IEEE Electron Device Lett. 2015, 36, 944–946. [Google Scholar] [CrossRef]
 Patterson, G.A.; Suñé, J.; Miranda, E. VoltageDriven Hysteresis Model for Resistive Switching: SPICE Modeling and Circuit Applications. IEEE Trans. Comput.Aided Des. Integr. Circuits Syst. 2017, 36, 2044–2051. [Google Scholar] [CrossRef]
 Cisternas Ferri, A.; Rapoport, A.; Fierens, P.I.; Patterson, G.A. Mimicking SpikeTimingDependent Plasticity with Emulated Memristors. In Proceedings of the 2019 Argentine Conference on Electronics (CAE), Mar del Plata, Argentina, 14–15 March 2019; pp. 58–64. [Google Scholar] [CrossRef]
 Patterson, G.A.; Suñé, J.; Miranda, E. SPICE simulation of memristive circuits based on memdiodes with sigmoidal threshold functions. Int. J. Circuit Theory Appl. 2018, 46, 39–49. [Google Scholar] [CrossRef]
 Miranda, E. Compact Model for the Major and Minor Hysteretic I–V Loops in Nonlinear Memristive Devices. IEEE Trans. Nanotechnol. 2015, 14, 787–789. [Google Scholar] [CrossRef]
 Patterson, G.A.; RodriguezFernandez, A.; Suñé, J.; Miranda, E.; Cagli, C.; Perniola, L. SPICE simulation of 1T1R structures based on a logistic hysteresis operator. In Proceedings of the 2017 Spanish Conference on Electron Devices (CDE), Barcelona, Spain, 8–10 Feburary 2017; pp. 1–4. [Google Scholar] [CrossRef]
 Pershin, Y.V.; La Fontaine, S.; Di Ventra, M. Memristive model of amoeba learning. Phys. Rev. E 2009, 80, 021926. [Google Scholar] [CrossRef]
 Pershin, Y.V.; Di Ventra, M. Memcomputing: A computing paradigm to store and process information on the same physical platform. In Proceedings of the 2014 International Workshop on Computational Electronics (IWCE), Paris, France, 3–6 June 2014; pp. 1–2. [Google Scholar] [CrossRef]
 Pershin, Y.V.; Castelano, L.K.; Hartmann, F.; LopezRichard, V.; Di Ventra, M. A Memristive Pascaline. IEEE Trans. Circuits Syst. II Express Br. 2016, 63, 558–562. [Google Scholar] [CrossRef]
 Jeong, D.S.; Kim, K.M.; Kim, S.; Choi, B.J.; Hwang, C.S. Memristors for EnergyEfficient New Computing Paradigms. Adv. Electron. Mater. 2016, 2, 1600090. [Google Scholar] [CrossRef]
 Schuman, C.D.; Potok, T.E.; Patton, R.M.; Birdwell, J.D.; Dean, M.E.; Rose, G.S.; Plank, J.S. A Survey of Neuromorphic Computing and Neural Networks in Hardware. arXiv 2017, arXiv:1705.06963. [Google Scholar]
 Hebb, D.O. The Organization of Behavior: A Neuropsychological Theory; John Wiley & Sons Inc.: New York, NY, USA, 1949. [Google Scholar]
 Kulkarni, M.S.; Teuscher, C. Memristorbased reservoir computing. In Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Amsterdam, The Netherlands, 4–6 July 2012; pp. 226–232. [Google Scholar] [CrossRef]
 Ziegler, M.; Soni, R.; Patelczyk, T.; Ignatov, M.; Bartsch, T.; Meuffels, P.; Kohlstedt, H. An Electronic Version of Pavlov’s Dog. Adv. Funct. Mater. 2012, 22, 2744–2749. [Google Scholar] [CrossRef]
 RodriguezFernandez, A.; Cagli, C.; Perniola, L.; Suñé, J.; Miranda, E. Effect of the voltage ramp rate on the set and reset voltages of ReRAM devices. Microelectron. Eng. 2017, 178, 61–65. [Google Scholar] [CrossRef]
 Jo, S.H.; Kim, K.H.; Lu, W. Programmable Resistance Switching in Nanoscale TwoTerminal Devices. Nano Lett. 2009, 9, 496–500. [Google Scholar] [CrossRef] [PubMed]
 Gaba, S.; Sheridan, P.; Zhou, J.; Choi, S.; Lu, W. Stochastic memristive devices for computing and neuromorphic applications. Nanoscale 2013, 5, 5872–5878. [Google Scholar] [CrossRef] [PubMed]
 Yu, S.; Wu, Y.; Wong, H.S.P. Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory. Appl. Phys. Lett. 2011, 98, 103514. [Google Scholar] [CrossRef]
 Cao, M.G.; Chen, Y.S.; Sun, J.R.; Shang, D.S.; Liu, L.F.; Kang, J.F.; Shen, B.G. Nonlinear dependence of set time on pulse voltage caused by thermal accelerated breakdown in the Ti/HfO2/Pt resistive switching devices. Appl. Phys. Lett. 2012, 101, 203502. [Google Scholar] [CrossRef]
 Strachan, J.P.; Torrezan, A.C.; Miao, F.; Pickett, M.D.; Yang, J.J.; Yi, W.; MedeirosRibeiro, G.; Williams, R.S. State Dynamics and Modeling of Tantalum Oxide Memristors. IEEE Trans. Electron Devices 2013, 60, 2194–2202. [Google Scholar] [CrossRef]
 Atmel. SMART ARMBased MCU SAM3X/SAM3A Series; Atmel: San Jose, CA, USA, 2015. [Google Scholar]
 Renesas. X9C102, X9C103, X9C104, X9C503. Digitally Controlled Potentiometer (XDCP); Renesas: Tokyo, Japan, 2009. [Google Scholar]
 Fager, T. Arduino Library for Managing Digital Potentiometers X9Cxxx. Available online: https://sites.google.com/site/tfagerscode/home/digipotx9cxxx (accessed on 30 May 2019).
Figure 1.
Threshold distributions ${f}^{\pm}$ are bellshaped. The number of active channels $\lambda $ is a function of the applied potential v and evolves within the region delimited by ${\mathsf{\Gamma}}^{+}$ and ${\mathsf{\Gamma}}^{}$.
Figure 2.
Schematic of the proposed emulator. An analogtodigital converter (ADC) in the microcontroller measures the voltage on the digital potentiometer. The differential equations describing the memristor behavior are numerically integrated based on those measurements; then, the potentiometer resistance is changed accordingly. Signal conditioning is required to adapt the voltage to the microcontroller ADC input range.
Figure 3.
Block diagram of the system used to mimic Pavlovian learning [43].
Figure 4.
Emulator results: (a) experimental setup. The circuit under test is driven by an arbitrary waveform generator (AWG). Current through the memristor is measured as a voltage drop on an inseries resistor ${R}_{s}=1\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$. (b) circuit current vs. memristor voltage: simulation (solid line) and measured emulator (points) results. The AWG provides a variable frequency sinusoidal signal with amplitude $A=2.5\phantom{\rule{4pt}{0ex}}\mathrm{V}$. The switching thresholds move towards higher voltage values when the input frequency increases. Parameters were set to ${\alpha}_{\pm}=15\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\delta}_{\pm}=0.2\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${R}_{\mathrm{on}}=35\phantom{\rule{4pt}{0ex}}\mathsf{\Omega}$, ${R}_{\mathrm{off}}=9.5\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${v}_{0}=0.3\phantom{\rule{4pt}{0ex}}\mathrm{V}$, and ${\tau}_{0}=0.01$ s.
Figure 5.
Driving signal ${v}_{g}$ and current i flowing through the emulator. Two $50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$wide and $1.5\phantom{\rule{4pt}{0ex}}\mathrm{V}$high stimulus pulses and two $25\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$wide and $200\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{V}$high measurement pulses comprise each period. In this example, $\Delta t=25\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$ and the pre and postynaptic stimuli overlap for $25\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$. Parameters: ${\alpha}_{\pm}=30\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\delta}_{\pm}=0.75\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${R}_{\mathrm{on}}=1\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${R}_{\mathrm{off}}=5\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${v}_{0}=0.2\phantom{\rule{4pt}{0ex}}\mathrm{V}$, and ${\tau}_{0}=10$ s.
Figure 6.
Circuit current vs. memristor voltage: measured emulator results. The AWG provides a 1 $\mathrm{Hz}$ sinusoidal signal with amplitude $A=1.5\phantom{\rule{0.166667em}{0ex}}\mathrm{V}$. Parameters were set to ${\alpha}_{\pm}=30\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\delta}_{\pm}=0.75\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${R}_{\mathrm{on}}=1\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${R}_{\mathrm{off}}=5\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, and ${v}_{0}=0.2\phantom{\rule{4pt}{0ex}}\mathrm{V}$. The device’s response time was varied: ${\tau}_{0}=5,\phantom{\rule{0.166667em}{0ex}}10,\phantom{\rule{0.166667em}{0ex}}20$ s (red, blue, and green lines, respectively). Extreme memristance values depend on the value ${\tau}_{0}$.
Figure 7.
Behavior of the resistance. Initial conditions are indicated by the upside (=${R}_{\mathrm{off}}$) and downside (=${R}_{\mathrm{on}}$) triangles. Red and blue colors stand for $\Delta t=5\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$ and $\Delta t=50\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{s}$, respectively. All experimental parameters were as in Figure 5 except that ${\tau}_{0}=5$ s.
Figure 8.
Influence of $\Delta t$ on the emulator resistance for ${\tau}_{0}=5$ (blue), 10 (red) and $20\phantom{\rule{4pt}{0ex}}\mathrm{s}$ (green). The initial setting was $5\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$ and the remaining experimental parameters were as in Figure 5.
Figure 9.
Percentage of change of the resistance vs. $\Delta t$ for characteristics times ${\tau}_{0}=5$ (blue), 10 (red), and $20\phantom{\rule{4pt}{0ex}}\mathrm{s}$ (green). The larger the ${\tau}_{0}$, the weaker the learning rule.
Figure 10.
Pavlovian conditioning. When present, stimuli ${V}_{f}$ (food) and ${V}_{b}$ (bell) are represented 1 Vhigh square waves with a 20 Hz frequency and 30% duty cycle. Parameters of the memristor model: ${v}_{0}=0.2\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${\alpha}_{+}=10\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\alpha}_{}=5\phantom{\rule{4pt}{0ex}}{\mathrm{V}}^{1}$, ${\delta}_{+}=0.7\phantom{\rule{4pt}{0ex}}\mathrm{V}$, ${\delta}_{}=0.6\phantom{\rule{4pt}{0ex}}\mathrm{V}$.
Figure 11.
Memory persistence in Pavlovian conditioning. Results correspond to 10 experiments in the same conditions as in Figure 10. As the characteristic response time of the memristor, ${\tau}_{0}$, increases, it takes longer to produce a strong association between the conditioned stimulus (bell) and the conditioned response (salivation).
Figure 12.
A typical example of the experiments to quantify memory persistence. After both stimuli are interrupted, only the conditioned stimulus (bell’s sound) is reenabled. In this case, there are five blank spaces (nostimuli lapse) and the memory persistence is measured as 14. Model parameters are as in Figure 10, except for ${\tau}_{0}=20\phantom{\rule{4.pt}{0ex}}\mathrm{s}$.
Figure 13.
Memory persistence in Pavlovian conditioning. Results correspond to five experiments in the same conditions as in Figure 12.
Figure 14.
Circuit schematic of the system used to mimic Pavlovian learning. Only the output of the input neurons is represented: ${V}_{f}$ is the response of neuron 1 to the unconditioned stimulus (i.e., food) and ${V}_{b}$ is the response of neuron 2 to the conditioned stimulus (i.e., bell’s sound)—cf. Figure 3. Resistance values: $R=3.3\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$, ${R}_{\mathrm{syn}}=220\phantom{\rule{4pt}{0ex}}\mathsf{\Omega}$, ${R}_{s}=2.2\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$ and ${R}_{c}=2\phantom{\rule{4pt}{0ex}}\mathrm{k}\mathsf{\Omega}$. Constant voltages: ${V}_{\mathrm{forget}}=600\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{V}$, ${V}_{\mathrm{ref}}=232\phantom{\rule{4pt}{0ex}}\mathrm{m}\mathrm{V}$.
© 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).