The Generalization of Bidirectional Dual Active Bridge DC/DC Converter Modulation Schemes: State-of-the-Art Analysis under Triple Phase Shift Control

Abstract

The main objective of this paper is to provide a thorough analysis of currently used modulation control schemes for single-phase bidirectional dual active bridge DC/DC converters. In this article, it will be shown that single phase shift, extended phase shift and dual phase shift modulation schemes are special cases of the triple phase shift (TPS) modulation scheme. The article aims to highlight six TPS switching modes and their complements with operational constraints. Unlike previous studies that regarded TPS as a complex scheme, this paper simplifies the analysis of each mode and aims to standardize the understanding of TPS modulation for dual active bridge (DAB) converters. Power equations, range of power transferred and zero-voltage switching (ZVS) are derived for all the modes under TPS without assuming fundamental component analysis. Additionally, a generic optimization algorithm is developed to show the advantages of TPS modulation, and thus, the analysis in this paper offers a valuable insight for single-phase DAB converter designers in identifying a wide range of optimization algorithms to achieve higher efficiency under TPS modulation. This analysis contributes to the advancement of bidirectional DAB converter technology and facilitates its application in various power electronic systems.

1. Introduction

In modern power electronics circuits and systems, conversion from one level of DC voltage to another has become a norm as different circuits utilizing different voltage ratings are incorporated within the same system. DC/DC converters are the equivalent to AC transformers with a continuously variable turn ratio, a key component in various power electronic systems. Isolated bidirectional dual active bridge DC/DC converters (DAB), shown in Figure 1a, were first proposed in [1], and have recently received substantial interest due to its reduced passive components (only a single-series inductor) count, galvanic isolation, extended region of soft switching, high power density, fast power reversal, possibility of high stepping ratio of conversion, buck/boost operation, simple control methods and its integral fault isolation capability without a need for a very fast controller to limit the fault current or the blocking of the IGBT switches during the fault duration [2,3,4].

Applications of DAB converters have received significant interest in the research community and in industry. The use of DAB in 1 Mega-watt (MW) renewable offshore wind energy application has been investigated in [5], where the converter was configured to operate in buck mode using 12 kV input and 1.2 kV output voltages. Investigation of DAB converters for electric/hybrid vehicles has been carried out by [6,7,8,9,10]. In [6], the feasibility of air-cooled 7.5 KW Gallium nitride (GaN)-based DAB converters was designed and implemented for automotive battery charging. The authors exploited 650 V GaN technology and the planar-based transformer operating at 200 kHz switching frequency. Even though, space optimization was not performed, the prototype achieved an efficiency of 98% for the voltage range of 400–500 V. Similarly, in [10], a wide output voltage range of 200–1000 V DAB converter for electric vehicle (EV) charging stations was proposed. In systems, such as uninterruptable power supplies (UPS), energy storage and transfer, a bidirectional DAB converter has been shown to be promising candidate [11]. In [12], DAB converter analysis for all electric aircraft has been performed using ultracapacitors as energy storage elements. The use of DAB design for a minimum weight for airborne wind turbine systems using state-of-the-art power-switching device silicon carbide (SiC), was analyzed in [13]. The application of DAB in medium voltage (MVDC) distribution and HVDC network is presented in [14].

Single-phase isolated bidirectional dual active bridge DC/DC converters (DAB) of Figure 1a above, are composed of two active converter bridges, two DC link filter capacitors, a series inductor (L_ext) and a coupling transformer. Converter bridges A and B, consist of four power electronics switches, S₁–S₄ and Q₁–Q₄ with integrated antiparallel diodes. The AC equivalent circuit of the DAB converter is illustrated in Figure 1b. When considering the converter from the perspective of the transformer’s primary side, and while ignoring the influence of the transformer’s magnetizing inductance, the transformer’s leakage inductance is combined with L_tot with a turns ratio of n:1. The magnitude of the external phase shift between switches S₁ and Q₁ of Figure 1a regulates the power flow between the two converter H-bridges while flow direction of the power is achieved by changing its polarity.

The primary emphasis of recent research on dual active bridge (DAB) converters has been on enhancing efficiency through the development of modulation control strategies [9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26], close loop control [27,28,29,30,31], converter circuit topology [26,27] and use of low loss switching devices [32,33]. The modulation control scheme for DAB converters has emerged as a significant research area, with a focus on optimizing existing modulation methods. Several proposed modulation techniques have been explored in the literature that primarily target overall efficiency maximization. This includes conventional/single phase shift (CPS/SPS) modulation [1], dual phase shift (DPS) modulation [15,20,21,22,23], extended phase shift (EPS) modulation [24,25], triple phase shift (TPS) modulation [34], pulse width modulation (PWM) [21] and variations of these direct phase shift schemes to achieve a better dynamic response and eliminate the DC current in AC links [35,36].

The uniqueness of this manuscript is that it shows that CPS, EPS and DPS DAB modulation control schemes are all special cases of TPS modulation [1,15,20,21,22,23,24,25]. Therefore, the study combines all known phase shift modulation schemes of DAB into TPS, instead of presenting each modulation scheme separately and differentiating TPS from CPS, EPS and DPS modulation control. The paper extends the work presented originally by author 1 in [34] by performing detailed mathematical analysis of DAB converters under TPS by identifying all the possible modes of operation under the TPS scheme for both power flow directions. It focuses on simplifying the analysis of each mode, contrary to [35], which reported TPS to be a complex scheme and with an objective to focus on standardizing all the phase shift modulation schemes for DAB DC/DC converters. An analytical assessment of each mode is performed to investigate each mode’s active power and inductor currents, the RMS current of the AC link, the RMS voltage of the AC link, the reactive power, the power range operation of the mode, and the ZVS switching possibility and reactive power. In addition, a generic optimization algorithm is developed to show the key advantages of TPS. The authors expect the detailed analysis of DAB converters performed in this manuscript to facilitate DAB DC/DC converter designers in identifying a wide range of optimization algorithms to achieve higher efficiency under TPS schemes.

This article consists of four sections. The first section introduces CPS, EPS and DPS modulation schemes. The second section, a qualitative discussion and performance analysis of every conceivable TPS operational mode, is presented. Graphical representations of voltage and current waveforms for each mode are provided, along with a derivation of key performance metrics, including peak/RMS current flow, active power, reactive power, and ZVS boundary. The derivation process begins by establishing mode constraints/boundaries, which are determined by analyzing the AC voltage waveform patterns for each mode. Next, the DAB inductor current waveform is derived, and the instantaneous currents for each subperiod are determined using the DAB converter equivalent circuit. From this, parameters such as average power and reactive power are calculated for each operating mode. A generic per-unit TPS algorithm is used as an example to highlight the advantages of the TPS modulation scheme that is discussed in Section 3. In order to confirm the accuracy of the proposed TPS algorithm, a 100 kW 1 kV/4 kV DAB model that is an integral part of a high-power multimodule DAB converter is simulated using Matlab/Simulink, and a downscaled experimental prototype is built to validate the algorithm in Section 5.

2. Basic Operating Principle of DAB Using Conventional Phase Shift, Dual Phase and Extended Phase Shift Control

When the CPS control is used, the switches that are cross-connected (S₁ and S₄, Q₁ and Q₄) in Figure 1a are switched simultaneously, resulting in converter waveforms shown in Figure 2a at the two transformer terminals by assuming V_DC1 ≥ nV_DC2 (similar analysis results for V_DC1 ≤ nV_DC2). V_DC1 and V_DC2 are DC link voltages; v_L is the voltage across the inductor; i_L is the inductor current; v_ac1 and nv_ac2 (referred to primary) are transformer terminal voltages; T_s is the period (T_h = ½T_s); and D is the external phase shift (0 ≤ D ≤ 1). The amount of power transferred, as well as the direction, is regulated by controlling the phase shift (D) between v_ac1 and v_ac2.

From the voltages and current waveforms of Figure 2a, the expression for the current for the first half-cycle by assuming t₀ = 0, t₁ = DT_h and t₂ = T_h is given by:

$$\begin{array}{l}{i}_L(t_o)=-\left[\frac{V_{DC1}-n{V}_{DC2}+2n{V}_{DC2}D}{4f_s{L}_{tot}}\right]\\ i_L(t_1)=\left[\frac{2V_{DC1}D-V_{DC1}+n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_2)=\left[\frac{V_{DC1}-n{V}_{DC2}+2n{V}_{DC2}D}{4f_s{L}_{tot}}\right]\end{array}$$

(1)

where f_s is the switching frequency and the total inductance is given by L_tot.

Therefore, the equation for the output power under CPS control can be written as:

$$\begin{gathered} \begin{array}{ll}{P}_{cps}& =\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac1}{i}_L(t)}\hspace{0.33em}dt\hspace{0.33em}\\ & =\frac{1}{T_h}\left[\begin{array}{l}{\displaystyle \underset{t_0}{\overset{t_1}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}+n{V}_{DC2}}{L_{tot}}t+i_L(t_0)\hspace{0.33em}dt\right]\right)\right\}}+{\displaystyle \underset{t_1}{\overset{t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1)\hspace{0.33em}\right)\right\}}\\ \hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\end{array}\right]dt\end{array} \\ {P}_{cps}=\frac{n{V}_{DC1}{V}_{DC2}D\left[1-D\right]}{2f_s{L}_{tot}} \end{gathered}$$

(2)

The implementation of the CPS control algorithm is straightforward, as it requires just one variable: the phase shift angle, to manage power flow. The active power output characteristic is illustrated in Figure 3a for positive power flow. As can be observed, the maximum power can be obtained when D = 0.5 and power is zero for D = 0. However, CPS control is an active power-centered algorithm, where applications involving large voltage conversion ratios results in increased current stress, loss of soft switching and high circulating reactive power at the AC link [15].

EPS and DPS control were introduced to overcome some of the limitations of CPS modulation. The aim of these switching patterns is to extend the soft-switching region and minimize/exclude the reactive power circulating within the converter bridges, thereby improving the overall efficiency of the converter. With EPS, D₁, which is an additional inner phase shift between the legs of H-bridge one, is introduced; while in H-bridge two, the switches connected in cross-configuration are toggled simultaneously. This leads to a quasi-square AC output waveform when employing an inner shift D₁ for the first bridge, and a complete AC square waveform, as illustrated in Figure 2b, for the second H-bridge. The parameter D₁ is utilized to extend the ZVS and diminish reactive power. The phase shift D₂ represents the outer phase shift angle responsible for regulating both the magnitude and direction of power flow, and corresponds to the parameter “D” in the CPS scheme.

$$\begin{array}{l}{i}_L(t_o)=\left[\frac{-V_{DC1}{D}_1-2n{V}_{DC2}{D}_2+n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_1)=\left[\frac{2V_{DC1}{D}_2-V_{DC1}{D}_1+n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_2)=\left[\frac{V_{DC1}{D}_1+2V_{DC2}{D}_2-2V_{DC2}{D}_1+n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_3)=\left[\frac{V_{DC1}{D}_1+2V_{DC2}{D}_2-n{V}_{DC2}}{4f_s{L}_{tot}}\right]\end{array}$$

(3)

Thus, average power when EPS modulation is used can be obtained as

$$\begin{gathered} \begin{array}{ll}{P}_{EPS}& =\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac1}{i}_L(t)}\hspace{0.33em}dt\hspace{0.33em}\\ & =\frac{1}{T_h}\left[\begin{array}{l}{\displaystyle \underset{t_0}{\overset{t_1}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}+n{V}_{DC2}}{L_{tot}}t+i_L(t_0)\hspace{0.33em}dt\right]\right)\right\}}+{\displaystyle \underset{t_1}{\overset{t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1)\hspace{0.33em}\right)\right\}}\\ {\displaystyle \underset{t_3}{\overset{t_4}{\int }}\left\{v_{ac1}(t)\times \left(\frac{n{V}_{DC2}}{L_{tot}}t+i_L(t_2)\hspace{0.33em}\right)\right\}}\end{array}\right]dt\end{array} \\ {P}_{EPS}=\frac{n{V}_{DC1}{V}_{DC2}}{4f_s{L}_{tot}}\left[2D_1{D}_{{}_2}-2D_{{}_2}{}^2-D_1{}^2+D_1\right] \end{gathered}$$

(4)

From (4), the additional modulation parameter D₂ improves the regulation flexibility of the converter, as the power diagram of Figure 3b shows. Similar to the CPS control, the maximum power is obtained when the values of D₁ = 1 and D₂ = 0.5. This shows that only under CPS is maximum output power attainable. For other loading scenarios, different combinations of control variables D₁ and D₂ may result in the same power output. In EPS, the operation of the two H-bridges is required to be swapped when the voltage conversion ratio and power direction are altered in order to operate the converter at minimal circulating power [24]. This complicates the operation of the converter further as the power flow direction has to be sensed continually, thus introducing additional overhead for the controller.

DPS control aims to address some of these limitations by not restricting one of the AC link voltages to a full square wave operation, but rather, zero states are introduced for both H-bridges, unlike EPS control, in addition to enhancing the regulation flexibility further. This is accomplished by an additional inner phase shift between both the converter switch pairs S₁–S₃ and Q₁–Q₃ (leg 1 and leg 2 of bridge A and legs 1 and 2 of bridge B). Figure 2c,d illustrate the resulting waveforms under DPS control. Phase shift D₁ is the inner phase shift for both H-bridges and D₂ is the external phase shift (D₂ = D in CPS control). The resulting waveforms when DPS control is applied can be divided into two operating conditions, which are:

$$\begin{array}{l}0\le D_2\le D_1\le 1\\ 0\le D_1\le D_2\le 1\end{array}$$

(5)

When

$$0\le D_2\le D_1\le 1$$

the current expression of each segment for the first half-cycle is derived by assuming t₀ = 0, t₀ = 0, t₁ = D₂T_h, t₂ = D₁T_h and t₃ = T_h:

$$\begin{array}{c}{i}_L(t_o)=\left[\frac{-V_{DC1}{D}_1-2n{V}_{DC2}{D}_2-n{V}_{DC2}{D}_1+2n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_1)=\left[\frac{V_{DC1}{D}_1+2V_{DC1}{D}_2-2V_{DC1}+n{V}_{DC2}{D}_1}{4f_s{L}_{tot}}\right]\\ i_L(t_2)=\left[\frac{2V_{DC1}{D}_2-V_{DC1}{D}_1+n{V}_{DC2}{D}_1}{4f_s{L}_{tot}}\right]\\ i_L(t_3)=\left[\frac{V_{DC1}{D}_1+2V_{DC1}{D}_2-n{V}_{DC2}{D}_1}{4f_s{L}_{tot}}\right]\\ i_L(t_4)=\left[\frac{V_{DC1}{D}_1+2n{V}_{DC2}{D}_2+n{V}_{DC2}{D}_1-2n{V}_{DC2}}{4f_s{L}_{tot}}\right]\end{array}$$

(6)

From (6), the ideal power transferred by the converter is given for this condition as

$$\begin{array}{l}{P}_{DPS1}=\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac1}{i}_L(t)}\hspace{0.33em}dt\hspace{0.33em}\\ =\frac{1}{T_h}\left[{\displaystyle \underset{t_0}{\overset{t_1}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_0)\hspace{0.33em}dt\right]\right)\right\}}+{\displaystyle \underset{t_1}{\overset{t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1)\hspace{0.33em}\right)\right\}}\right]dt\end{array}$$

(7)

$$P_{DPS1}=\frac{n{V}_{DC1}{V}_{DC2}}{4f_s{L}_{tot}}\left[-2D_{{}_2}{}^2+2D_2-D_1{}^2+2D_1-1\right]$$

(8)

A similar analysis can also be performed for the second operating condition in (5), by assuming t₁ = (D₂ + D₁ − 1)T_h, t₂ = D₁T_h, t₃ = D₂T_h and t₄ = T_h. Therefore, the current expression of each segment for the first half-cycle is:

$$\begin{array}{l}{i}_L(t_o)=\left[\frac{-V_{DC1}{D}_1-2n{V}_{DC2}{D}_2-n{V}_{DC2}{D}_1+2n{V}_{DC2}}{4f_s{L}_{tot}}\right]\\ i_L(t_1)=\left[\frac{V_{DC1}{D}_1+2V_{DC1}{D}_2-2V_{DC1}+n{V}_{DC2}{D}_1}{4f_s{L}_{tot}}\right]\\ i_L(t_2)=\left[\frac{V_{DC1}{D}_1+n{V}_{DC2}{D}_1}{4f_s{L}_{tot}}\right]\\ i_L(t_3)=i_L(t_2)\\ i_L(t_4)=\left[\frac{V_{DC1}{D}_1+n{V}_{DC2}{D}_1+2n{V}_{DC2}{D}_2-2n{V}_{DC2}}{4f_s{L}_{tot}}\right]\end{array}$$

(9)

The ideal power for this condition is also computed as:

$$\begin{array}{l}{P}_{DPS2}=\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac1}{i}_L(t)}\hspace{0.33em}dt\hspace{0.33em}\\ =\frac{1}{T_h}\left[{\displaystyle \underset{t_0}{\overset{t_1}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}+n{V}_{DC2}}{L_{tot}}t+i_L(t_0)\hspace{0.33em}dt\right]\right)\right\}}+{\displaystyle \underset{t_1}{\overset{t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}}{L_{tot}}t+i_L(t_1)\hspace{0.33em}\right)\right\}}\right]dt\end{array}$$

(10)

$$P_{DPS2}=\frac{n{V}_{DC1}{V}_{DC2}}{4f_s{L}_{tot}}\left[-D_{{}_2}{}^2+2D_2-2D_1{D}_2+D_1-1\right]$$

(11)

The power output for different combinations of D₁ and D₂ is illustrated by Figure 3c. As shown in the figure, similar to EPS control, maximum power output can be achieved for values of D₁ = 1 and D₂ = D = 0.5, while for partial power operation, the same output power results for different combinations of D₁ and D₂.

The triple phase shift control/modulation scheme (TPS) is an extension of the dual phase shift control (DPS), where a time delay is introduced in the gate signals of cross-connected switch pairs of each H-bridge of the DAB converter. Compared to DPS, the inner phase shift might be unequal in both bridges. TPS was partially studied in [21,22,23,24] to enhance the converter’s performance by extending the soft-switching range, improving regulation flexibility and increasing overall DAB DC-DC converter efficiency. The authors of [22] investigated the converter’s stability using TPS control, but without emphasizing the important issue of efficiency improvement. Only four TPS modes were characterized to extend the zero-voltage switching (ZVS) operating range and increase the converter efficiency [23]. The authors of [21,23] identified twelve different switching modes, but only a subset of these modes was partially approximated using a fundamental component analysis. A more comprehensive study in [24] investigated a multiphase shift scheme with both DPS and TPS modes to determine the optimal submodes by examining the waveform characteristics.

3. Basic Operating Principle of DAB Using TPS Control

By utilizing the TPS modulation scheme to control the DAB converter, three control parameters, symbolized as, D₁, D₂ and D₃, serve as modulation parameters for the converter. Specifically, D₁ represents the inner phase shift between switches S₁ and S₄; D₂ signifies the inner phase shift between switches Q₁ and Q₄; while D₃ denotes the outer or external phase shift between switches S₁ and Q₁, as depicted in Figure 4a. By adjusting D₃ between the two H-bridges, both the magnitude and direction of power flow can be controlled. The magnitude and direction of power flow are controlled by adjusting D₃ between the two H-bridges. Figure 4b depicts example waveforms showing switching waveforms for TPS modulation scheme, the resulting AC voltages at transformer terminals AB and CD (i.e., the primary side) and current i_L.

TPS Modes of Operation

Considering all potential combinations of phase shifts D₁, D₂ and D₃, full, partial and no overlaps of transformer terminal voltage waveforms give rise to six different switching modes for forward power flow, and their complements for reverse power flow. Importantly, it is the modes’ boundaries that set the number of TPS modes. In this section, a comprehensive analysis of the converter performance indices will be performed for each mode. TPS control involves different operating modes, in addition to loading condition (whether the converter is lightly or heavily loaded).

In the analysis, the following assumptions are made:

-

Lossless DAB converter.

-

Fixed V_DC1 and V_DC2 DC link voltages.

-

Buck mode operation (V_DC1 > nV_DC2); boost mode operation (V_DC1 < nV_DC2) is similar to buck mode and will be omitted in this section.

-

The turn’s ratio of the transformer is n and f_s is the switching frequency.

-

The transformer magnetizing inductance is neglected.

-

H-bridge B is referenced to the primary side, with the transformer’s leakage inductance incorporated with the external inductor to give a total combined inductance of L_tot.

-

The analysis does not account for short-timescale effects like switching dynamics and the effect of dead bands.

(a) 

Modes 1 and 1′

The ideal operating waveforms of the modes are shown in Figure 5. Mode 1, shown in Figure 5a, is characterized by a full positive-half-cycle overlap of both bridges’ terminal voltages with D₁ ≥ D₂, while complimentary mode 1′ waveforms, in Figure 5b, are graphically described by the full overlap of positive and negative half-cycles of AC link voltages, with the bridge B waveform being shifted by 180° to reverse the converter operation, resulting in equal but negative power. The remaining part of this section performs the derivation of several key performance indicators for each of the following operating modes.

i. 

Mode 1

The mode boundary conditions must ensure complete overlap is maintained for the AC voltages of both bridges. Thus, by observing Figure 5a, the following two constraints are defined:

$$\begin{array}{l}{D}_1\ge D_2\\ 0\le D_3\le D_1-D_2\end{array}$$

(12)

Inductor current is crucial for active and reactive power calculations. Thus, applying the Kirchhoff voltage law (KVL) in the equivalent circuit diagram of Figure 1b, the analytical expression for the current can be written as

$$i_L(t)=\frac{1}{L_{tot}}{\displaystyle \underset{t_n}{\overset{t}{\int }}\left(v_{ac1}(t)-v_{ac2}^{\prime }(t)\right)}\hspace{0.33em}dt\hspace{0.33em}+\hspace{0.33em}{i}_L(t_n)\hspace{0.33em}\hspace{0.33em}\hspace{0.17em}\hspace{0.33em}\hspace{0.33em}{t}_n\le t\le t_n{}_{+1}$$

(13)

where t_n represents nth switching instant; $v_{ac1}(t)$ is the coupling transformer primary voltage; and $v_{ac2}^{\prime }(t)$ is the secondary transformer voltage referred to the primary side. According to Figure 5a, nine different switching segments emerge that will completely be analyzed for this mode.

Interval t₀–t₁: Figure 6a shows the equivalent circuit during this switching instant. Since the current is negative, i_L, flows through freewheeling diodes D_S1 and D_S4 in bridge A due to the positive bridge A output voltage. For bridge B, diode D_Q1 and switch Q₃ conduct the current. The inductor voltage is clamped at V_DC1. Therefore, the inductor current is expressed by

$$i_L(t)=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t-t_0\right)+i_L(t_0)$$

(14)

Interval t₁–t_1′: The direction of inductor current has changed from negative to positive at t_1’. In bridge A, the current flows through switches S₁ and S₄, while for bridge B, the current flows through D_Q1 and Q₃. The current remains the same as in previous switching instants while continuing to increment. The voltage across the coupling inductor is V_DC1. This is depicted in Figure 6b.

Interval t_1′–t₂: The equivalent circuit for this segment is shown in Figure 6c. Since it is assumed that the converter works in buck mode where V_DC1 > nV_DC2, the current slope is increasing. With both bridges’ output voltage being positive and a positive inductor current polarity, switches S₁ and S₂ of bridge A remain on. In bridge B, i_L, flows through the reverse recovery diodes, D_Q1 and D_Q4. The voltage across the inductor is V_DC1–nV_DC2; therefore, the inductor current i_L(t) is determined by

$$i_L(t)=\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}(t-t_1)+i_L(t_1)$$

(15)

Interval t₂–t₃: S₁ and S₂ of bridge A are still conducting. In secondary bridge B, current flows through Q₂ and D_Q4 as illustrated in Figure 6d. The voltage applied across the inductor is V_DC1, so the current through L_tot can be written as

$$i_L(t)=\frac{V_{DC1}}{L_{tot}}(t-t_2)+i_L(t_2)$$

(16)

Interval t₃–t₄: Both bridge A and bridge B voltages are zero, and Figure 6e depicts the equivalent circuit. The inductor current remains unchanged and circulates in D_S2, S₄, Q₂ and D_Q4 of both bridges. The voltage across the inductor is zero, and thus, the inductor current is

$$i_L(t)=i_L(t_3)$$

(17)

Interval t₄–t_4′: Figure 6f shows the equivalent circuit for this duration. Switch S₄ of bridge A is turned off and the current flows through the diagonal antiparallel diodes D_S2 and D_S3 since bridge A’s voltage is negative. The status of bridge B remains unchanged, where i_L decreases linearly and is carried by Q₂ and D_Q4. Voltage across the inductor is −V_DC1. Thus,

$$i_L(t)=\frac{-V_{DC1}}{L_{{}_{tot}}}\left(t-t_4\right)+i_L(t_4)$$

(18)

Interval t_4′–t₅: The inductor current polarity changes S₂ and S₃ of the bridge A freewheel. In bridge B i_L, flows through D_Q2 and Q₄. The equivalent circuit structure is shown in Figure 6g. The inductor voltage remains at −V_DC1 and the value of the inductor current is given by expression (18).

Interval t₅–t₆: During this subperiod, S₂ and S₃ of bridge A are still on, while D_Q2 and D_Q3 conduct for bridge B as Figure 6h demonstrates. The voltage across the inductor is V_DC1 + nV_DC2. As a result, the inductor current is

$$i_L(t)=\frac{-V_{DC1}+n{V}_{DC2}}{L_{tot}}(t-t_5)+i_L(t_5)$$

(19)

Interval t₆–t₇: The switching pattern for this subperiod is similar to the previous segment t₅–t₆ and the equivalent circuit diagram showing the current path is displayed in Figure 6i. S₂ and S₃ of bridge A continue to conduct. For bridge B, switch Q₁ and D_Q3 conduct. The voltage across the inductor is −V_DC1. Therefore, the inductor current is

$$i_L(t)=\frac{-V_{DC1}}{L_{{}_{tot}}}\left(t-t_5\right)+i_L(t_6)$$

(20)

Interval t₇–t₈: Bridge A and bridge B voltages are both zero, and thus the voltage across the inductor is likewise zero, as demonstrated by Figure 6j. For both H-bridges, S₂, D_S4, D_Q2 and Q₄ conduct, respectively. The inductor current during this subperiod is

$$i_L(t)=i_L(t_7)$$

(21)

Since the inductor current i_L(t)’s average value of the for one complete cycle (T_s) has to be zero, it is therefore only necessary to compute the current for the first half-cycle. Moreover, due to the half-wave symmetry of the inductor current waveform, it can be shown that

$$\begin{array}{l}{i}_L(t_4)=-i_L(t_0)\\ i_L(t_5)=-i_L(t_1^{\prime })\\ i_L(t_6)=-i_L(t_2)\\ i_L(t_7)=-i_L(t_3)\end{array}$$

(22)

By applying volt-second balance to the inductor current, the initial current of the inductor, i_L(t_o), can be derived from Equations (14)–(17), by assuming t_n values of t₀ = 0, t′₁ = D₃T_h, t₂ = (D₃ + D₂)T_h, t₃ = D₁T_h and t₄ = T_h, where T_h = T_s/2.

$$-2i_L(t_0)=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t_4-t_3\right)+\frac{V_{DC1}-n{V}_{DC2}}{L_{{}_{tot}}}\left(t_3-t_2\right)+\frac{V_{DC1}}{L_{{}_{tot}}}\left(t_2-t_1\right)$$

(23)

Substituting values of tn in the expression (23) above, $i_L(t_0)$ can be derived as

$$i_L(t_0)=-\left[\frac{V_{DC1}{D}_1-n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]$$

(24)

From (24), the currents for each switching interval can be derived as

$$\begin{array}{l}{i}_L(t_1)\hspace{0.33em}=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t_1-t_0\right)-\left[\frac{V_{DC1}{D}_1-n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]\\ =\left[\frac{2V_{DC1}{D}_3-V_{DC1}{D}_1+n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]\end{array}$$

(25)

$$\begin{array}{ll}{i}_L(t_2)& =\frac{V_1-n{V}_2}{L_{{}_{tot}}}\left(t-t_1\right)+i_L(t_1)\\ & =\left[\frac{2V_{DC1}{D}_2+2V_{DC1}{D}_3-V_{DC1}{D}_1+n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]\end{array}$$

(26)

$$\begin{array}{l}{i}_L(t_3)=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t_3-t_2\right)+i_L(t_2)\\ =\frac{2V_{DC1}{D}_1-2V_{DC1}{D}_3-2V_{DC1}{D}_2}{4f_s{L}_{{}_{tot}}}+\left[\frac{2V_{DC1}{D}_2+2V_{DC1}{D}_3-V_{DC1}{D}_1+n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]\\ =\left[\frac{V_{DC1}{D}_1-n{V}_{DC2}{D}_{DC2}}{4f_s{L}_{{}_{tot}}}\right]\end{array}$$

(27)

$$i_L(t_4)=i_L(t_3)$$

(28)

The peak current for this mode of operation is given by

$$i_{peak}=i_L(t_3)=\left|i_L(t_0)\right|=\left[\frac{V_{DC1}{D}_1-n{V}_{DC2}{D}_2}{4f_s{L}_{{}_{tot}}}\right]$$

(29)

The rms current can be expressed as follows:

$$\begin{array}{ll}{i}_{rms(\mathrm{mod}e1)}& =\sqrt{\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}\left(i_L{(t)}^2\right)}dt}\\ & =\frac{1}{T_h}{\left(\begin{array}{l}{\displaystyle \underset{t_0}{\overset{t_1}{\int }}{\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_0)\hspace{0.33em}dt\right]}^2}+{\displaystyle \underset{t_1}{\overset{t_2}{\int }}{\left[\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1)\hspace{0.33em}dt\right]}^2}\\ +{\displaystyle \underset{t_2}{\overset{t_3}{\int }}{\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_2)\hspace{0.33em}dt\right]}^2}+{\displaystyle \underset{t_3}{\overset{t_4}{\int }}{\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_3)\hspace{0.33em}dt\right]}^2}\end{array}\right)}^{1/2}\\ \end{array}$$

(30)

Inserting t₀ = 0, t₁ = D₃T_h, t₂ = (D₃ + D₂)T_h, t₃ = D₁T_h, t₄ = T_h in (30) and rearranging yields

$$i_{rms(\mathrm{mode}1)} ={\left(\left[i_L{}^2(t_3)\left(1-D_1\right)\right]+\left[\frac{2f_s{L}_{tot}}{3}\left\{\begin{array}{ll}\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_{DC1}}\right]+& \\ \left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_{DC1}-n{V}_{DC2}}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{V_{DC1}}\right]\end{array}\right\}\right]\right)}^{1/2}$$

(31)

Based on the derived expressions, derivations for active power, reactive power, and ZVS operation possibility for each switch and its range are presented below.

The calculation of the average power transferred by the converter can be achieved at either bridge, by considering the assumptions made previously,

$$P=\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac1}{i}_L(t)} dt = \frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{v}_{ac2}^{\prime }{i}_L(t)} dt$$

(32)

The transmitted power is obtained as

$$P_{\mathrm{mod}e1}=\frac{1}{T_h}\left[\begin{array}{l}{\displaystyle \underset{0}{\overset{t_1-t_0}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_0) dt\right]\right)\right\}}+{\displaystyle \underset{0}{\overset{t_2-t_1}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1) \right)\right\}+}\\ {\displaystyle \underset{0}{\overset{t_3-t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}}{L_{tot}}t+i_L(t_2)\right)\right\}} + {\displaystyle \underset{0}{\overset{t_4-t_3}{\int }}\left\{v_{ac1}(t)\times \left(\frac{0}{L_{tot}}t+i_L(t_3)\right)\right\}}\end{array}\right]dt$$

(33)

Simplifying and rearranging expression (33) results in

$$\begin{array}{l}{P}_{\mathrm{mod}e1}=\frac{1}{T_h}\left[\begin{array}{l}{\displaystyle \underset{0}{\overset{t_1-t_0}{\int }}\left\{v_{ac1}(t)\times \left(\left[\frac{V_{DC1}}{L_{tot}}t+i_L(t_0) dt\right]\right)\right\}}+{\displaystyle \underset{0}{\overset{t_2-t_1}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}t+i_L(t_1) \right)\right\}+}\\ {\displaystyle \underset{0}{\overset{t_3-t_2}{\int }}\left\{v_{ac1}(t)\times \left(\frac{V_{DC1}}{L_{tot}}t+i_L(t_2)\right)\right\}} + {\displaystyle \underset{0}{\overset{t_4-t_3}{\int }}\left\{v_{ac1}(t)\times \left(\frac{0}{L_{tot}}t+i_L(t_3)\right)\right\}}\end{array}\right]dt\\ \\ =\frac{V_{DC1}}{T_h}\left\{{\left[\left(\frac{V_{DC1}}{L_{tot}}\frac{t^2}{2}+i_L(t_0)\times t\right)\right]}_{t_0}^{t_1}+{\left[\left(\frac{V_{DC1}-n{V}_{DC2}}{L_{tot}}\frac{t^2}{2}+i_L(t_1)\times t\right)\right]}_{t_1}^{t_2}+{\left[\left(\frac{V_{DC1}}{L_{tot}}\frac{t^2}{2}+i_L(t_2)\times t\right)\right]}_{t_2}^{t_3}\right\}\\ \end{array}$$

(34)

After inserting t_n values and further manipulation of (34), mode 1 active power equation can be derived as

$$\hspace{0.17em}{P}_{\mathrm{mod}e1}=\frac{n{V}_{DC1}{V}_{DC2}}{4f_s{L}_{tot}}\left[D_2{}^2-D_1{D}_2+2D_2{D}_3\right]$$

(35)

From (35), the range of power transfer can be determined, in order to characterize mode upper and lower power operation limits. This is carried out by first normalizing the power equation relative to the maximum power attained by the converter. This base power is obtained through CPS Equation (2) of the previous chapter, when external phase shift D = 0.5.

$$P_{base}=\frac{n{V}_{DC1}{V}_{DC2}}{8f_s{L}_{tot}}$$

(36)

Thus,

$$P_{\mathrm{mod}e1(pu)}=2\left[D_2{}^2-D_1{D}_2+2D_2{D}_3\right]$$

(37)

The maximum and minimum power transfer in per unit (pu) and corresponding maximum and minimum TPS control values can be obtained by solving a basic optimization problem for the normalized power formula (37) and applying the mode operational constraints (12). The required steps to determine these parameters is summarized by flow chart of Figure 7. Results obtained from this are:

$$\begin{array}{l}{P}_{\max }=0.5 pu\left(D_1=1,D_2=0.5,D_3=0.5\right)\\ P_{\min }=-0.5 pu \left(D_1=1,D_2=0.5,D_3=0.0\right)\end{array}$$

(38)

Reactive power is a vital variable of interest in the investigation of DAB converters. Reducing reactive power consumption has the advantage of minimizing the RMS inductor current for a given level of power transfer. This, in turn, leads to reduced conduction and copper losses. In this paper, reactive power is calculated by determining the apparent power S_L at the inductor. Since inductors do not absorb active power, the apparent power is, therefore, analogous to the reactive power utilized by the inductor. This definition is equivalent to the total reactive power consumption at the converter H-bridges. Hence, the reactive power, denoted as Q, can be obtained as

$$Q=S_L=V_{L_{RMS}}{I}_{L_{RMS}}$$

(39)

The equation for the mode 1 RMS current is denoted in (31). The RMS value for the inductor voltage can be calculated by referring to Figure 4a:

$$\begin{array}{ll}{v}_{Lrms(\mathrm{mod}e1)}& =\sqrt{\frac{1}{T_h}{\displaystyle \underset{0}{\overset{T_h}{\int }}{V}_L{}^2(t)}dt}\\ & =\frac{1}{T_h}{\left(V^2{}_{DC1}\left(t_1-t_0\right)+{\left(V_{DC1}-n{V}_{DC2}\right)}^2\left(t_2-t_1\right)+V^2{}_{DC1}\left(t_3-t_2\right)\right)}^{1/2}\end{array}$$

(40)

Substituting t_n values into (40), the mode 1 RMS voltage is

$$v_{Lrms(\mathrm{mod}e1)}={\left(V_{DC1}{}^2{D}_1+{(n{V}_{DC2})}^2{D}_{{}^2}-2n{V}_{DC1}{V}_{DC2}{D}_{{}^2}\right)}^{1/2}$$

(41)

By merging Equations (31) and (41), a more accurate definition of the DAB true reactive power emerges:

$$Q_{\mathrm{mod}e1}={\left(\left[\left(V_{DC1}{}^2{D}_1+{(n{V}_{DC2})}^2{D}_{{}^2}-2n{V}_{DC1}{V}_{DC2}{D}_{{}^2}\right)\right]\times \left(\begin{array}{l}\left[i_L{}^2(t_3)\left(1-D_1\right)\right]+\\ \left[\frac{2f_s{L}_{tot}}{3}\left\{\begin{array}{l}\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_{DC1}}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_{DC1}-n{V}_{DC2}}\right]\\ +\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{V_{DC1}}\right]\end{array}\right\}\right]\end{array}\right)\right)}^{1/2}$$

(42)

To achieve zero-voltage switching (ZVS) with IGBT switches in the converter, certain conditions must be met. First, antiparallel diodes need to conduct before the switches are turned on. Once the voltage across the switches drops to null, the current shifts to the switch from the antiparallel diode, allowing for turn-on when voltage is zero and effectively eliminating power loss during turn-on. Therefore, at the precise moment when the switch is turned on, the current within the switch should have a negative direction, providing the necessary condition for ZVS. In the context of Figure 1a, the specific conducting current directions of the switches can be summarized as

$$For{S}_1,S_4,Q_2,Q_3{\left. i_L\right|}_{t=turn\hspace{0.17em}on} <0\&For{S}_2,S_3,Q_1,Q_4{\left. i_L\right|}_{t=turn\hspace{0.17em}on} >0$$

(43)

-

Generation of inequality for each switch, by observing the instant the switch starts to conduct first.

$$\left\{\begin{array}{l}{S}_1=\left\{\begin{array}{l}{i}_L(t_7)<0\\ i_L(t_3)>0\\ i_L(t_0)<0\end{array}\right\}\\ S_2=\left\{\begin{array}{l}{i}_L(t_3)>0\\ i_L(t_0)<0\end{array}\right\}\\ S_3=\left\{\begin{array}{l}{i}_L(t_4)>0\\ i_L(t_0)<0\end{array}\right\}\\ S_4=\left\{i_L(t_0)<0\right\}\end{array}\right.\&\left\{\begin{array}{l}{Q}_1=\left\{\begin{array}{l}{i}_L(t_6)>0\\ i_L(t_2)<0\end{array}\right\}\\ Q_2=\left\{i_L(t_2)<0\right\}\\ Q_3=\left\{\begin{array}{l}{i}_L(t_5)<0\\ i_L(t_1)>0\end{array}\right\}\\ Q_4=\left\{i_L(t_1)>0\right\}\end{array}\right.$$

(44)

-

Summarizing inequalities of expression (44) by removing redundant expressions and checking if the inequality does not contradict the current waveform.

$$\begin{array}{l}{i}_L(t_0)<0\\ i_L(t_1)>0\\ i_L(t_2)<0\end{array}$$

(45)

• By mapping (45) to the respective segments of the inductor current of Figure 5a, inequality $i_L(t_2)<0$ introduces a conflict, and hence, for this mode, it can be concluded that soft switching is not possible for all DAB converter switches. Note that this is applicable when the voltage conversion ratio $\frac{n{V}_{DC2}}{V_{DC1}}<0$. When $\frac{n{V}_{DC2}}{V_{DC1}}>0$, the resulting condition might be different.

i. 

Mode 1′

Mode1′ is essentially the mode generating equal power in magnitude to mode 1 but in the reverse direction. Hence, the bridge B voltage waveform is shifted by 180°. Therefore, the boundary condition is defined by the full overlap of positive and negative half-cycles of the bridges’ AC voltage waveforms, as Figure 5b depicts. The same methodology can be adapted to derive the mode constraint as in the previous mode and by extending the mode voltage waveforms to the negative half-plane; it can be concluded that the following mode 1′constraints should be maintained:

$$\begin{array}{l}{D}_2\le D_1\\ -1\le D_3\le -1+D_1-D_2\end{array}$$

(46)

Analysis for various switching instants of the inductor current is performed prior to deriving key parameters. Nine distinct segments emerge, as illustrated in the Figure 5b. The second half-cycle operation is similar, but with an inverted inductor current and complimentary switches conducting; the equivalent circuit and steady-state value of the inductor current for the first half-period is defined for convenience, and this will likewise also be the case for all the remaining operating modes.

Interval t₀–t₁: The inductor current is negative during this switching state and the resulting equivalent circuit is demonstrated by Figure 8a. Switches S₁ and S₄ are in the direct conduction path, the current freewheels through integrated antiparallel diodes D_S1 and D_S4 for Bridge A, while for Bridge B, the current flows through D_Q2 and Q₄, respectively. The voltage across the inductor is V_DC1. Therefore, I_L(t) is expressed as

$$i_L(t)=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t-t_0\right)+i_L(t_0)$$

(47)

Interval t₁–t_1′: Figure 8b depicts the equivalent circuit for this time segment. In bridge A, i_L flows through diodes D_S1 and D_S4. Similarly, the current in bridge B freewheels through reverse recovery diodes D_Q2 and D_Q3. Inductor voltage is clamped at V_DC1 + nV_DC2.

$$i_L(t)=\frac{V_{DC1}+n{V}_{DC2}}{L_{tot}}(t-t_1)+i_L(t_1)$$

(48)

Interval t_1′–t₂: Current polarity reverses for this time duration, whilst linearly increasing, plotted by the circuit diagram of Figure 8c. Switches S₁ and S₄ of bridge A are conducting, while in Bridge B, the current flows through Q₂ and Q₃. Inductor voltage is still clamped at V_DC1 + nV_DC2. The current is similarly given by (48). The interval ends upon Q₂ turn-off.

Interval t₂–t₃: Figure 8d demonstrates the equivalent circuit showing the current path during this duration. For bridge A, the same switches continue to conduct as in the previous segment, while in bridge B, the current freewheels in diode D_Q1 and flows through switch Q₃. The voltage across the inductor is V_DC1. The inductor current for this segment is

$$i_L(t)=\frac{V_{DC1}}{L_{{}_{tot}}}\left(t-t_2\right)+i_L(t_2)$$

(49)

Interval t₃–t₄: The schematic circuit showing the current path during this time instant is displayed in Figure 8e. Both bridge terminal voltages are zero, and thus, no power is transferred. The current circulates through D_S1 and S₄ in bridge A. For bridge B, the current path remains the same as in the previous interval. The inductor current slope is zero, and thus, its value is given by (49).

By substituting t_n values of t₀ = 0, t₁ = (1 − |D₃|)T_h, t₂ = (1 − |D₃|+ D₂)T_h, t₃ = D₁T_h and t₄ = T_h, one can evaluate expressions comprising the inductor current at various switching instants, peak currents and RMS currents, along with the average power, reactive power and ZVS constraints, following similar steps outlined in mode 1. To reduce the number of equations, the final derivation of these expressions is summarized in

Table 1. Key expressions for mode 1′.

Variable
Currents at each switching instants	$i_L(t_0)=-\left[\frac{V_{DC1}{D}_1+n{V}_{DC2}{D}_2}{4f_s{L}_{tot}}\right]$
	$i_L(t_1)=\hspace{0.33em}\left[\frac{-V_{DC1}{D}_1-2V_{DC1}\left|D_3\right|+2V_1-n{V}_{DC2}{D}_2}{4f_s{L}_{tot}}\right]$
	$i_L(t_2)\hspace{0.33em}=\left[\frac{-V_{DC1}{D}_1+2V_{DC1}+2V_{DC1}{D}_2-2V_{DC1}\left|D_3\right|+n{V}_{DC2}{D}_2}{4f_s{L}_{tot}}\right]$
	$i_L(t_3)=\hspace{0.33em}\left[\frac{V_{DC1}{D}_1+n{V}_{DC2}{D}_2}{4f_s{L}_{tot}}\right]$
	$i_L(t_4)=i_L(t_3)$
RMS current	$I_{rms(\mathrm{mod}e{1}^{\prime })} ={\left(\left[i_L{}^2(t_3)\left(1-D_1\right)\right]+\left[\frac{2f_s{L}_{tot}}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_{DC1}}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_{DC1}+n{V}_{DC2}}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{V_{DC1}}\right]\right\}\right]\right)}^{1/2}$
RMS voltage	$V_{Lrms(\mathrm{mod}e{1}^{\prime })}={\left(V_{DC1}{}^2{D}_1+{\left(n{V}_{DC2}\right)}^2{D}_{{}^2}+2n{V}_{DC1}{V}_{DC2}{D}_{{}^2}\right)}^{1/2}$
Average power and range	$P_{(\mathrm{mod}e{1}^{\prime })}=-\hspace{0.33em}\hspace{0.33em}\frac{n{V}_{DC1}{V}_{DC2}}{4f_s{L}_{tot}}\left[D_2{}^2+2D_2-D_1{D}_2-2D_2\left|D_3\right|\right]$ Range:⮕$\left\{\begin{array}{l}{P}_{\max }=0.5 pu\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\left(D_1=1,D_2=0.5,D_3=-1\right)\\ P_{\min }=-0.5 pu\hspace{0.33em}\hspace{0.33em}\left(D_1=1,D_2=0.5,D_3=-0.5\right)\end{array}\right.$
Reactive power	$Q_{\mathrm{mod}e{1}^{\prime }}=v_{rms(\mathrm{mod}e{1}^{\prime })}\times i_{rms(\mathrm{mod}e{1}^{\prime })}$
ZVS	Achievable for all switches Constraints: $i_L(t_0)<0,i_L(t_1)<0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)>0$

.

According to the results obtained, it can be observed in Table 1 that mode peak current is given by i_L(t₃). The derived per-unit value for upper- and lower-mode active power limits, which is ±0.5 pu, is also evaluated by applying a similar optimization problem procedure as in mode 1, while decrementing D₃ from 0 to −1 (rather than incrementing). The corresponding TPS modulation parameters that achieve these limits are also tabulated. By also taking a similar approach for the determination of ZVS, as in mode 1, a soft-switching operation is possible for all the switches as long as the ZVS constraints given in Table 1 are satisfied. Even though the obtained mode steady-state equations look dissimilar to previous derivations defined for mode 1, it can be shown that by substituting |D₃| = 1 − D₃ in expressions of mode1′ results in inverted but identical equations of mode 1, which verifies the complementary nature of this mode compared to mode 1.

Following a similar analysis to the TPS modes above, in Appendix A, the remaining modes of operations 2 through 6 and their corresponding complements, which are graphically shown in Figure 9, are analyzed.

Normalized inductor currents to (1/4f_sL), for the positive half-cycle switching instants are derived and listed for the remaining modes in

Table 2. Inductor currents (i_L) for positive half-cycle switching intervals normalized to $1/4f_{s}L$.

Modes	${\mathit{i}}_{\mathit{L}}({\mathit{t}}_0)$	${\mathit{i}}_{\mathit{L}}({\mathit{t}}_1)$	${\mathit{i}}_{\mathit{L}}({\mathit{t}}_2)$	${\mathit{i}}_{\mathit{L}}({\mathit{t}}_3)$
2	$-\left[V_1{D}_1-2n{V}_2+n{V}_2{D}_2+2n{V}_2{D}_3\right]$	$\left[V_1{D}_1+2n{V}_2{D}_1-n{V}_2{D}_2+2n{V}_2-2n{V}_2{D}_3\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$
2′	$-\left[V_1{D}_1+2n{V}_2-n{V}_2{D}_2-2n{V}_2{D}_3\right]$	$\left[V_1{D}_1-2n{V}_2-2n{V}_2{D}_1+n{V}_2{D}_2+2n{V}_2{D}_3\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$
3	$-\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$
3′	$-\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$
4	$-\left[V_1{D}_1-2n{V}_2+n{V}_2{D}_2+2n{V}_2{D}_3\right]$	$\left[-V_1{D}_1-2V_1+2V_1{D}_2+n{V}_2{D}_2+2V_1{D}_3\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$
4′	$-\left[V_1{D}_1+2n{V}_2-n{V}_2{D}_2-2n{V}_2{D}_3\right]$	$\left[-V_1{D}_1-2V_1+2V_1{D}_2+2V_1{D}_3-n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$
5	$-\left[V_1{D}_1-n{V}_2{D}_2\right]$	$\left[-V_1{D}_1+2V_1{D}_3+n{V}_2{D}_2\right]$	$\left[V_1{D}_1-2n{V}_2{D}_1+n{V}_2{D}_2+2n{V}_2{D}_3\right]$	$\left[V_1{D}_1-n{V}_2{D}_2\right]$
5′	$-\left[V_1{D}_1+n{V}_2{D}_2\right]$	$\left[-V_1{D}_1+2V_1{D}_3-n{V}_2{D}_2\right]$	$\left[V_1{D}_1+2n{V}_2{D}_1-n{V}_2{D}_2-2n{V}_2{D}_3\right]$	$\left[V_1{D}_1+n{V}_2{D}_2\right]$
6	$-\left[V_1{D}_1+n{V}_2{D}_2+2n{V}_2{D}_3-2n{V}_2\right]$	$\left[-V_1{D}_1+2V_1{D}_2+2V_1{D}_3+n{V}_2{D}_2-2V_1\right]$	$\left[-V_1{D}_1+2V_1{D}_3+n{V}_2{D}_2\right]$	$\left[V_1{D}_1-2n{V}_2{D}_1+n{V}_2{D}_2+2n{V}_2{D}_3\right]$
6′	$-\left[V_1{D}_1-n{V}_2{D}_2-2n{V}_2{D}_3+2n{V}_2\right]$	$\left[-V_1{D}_1+2V_1{D}_2+2V_1{D}_3-n{V}_2{D}_2-2V_1\right]$	$\left[-V_1{D}_1+2V_1{D}_3-n{V}_2{D}_2\right]$	$\left[V_1{D}_1+2n{V}_2{D}_1-n{V}_2{D}_2-2n{V}_2{D}_3\right]$

. Detailed derivation of the currents for each mode can be found in Appendix A. The negative half-cycle values are not included because of the half-wave symmetry of the inductor current. These values can be computed by taking the counter-positive half-cycle values.

Table 3. Remaining DAB modes of operation and power equations using TPS control.

			Mode 2	Mode 2′
Mode operational constraints			$\begin{array}{l}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}{D}_2\ge D_1\\ \left(1+D_1-D_2\right)\le D_3\le 1\end{array}$
Power and power range (pu)			$\begin{array}{l}{P}_{pu}=2\left[D_1{}^2-D_1{D}_2+2D_1-2D_1{D}_3\right]\\ Range:P_{\max }=0.5 pu,\hspace{0.33em}{P}_{\min }=-0.5 pu\hspace{0.33em}\end{array}$	$\begin{array}{l}{P}_{pu}=-2\left[D_1{}^2-D_1{D}_2+2D_1-2D_1{D}_3\right]\\ Range:P_{\max }=0.5 pu,P_{\min }=-0.5 pu\hspace{0.33em}\hspace{0.33em}\end{array}$
	Mode 3	Mode 3′	Mode 4	Mode 4′
	$t_o=0,t_1=D_1{T}_h,t_2=D_3{T}_h,t_3=\left(D_2+D_3\right)T_h,t_4=T_h=\frac{1}{2f_s}$		$t_o=0,t_1=\left(D_2+D_3-1\right)T_h,t_2=D_1{T}_h,t_3=D_3{T}_h,t_4=T_h=\frac{1}{2f_s}$
Mode operational constraints	$\begin{array}{l}{D}_2\le 1-D_1\\ D_1\le D_3\le 1-D_2\end{array}$		$\begin{array}{l}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}{D}_1\le D_3\le 1\\ 1-D_3\le D_2\le 1-D_3+D_1\end{array}$
Power and power range (pu)	$\begin{array}{l}\hspace{0.33em}\hspace{0.33em}{P}_{pu}\hspace{0.33em}=2\left[D_1{D}_2\right]\\ Range:P_{\max }=0.5 pu,\hspace{0.33em}{P}_{\min }=0 pu\end{array}$	$\begin{array}{l}{P}_{pu}\hspace{0.33em}=-2\left[D_1{D}_2\right]\\ Range:P_{\max }=\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}0.0 pu,\hspace{0.33em}{P}_{\min }=-0.5 pu\hspace{0.33em}\end{array}$	$\begin{array}{l}{P}_{pu}=2\left[\begin{array}{l}-D_2{}^2-D_3{}^2+2D_2+2D_3\\ -2D_2{D}_3+D_1{D}_2-1\end{array}\right]\\ Range:\hspace{0.33em}{P}_{\max }=0.67 pu,\hspace{0.33em}{P}_{\min }=0 pu\hspace{0.33em}\end{array}$	$\begin{array}{l}{P}_{pu}=-2\left[\begin{array}{l}-D_2{}^2-D_3{}^2+2D_2+2D_3\\ -2D_2{D}_3+D_1{D}_2-1\end{array}\right]\\ Range:\hspace{0.33em}{P}_{\max }=0 pu,\hspace{0.33em}\hspace{0.33em}{P}_{\min }=\hspace{0.33em}\hspace{0.33em}-0.67 pu\end{array}$
	Mode 5	Mode 5′	Mode 6	Mode 6′
	$t_o=0,t_1=D_3{T}_h,t_2=D_1{T}_h,t_3=\left(D_2+D_3\right)T_h,t_4=T_h=\frac{1}{2f_s}$		$t_o=0,t_1=\left(D_2+D_3-1\right)T_h,t_2=D_3{T}_h,t_3=D_1{T}_h,t_4=T_h=\frac{1}{2f_s}$
Mode operational constraints	$\begin{array}{l}{D}_1-D_3\le D_2\le 1-D_3\\ \hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}0\le D_3\le D_1\end{array}$		$\begin{array}{l}\hspace{0.33em}\hspace{0.33em}1-D_2\le D_1\\ \hspace{0.33em}\hspace{0.33em}1-D_2\le D_3\le D_1\end{array}$
Power and power range (pu)	$\begin{array}{l}{P}_{pu}=2\left[-D_1{}^2-D_3{}^2+D_2{D}_1+2D_1{D}_3\right]\\ Range:\hspace{0.33em}{P}_{\max }=0.667 pu\hspace{0.17em},\hspace{0.33em}{P}_{\min }=0 pu\end{array}$	$\begin{array}{l}{P}_{pu}=-2\left[-D_1{}^2-D_3{}^2+D_2{D}_1+2D_1{D}_3\right]\\ Range:\hspace{0.33em}{P}_{\max }=0 pu,\hspace{0.33em}{P}_{\min }=-0.667 pu\hspace{0.33em}\end{array}$	$\begin{array}{l}{P}_{pu}=2\left[\begin{array}{l}-D_1{}^2-D_2{}^2-2D_3{}^2+2D_3-2D_2{D}_3\\ +D_1{D}_2+2D_1{D}_3+2D_2\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}-1\end{array}\right]\\ Range:P_{\max }=1 pu,\hspace{0.33em}{P}_{\min }=0 pu\hspace{0.33em}\hspace{0.33em}\end{array}$	$\begin{array}{l}{P}_{pu}=-2\left[\begin{array}{l}-D_1{}^2-D_2{}^2-2D_3{}^2+2D_3-2D_2{D}_3\\ +D_1{D}_2+2D_1{D}_3+2D_2\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}-1\end{array}\right]\\ Range:P_{\max }=0 pu,\hspace{0.33em}{P}_{\min }=-1 pu\hspace{0.33em}\end{array}$

lists the average power pu normalized to the maximum power transferred by the converter for the remaining modes. Using CPS modulation at 90° phase shift between the two converter half-bridge voltages, the base power utilized in this article is derived.

$$P_{base}=\frac{n{V}_1{V}_2}{8f_{s}L}$$

(50)

For each mode, the range of power transfer is also computed to characterize mode limits, by applying the mode operational constraints to the computed power equations. This shows the converter power transfer capability with respect to the full range under a specific mode of operation. In complementary modes, bridge 2 waveform is shifted by 180° from the noncomplementary mode, resulting in the exact but negative power range. In Table 3, modes 6 and 6′ are the sole modes that cover the whole converter operating power range.

The operational modes, including 1, 1′, 2 and 2′, are capable of both charging and discharging, but only within half of the power range. Conversely, modes 3, 4, 5 and 6, along with their complements, exclusively support unidirectional power transfer. Notably, in modes 3 and 3′, the power transfer is not dependent on D₃ and can be solely controlled by adjusting the bridge voltages. ZVS constraints are established and presented in

Table 4. Reactive power and ZVS constraints for the remaining modes.

Mode	Reactive Power (Q)	Zero-Voltage Switching
2	$Q_2={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}+2n{V}_1{V}_2{D}_1\right]\times \left\{\left[i_L{}^2(t_2)\left(1-D_2\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1+n{V}_2}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{n{V}_2}\right]+\left[\frac{i_L{}^3(t_0)+i_L{}^3(t_3)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{1/2}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)>0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)>0$
2′	$Q_{2^{\prime }}={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}-2n{V}_1{V}_2{D}_1\right]\times \left\{\left[i_L{}^2(t_2)\left(1-D_2\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1-n{V}_2}\right]-\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{n{V}_2}\right]-\left[\frac{i_L{}^3(t_0)+i_L{}^3(t_3)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{1/2}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)>0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)<0$
3	$Q_3={\left(\left[V_1{}^2{D}_1+n^2{V}_{{}^2}{}^2{D}_{{}^2}\right]\hspace{0.33em}\times \hspace{0.33em}\left\{\left[\left[i_L{}^2(t_1)\left(D_3-D_1\right)\right]+\left[i_L{}^2(t_3)\left(1-D_2-D_3\right)\right]\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1}\right]-\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	NO
		Constraints	-
3′	$Q_{3^{\prime }}={\left(\left[V_1{}^2{D}_1+n^2{V}_{{}^2}{}^2{D}_{{}^2}\right]\times \left\{\left[\left[i_L{}^2(t_1)\left(D_3-D_1\right)\right]+\left[i_L{}^2(t_3)\left(1-D_2-D_3\right)\right]\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{\hspace{0.33em}\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	NO
		Constraints	-
4	$Q_4={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}+2n{V}_1{V}_2(D_{{}^2}+D_3-1)\right]\times \left\{\left[i_L{}^2(t_3)\left(D_3-D_1\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1+n{V}_2}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1}\right]+\left[\frac{i_L{}^3(t_3)+i_L{}^3(t_0)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{\hspace{0.33em}\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)>0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)>0$
4′	$Q_{4^{\prime }}={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}-2n{V}_1{V}_2(D_{{}^2}+D_3-1)\right]\times \left\{\left[i_L{}^2(t_3)\left(D_3-D_1\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\begin{array}{l}\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1-n{V}_2}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1}\right]\\ -\left[\frac{i_L{}^3(t_3)+i_L{}^3(t_0)}{n{V}_2}\right]\end{array}\right\}\right]\right\}\right)}^{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	NO
		Constraints	-
5	$Q_5={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}+2n{V}_1{V}_2\left(D_3-D_1\right)\right]\times \left\{\left[i_L{}^2(t_3)\left(1-D_2-D_3\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1-n{V}_2}\right]-\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{\hspace{0.33em}\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)<0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)>0$
5′	$Q_{5^{\prime }}={\left(\left[V_1{}^2{D}_1+n^2{V}_{{}^2}{}^2{D}_{{}^2}+2n{V}_1{V}_2\left(D_1-D_3\right)\right]\times \left\{\left[i_L{}^2(t_3)\left(1-D_2-D_3\right)\right]+\left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1+n{V}_2}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{n{V}_2}\right]\right\}\right]\right\}\right)}^{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)<0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_2)>0$
6	$Q_6={\left(\left[V_1{}^2{D}_1+n^2{V}_{{}^2}{}^2{D}_{{}^2}+2n{V}_1{V}_2(D_{{}^2}+2D_3-D_{{}^1}-1)\right]\times \left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1+n{V}_2}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{V_1-n{V}_2}\right]+\left[\frac{i_L{}^3(t_0)+i_L{}^3(t_3)}{n{V}_2}\right]\right\}\right]\right)}^{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)>0\hspace{0.33em},i_L(t_2)>0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_3)>0$
6′	$Q_{6^{\prime }}={\left(\left[V_1{}^2{D}_1+n^2{V}_2{}^2{D}_{{}^2}+2n{V}_1{V}_2(D_1-D_2-2D_3+1)\right]\times \left[\frac{2f_{s}L}{3}\left\{\left[\frac{i_L{}^3(t_1)-i_L{}^3(t_0)}{V_1-n{V}_2}\right]+\left[\frac{i_L{}^3(t_2)-i_L{}^3(t_1)}{V_1}\right]+\left[\frac{i_L{}^3(t_3)-i_L{}^3(t_2)}{V_1+n{V}_2}\right]-\left[\frac{i_L{}^3(t_0)+i_L{}^3(t_3)}{n{V}_2}\right]\right\}\right]\right)}^{\raisebox{1ex}{$1$}\!\left/ \!\raisebox{-1ex}{$2$}\right.}$	ZVS possible for all switches?	YES
		Constraints	$i_L(t_0)<0,i_L(t_1)<0\hspace{0.33em},i_L(t_2)<0\hspace{0.33em}\&\hspace{0.33em}{i}_L(t_3)>0$

, specifically indicating modes where ZVS can be achieved for all switches. For other modes, ZVS is only partially attainable within the converter, as seen in modes 1, 3, 3′ and 5. The table also contains information on RMS current, RMS voltage and reactive power for the remaining modes.

4. Generalization of TPS Control Scheme

Based on the analysis provided in the previous sections, it can be inferred that TPS control can be applied universally across various phase shift modulation techniques. To demonstrate this, we will consider the following examples while adhering to the mode operational constraints defined in the previous section.

i.

Conventional phase shift (CPS): This is defined by D₁ = 1, D₂ = 1. Applying this definition to modes 6 and 6′ yields 0 ≤ D₃ ≤ 1. CPS is therefore fully achieved with these two modes.

ii.

Dual phase shift (DPS): This is categorized by D₁ = D₂ = D. Applying this definition to modes 6 and 6′ yields D ≥ 0.5 and 1 − D ≤ D₃ ≤ D. This does not represent the complete control range for D. Considering modes 3 and 3′, if D₁ = D₂ = D, then D ≤ 0.5 and D ≤ D₃ ≤ 1 − D. Thus, modes 3, 3′, 6 and 6′ can cover the whole operating range for DPS.

iii.

Extended phase shift (EPS): This condition is established when one of the bridge voltages is maintained as a full square wave, while the other bridge voltage is controlled to resemble a quasi-square wave. Considering modes 6 and 6′, if:

-

D₁ = 1, then D₂ ≥ 0 and 1 − D₂ ≤ D₃ ≤ 1;

-

D₂ = 1, then D₁ ≥ 0 and 0 ≤ D₃ ≤ D₁.

EPS can therefore partially be achieved with modes 6 and 6′. Modes 1, 1′, 2 and 2′ cover the remaining EPS range of operation.

For modes 1 and 1′, if:

-

D₁ = 1, then D₂ ≤ 1 and 0 ≤ D₃ ≤ 1 − D₂.

For modes 2 and 2′, if:

-

D₂ = 1, then D₁ ≤ 1 and D₁ ≤ D₃ ≤ 1.

5. Optimization Example Using Reactive Power Minimization Algorithm

The following section outlines the implementation of the generic per-unit system TPS algorithm, which aims to reduce the flow of the converter’s reactive power, considering the complete operating range of −1 pu to 1 pu. The circulating RMS current can also be used if desired to be minimized, rather than reactive power. Detailed algorithm features to overcome reactive power losses are discussed, while extensive theoretical and experimental evaluations are also performed. In TPS control, phase shifts D₁, D₂ and D₃ are varied to achieve required output power transfer, with the objective of enhancing the regulation flexibility of the converter compared to the CPS, EPS and DPS schemes. This leads to several TPS modes meeting the same reference power requirement as illustrated in Figure 10, but rather, with different reactive power loss values. To exemplify the task required, in order to determine the optimum mode, consider an active reference power requirement for 0.3 pu as an example for a given DC link voltage. According to Figure 10, modes 1, 1′, 2, 2′, 3, 4, 5 and 6 meet the required power to be transferred. Hence, a multistep optimization procedure eliminates modes that cause unnecessarily high circulating reactive power through a selection of optimum TPS modes, from all possible operating modes fulfilling the required reference power. Once the optimum mode is determined, the corresponding TPS phase shift combination satisfying the minimum reactive power generated is listed.

In this reactive power optimization algorithm, the first step is to convert all modes’ derived peak currents, RMS currents, RMS voltages and active and reactive powers into pu system. These base values are defined as follows:

$$\begin{array}{l}{V}_{base}\hspace{0.17em}=V_{DC1}=V_{DC1(pu)}\\ Z_{base}=8f_s{L}_{tot}\\ I_{base}=\frac{V_{DC1}}{8f_s{L}_{tot}}\\ P_{base}=\frac{V^2{}_{DC1}}{8f_s{L}_{tot}}\\ Q_{base}=\frac{V^2{}_{DC1}}{8f_s{L}_{tot}}\end{array}$$

(51)

The resulting pu expressions are independent of L_tot and f_s, as an example of instantaneous inductor current and power Equations (52)–(54) for mode 1 shown below.

$$\begin{array}{l}{i}_L{(t_0)}_{(pu)}=-\left[2V_{DC1}{}_{\left(pu\right)}{D}_1-2n{V}_{DC{2}_{\left(pu\right)}}{D}_2\right]\\ i_L{(t_1)}_{(pu)}=\left[4V_{DC{1}_{\left(pu\right)}}{D}_3-2V_{DC{1}_{\left(pu\right)}}{D}_1+2n{V}_{DC{2}_{\left(pu\right)}}{D}_2\right]\\ i_L{(t_2)}_{(pu)}=\left[4V_{DC1}{}_{\left(pu\right)}{D}_2+4V_{DC1}{}_{\left(pu\right)}{D}_3-2V_{DC{1}_{\left(pu\right)}}{D}_1+2n{V}_{DC{2}_{\left(pu\right)}}{D}_2\right]\\ i_L{(t_3)}_{(pu)}=\left[2V_{DC{1}_{\left(pu\right)}}{D}_1-2n{V}_{DC{2}_{\left(pu\right)}}{D}_{DC2}\right]\end{array}$$

(52)

$$\hspace{0.17em}{P}_{\mathrm{mod}e1}{}_{\left(pu\right)}=\frac{n{V}_{DC2\left(pu\right)}\left[D_2{}^2-D_1{D}_2+2D_2{D}_3\right]}{V_{DC1\left(pu\right)}}$$

(53)

$$Q_{\mathrm{mod}e1\left(pu\right)}={\left(\begin{array}{l}\left[\left(V_{DC1\left(pu\right)}{}^2{D}_1+{(n{V}_{DC2})}_{\left(pu\right)}{}^2{D}_{{}^2}-2n{V}_{DC1\left(pu\right)}{V}_{DC2\left(pu\right)}{D}_{{}^2}\right)\right]\times \\ \left(\begin{array}{l}\left[i_{L\left(pu\right)}{}^2(t_3)\left(1-D_1\right)\right]+\\ \left[\frac{1}{12}\left\{\begin{array}{l}\left[\frac{i_{L\left(pu\right)}{}^3(t_1)-i_{L\left(pu\right)}{}^3(t_0)}{V_{DC1\left(pu\right)}}\right]+\left[\frac{i_{L\left(pu\right)}{}^3(t_2)-i_{L\left(pu\right)}{}^3(t_1)}{V_{DC1\left(pu\right)}-n{V}_{DC2\left(pu\right)}}\right]\\ +\left[\frac{i_{L\left(pu\right)}{}^3(t_3)-i_{L\left(pu\right)}{}^3(t_2)}{V_{DC1\left(pu\right)}}\right]\end{array}\right\}\right]\end{array}\right)\end{array}\right)}^{1/2}$$

(54)

The next step involves implementation of the algorithm, which is described through a flow chart diagram of Figure 11 and can be summarized as follows:

-

The algorithm determines mode(s) meeting the required reference output power (P_ref(pu));

-

Once the correct mode(s) is/are computed, the algorithm responds by calculating key metrics such active and reactive power values for each mode(s);

-

By using a set of nested loops, minimum reactive power search is performed, considering of all possible modes, and results are listed;

-

From this list, the mode that generates the minimum reactive power is selected;

-

Finally, the algorithm generates TPS D₁, D₂ and D₃ for the optimum mode (D_1opt, D_2opt and D_3opt).

The algorithm can be extended to include applications that involve variable input and output DC link voltages. Instead of assuming fixed DC link voltages, it can be updated to also include V_DC1(pu) and nV_DC2(pu) as an input parameter in addition to P_ref(pu).

6. Results

In this section, simulation and experimental verification are presented. To differentiate from the transformer voltage conversion ratio, an effective method is to perform analysis across the whole conversion ratio and power levels for each conversion ratio, i.e.,

$$R_V=\frac{n{V}_{DC2}}{V_{DC1}}$$

(55)

Therefore, considering a converter operating range of 0 pu to 1 pu reference powers and for R_V = 2, which is illustrated in

Table 5. TPS mode selection performance of the algorithm for R_V = 2 at P_ref = 0.25 pu and P_ref = 0.5 pu.

Pref = 0.5 pu
Mode	1	1′	2	2′	3	4	5	6
Pref (pu)	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5
Q (pu)	0.5771	2.8865	3.7519	1.4425	1.1430	1.1430	0.5771	0.5771
D1	1.0000	1.0000	0.5000	0.5000	0.5000	0.5000	1.0000	1.0000
D2	0.5000	0.5000	1.0000	1.0000	0.5000	0.5000	0.5000	0.5000
D3	0.5000	−1.0000	0.5000	0.0000	0.5000	0.5000	0.5000	0.5000
Pref = 0.25 pu
Mode	1	1′	2	2′	3	4	5	6
Pref (pu)	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25
Q (pu)	0.3423	1.5043	2.5335	0.8659	0.6123	0.8355	0.2990	0.6318
D1	0.7500	0.7500	0.2500	0.5000	0.5000	0.6600	0.6700	0.9800
D2	0.5000	0.2500	0.7500	0.7500	0.2500	0.1900	0.3300	0.9000
D3	0.2500	−1.0000	0.5000	0.000	0.5000	0.8300	0.3600	0.1100

, the advantages using a triple phase shift algorithm to minimize the converter losses is evident. In the example of R_v = 2, for partial power operation of p_ref = 0.5 pu and p_ref = 0.25 pu, this test shows modes that can meet the reference power, the possible minimum reactive power for each mode and the corresponding TPS values. Note that for each mode that can achieve the reference power output, the resulting reactive power is the minimum possible within that mode, irrespective of its magnitude. During partial loading of 0.5 pu and 0.25 pu, eight different modes achieve requirement of the active power, as depicted in Table 5. Taking the case of P_ref(pu) = 0.5 pu, a minimum reactive power (Q_min) flow of 0.57 pu for modes 1, 5 and 6 is generated, while mode 2 outputs the maximum reactive power (Q_max) loss of 3.75 pu; a difference of 3.18 pu for an identical active power demand. The corresponding optimum TPS values leading to Q_min are, D_1opt = 1, D_2opt = 0.5 and D_3opt = 0.5. This is the EPS modulation scheme discussed in Section 2, and further shows the importance of TPS in generalizing all known phase shift control schemes.

Likewise, under partial loading of P_ref(pu) = 0.25 pu, the advantages of the TPS The algorithm becomes even more conspicuous for R_v = 2. Q_min output of mode 5 is 1.16 pu, whilst mode 2 leads to a Q_max = 3.75 pu, a difference of 4.74 pu. Therefore, these minimum reactive power values are the optimum which the controller selects for D_1opt = 1, D_{2 opt} = 0.5 and D_3opt = 0.5.

Table 6. TPS mode selection performance of the algorithm for R_V = 4 at P_ref = 0.25 pu and P_ref = 0.5 pu.

Pref = 0.5 pu
Mode	1	1′	2	2′	3	4	5	6
Pref (pu)	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5
Q (pu)	1.4425	3.7519	5.9160	3.6066	2.4528	2.1802	1.2941	1.1579
D1	1.0000	1.0000	0.5000	0.5000	0.5000	0.6500	0.8500	0.9800
D2	0.5000	0.5000	1.0000	1.0000	0.5000	0.4000	0.4000	0.3600
D3	0.5000	−1.0000	0.5000	0.0000	0.5000	0.7000	0.5500	0.6600
Pref = 0.25 pu
Mode	1	1′	2	2′	3	4	5	6
Pref ( pu)	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25
Q (pu)	0.5556	1.7335	4.3103	2.5582	0.9182	0.8208	0.5074	0.5579
D1	0.7500	0.7500	0.2500	0.5000	0.5000	0.8500	0.8100	0.9800
D2	0.2500	0.2500	0.7500	0.7500	0.2500	0.1500	0.1900	0.1400
D3	0.5000	−1.000	0.5000	0.000	0.5000	0.9000	0.6400	0.8700

presents the response of the algorithm when the R_V ratio is further increased to 4. Using the same reference power of 0.5 pu and 0.25 pu, as in the previous case, eight different modes operate at the required active power. When 0.5 pu is required, mode 6 generates a Q_min of 1.16 pu, while mode 2 leads to a corresponding Q_max of 5.92 pu. Reducing P_{ref (pu)} to 0.25 pu, a Q_min of 0.51 pu and Q_max of 4.31 pu is generated by modes 5 and 2. The optimum TPS parameters that lead to minimum reactive power when P_ref = 0.5 pu are D_1opt = 0.85, D_{2 opt} = 0.40 and D_3opt = 0.55, while for P_ref = 0.25 pu, D_1opt = 0.81, D_{2 opt} = 0.19 and D_3opt = 0.64. Again, as with these two cases, the algorithm, as expected, was capable of determining and selecting Q_min.

To further validate the importance of the TPS algorithm, a 100 kW, 1 kV/4 kV converter is simulated using Matlab/Simulink using 2 kHz switching frequency and L_tot of 0.62 mH for HVDC application. The simulation results of Figure 12 highlight the effect of operating the converter at non-unity R_V. The results of Figure 12 illustrate the converter operating at an R_V ratio of 2. Figure 12a depicts the corresponding active power output 1.0 pu from time t = 0 to t = 0.2 s, 0.5 pu from t = 0.2 s to t = 0.4 s and 0.25 pu from t = 0.4 s to t = 0.6 s. The superimposed reactive power plots of the TPS algorithm and conventional phase shift (CPS) are displayed in Figure 12b. As in the previous case, regardless of the voltage conversion ratio, at 1.0 pu output power, the reactive power is uncontrollable. However, observe the significant difference of reactive power at low power levels of 0.5 pu and 0.25 pu, where DAB converter losses are significant. For 0.5 pu, between t = 0.2 s to t = 0.4 s, the dashed red line represents a reactive power value of Q = 1.05 pu, while for the TPS optimization algorithm shown by the solid black line, Q = 0.56 pu. This is a significant improvement, which will translate to conduction and copper loss reduction.

Similarly, for an output power of 0.25 pu, the reactive power loss gap widens further between CPS and the proposed control scheme, a difference of Q = 0.44 pu. Figure 12c–f depict the transformer AC voltages and currents at 2 kHz. Waveforms of Figure 12c,d show AC voltages for TPS and under CPS. In Figure 12c, v_ac1 and v_ac2, waveforms are full square waves for all power levels, and the corresponding D₁, D₂ and D₃ values are shown in Figure 12g. In Figure 12d, the quasi-square wave pattern for low power levels of 0.5 pu and 0.25 pu, respectively, can be seen. The TPS control parameters that lead to this low reactive power is depicted by Figure 12g. Peak and RMS inductor currents and waveforms are shown in Figure 12e,f. During low power transmissions of 0.5 pu and 0.25 pu, the improvement of the switching algorithm over the CPS scheme can be seen.

An experimental test rig of a downscaled 568 W 24 V/100 V DAB converter prototype was also performed to show the TPS algorithm response under wide Rv. The converter parameters are indicated in

Table 7. Converter parameters.

Input DC voltage	VDC1	24 V
Output DC voltage	VDC2	100 V
Total inductance	Ltot	63.36 uH
Switching frequency	fs	2 kHz
Transformer turns ratio	n	100/24
Input DC capacitor	CDC1	1200 µF
Output DC capacitor	CDC2	2700 µF

, and the circuit layout, including a photo of the test rig, is shown in Figure 13. The entire TPS controller was implemented using a Texas instruments TMS320F2335 Microcontroller mounted on an eZDSP evaluation board.

The hardware test subsystems consist of the following:

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Low-voltage (LV) bridge and high-voltage (HV) bridge single-phase dual active converter bridges, which are implemented using four active insulated gate bipolar transistor (IGBT) switches, with associated gate driver circuits for galvanic isolation between the switches’ common points and the microcontroller common ground.

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A Texas instruments F28335 Microcontroller.

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A 2 kHz nanocrystalline core transformer and external air core inductor.

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DC filter capacitors.

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DC power supplies powering sensor circuits, gate drivers, the microcontroller and cooling fans.

Several tests were performed to study the response of the TPS controller when the converter is required to source/sink while operating at full/partial loading scenarios at R_V = 1. The results of Figure 14a show when the converter is operating at its full rated power capacity of −1 pu (power flow from HV Bridge B to LV Bridge A) initially. Before the power reversal is performed, bridge B is sourcing while bridge A is sinking, which is evident from the DC currents’ I_DC1, I_DC2 directions and the full square waveforms of the transformer AC voltages v_ac1 and v_ac2 at 2 kHz. After a short duration, a full power reversal of 1 pu is commanded. Observe that the directions of the DC currents reverse fast as expected with virtually no noticeable transient′s overshoot. Similarly, the full square wave transformer AC voltages v_ac1 and v_ac2 phase shift reversal can be seen, where v_ac1 now leads v_ac2 by 90⁰. The inductor current i_L direction change is also illustrated in the figure. In Figure 14b, the algorithm response to ±0.5 pu partial power operation is also demonstrated. A fast partial power reversal of 0.5 pu to −0.5 pu is achieved.

Similarly, to validate the algorithm in terms of selecting the minimum reactive power flow, out of all possible modes for active power references of 0.5 pu and 0.25 pu, an individual test was further performed at a voltage conversion ratio of Rv = 2. Figure 15 shows postprocessed results representing clusters of bar graphs of the modes of reactive power and efficiency at reduced power levels of 0.5 pu and 0.25 pu, respectively. The corresponding practical AC and DC waveforms of the results of Figure 15a are presented in Figure 16.

This agrees with the result of Table 5, whereby modes M1, M2, M2′, M3, M4, M5 and M6 were able to transmit the required active power. Similarly, performance of the algorithm was further evaluated at low output power level of 0.25 pu as demonstrated in Figure 15b. According to Table 5, modes M1, M2, M2′, M3, M4, M5 and M6 were able to transmit the required active power 0.25 pu M5 is the most efficient mode, with Q_min = 0.23 pu, while the M2 is the worst, with a corresponding reactive power circulation of Q_min = 2.63 pu, a significant difference of 2.4 pu (680 Var). Typical oscilloscope waveforms recorded for the least and the most efficient mode M2 and M5 are illustrated by Figure 17.

7. Conclusions

This paper provides a comprehensive analysis of modulation control schemes for single-phase bidirectional dual active bridge DC/DC converters. The analysis demonstrates that single phase shift, extended phase shift, and dual phase shift are all special cases of the more generalized triple phase shift modulation. A comprehensive derivation of power equations, operating ranges, and zero-voltage switching conditions for the six triple phase shift modes and their complements was performed, without relying on fundamental component assumptions. Another key contribution of this article is the development of a generic optimization algorithm to leverage the flexibility of triple phase shift modulation for greater efficiency. By simplifying and standardizing the understanding of triple phase shift control, this paper aims to facilitate its wider adoption in single-phase DAB converters. The detailed theoretical examination of the TPS modulation scheme for the converter was verified using a reactive power minimization algorithm, through MATLAB/Simulink simulations and experimentally using a downscaled DAB converter.