FPGA-Parallelized Digital Filtering for Real-Time Linear Envelope Detection of Surface Electromyography Signal on cRIO Embedded System

Surface electromyography (sEMG) signal processing has been the subject of many studies for many years now. These studies had the main objective of providing pertinent information to medical experts to help them make correct interpretations and medical diagnoses. Beyond its clinical relevance, sEMG plays a critical role in human–machine interface systems by monitoring skeletal muscle activity through analysis of the signal’s amplitude envelope. Achieving accurate envelope detection, however, demands a robust and efficient signal processing pipeline. This paper presents the implementation of an optimized processing framework for the real-time linear envelope detection of sEMG signals. The proposed pipeline comprises three main stages, namely data acquisition, full-wave rectification, and low-pass filtering, where the deterministic execution time of the algorithm on the FPGA (98 ns per sample) is two orders of magnitude faster than the data acquisition sample interval (200 µs), guaranteeing real-time performance. The entire algorithm is designed for deployment on the FPGA core of a CompactRIO embedded controller, with emphasis on achieving high accuracy while minimizing hardware resource consumption. For this purpose, a parallel second-order structure of the Butterworth low-pass (LP) filter is proposed. The designed filter is tested and compared practically to the conventional method, which is the moving average (MAV) filter. The mean square error (MSE) is used as a metric for performance evaluation. From the analysis, it is observed that the proposed design LP filter shows an improved MSE and reduced hardware resources than the MAV filter. Furthermore, the comparative analysis and the results show that our proposed design LP filter is a valid and reliable method for linear envelope detection.