FPGA-Based Acceleration on Additive Manufacturing Defects Inspection
Department of Electrical and Computer Engineering, University of Houston, Houston, TX 77204, USA
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Author to whom correspondence should be addressed.
Academic Editors: Dadong Wang, Jian-Gang Wang and Ke Xu
Sensors 2021, 21(6), 2123; https://doi.org/10.3390/s21062123
Received: 3 March 2021
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Revised: 14 March 2021
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Accepted: 16 March 2021
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Published: 18 March 2021
(This article belongs to the Special Issue Deep Learning for Object Detection, Classification and Tracking in Industry Applications)
Additive manufacturing (AM) has gained increasing attention over the past years due to its fast prototype, easier modification, and possibility for complex internal texture devices when compared to traditional manufacture processing. However, potential internal defects are occurring during AM processes, and it requires real-time inspections to minimize the costs by either aborting the processing or repairing the defect. In order to perform the defects inspection, first the defects database NEU-DET is used for training. Then, a convolution neural network (CNN) is applied to perform defects classification. For real-time purposes, Field Programmable Gate Arrays (FPGAs) are utilized for acceleration. A binarized neural network (BNN) is proposed to best fit the FPGA bit operations. Finally, for the image labeled with defects, the selective search and non-maximum algorithms are implemented to help locate the coordinates of defects. Experiments show that the BNN model on NEU-DET can achieve 97.9% accuracy in identifying whether the image is defective or defect-free. As for the image classification speed, the FPGA-based BNN module can process one image within 0.5 s. The BNN design is modularized and can be duplicated in parallel to fully utilize logic gates and memory resources in FPGAs. It is clear that the proposed FPGA-based BNN can perform real-time defects inspection with high accuracy and it can easily scale up to larger FPGA implementations.
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Keywords:
FPGA; additive manufacturing; defects inspection; convolutional neural network; binarized neural network; selective search
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MDPI and ACS Style
Luo, Y.; Chen, Y. FPGA-Based Acceleration on Additive Manufacturing Defects Inspection. Sensors 2021, 21, 2123. https://doi.org/10.3390/s21062123
AMA Style
Luo Y, Chen Y. FPGA-Based Acceleration on Additive Manufacturing Defects Inspection. Sensors. 2021; 21(6):2123. https://doi.org/10.3390/s21062123
Chicago/Turabian StyleLuo, Yawen, and Yuhua Chen. 2021. "FPGA-Based Acceleration on Additive Manufacturing Defects Inspection" Sensors 21, no. 6: 2123. https://doi.org/10.3390/s21062123
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