Trends and Prospects in Security, Encryption and Encoding: 2nd Edition

Abstract submission deadline

30 November 2026

Manuscript submission deadline

31 January 2027

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Topic Information

Dear Colleagues,

Multimedia data can be defined as a combination of different data types such as text, audio, images, and video. Every day, a huge quantity of data is transmitted through the internet and other open networks. Securing the transmitted data and preventing any misuse of it are considerable challenges. Various security methodologies, such as digital watermarking, data encryption, steganography, data hiding, and blockchain, have been developed for securing multimedia data.

Digital watermarking is used in copyright protection and in securing multimedia data through a networked environment. Data encryption or cryptographic methods encrypt the data at the sender side, transmit this data from the sender to the receiver, and then decrypt it at the receiver side. In image steganography, the message image is hidden in a cover image and changes its properties, providing a secret communication method which prevents hackers/attackers from detecting the message’s presence.

Over the last decade, several remarkable methodologies have been developed to improve the levels of multimedia security. Blockchain is an emerging technique to keep the data within an open decentralized network.

Papers eligible for publication in this Topic include theoretical and applied studies focused on, but not limited to, the following:

• Principles of data security and emerging hybrid techniques.
• Image and video encryption, watermarking, steganography, and data hiding.
• Speech and audio encryption, watermarking, steganography, and data hiding.
• Multimedia security using blockchain.
• FPGA-based implementation for multimedia security.
• Embedded hardware for multimedia security.
• Applications of multimedia security in smart cities.
• Deep learning techniques for modeling threats and vulnerabilities in software.
• Automatic modeling of software and hardware attacks and defenses using artificial intelligence algorithms.
• Adversarial machine learning techniques applied to DevSecOps.
• Automatic prediction of security flaws in software and hardware using deep learning algorithms.
• Artificial intelligence for automatic error correction.
• Artificial intelligence techniques for algorithmic verification.
• Deep learning techniques for the generation and mutation of abnormal application traffic patterns.
• Deep learning techniques for symbolic model checking.
• Use of artificial intelligence techniques for vulnerability prediction.
• Development of AI techniques to measure software resilience.
• Deep learning techniques for the detection of programming errors in binary and modern programming languages.
• Automatic abstraction techniques applicable to programming code.
• Techniques to increase privacy when sharing information.

Prof. Dr. Ki-Hyun Jung
Prof. Dr. Luis Javier García Villalba
Topic Editors

Keywords

Participating Journals

Journal Name	Impact Factor	CiteScore	Launched Year	First Decision (median)	APC
Applied Sciences applsci	2.9	6.1	2011	15 Days	CHF 2400	Submit
Cryptography cryptography	2.4	6.4	2017	19.9 Days	CHF 1800	Submit
Journal of Cybersecurity and Privacy jcp	3.8	8.8	2021	23.7 Days	CHF 1200	Submit
Journal of Sensor and Actuator Networks jsan	4.8	11.3	2012	24.4 Days	CHF 2000	Submit
Symmetry symmetry	2.2	5.2	2009	16.3 Days	CHF 2400	Submit

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26 pages, 2465 KB  

Open AccessArticle

Dynamic Scaling Pollard’s P-1 Algorithm

by Wenwen Xia, Geng Wang and Dawu Gu

Cryptography 2026, 10(4), 57; https://doi.org/10.3390/cryptography10040057 - 13 Aug 2026

Viewed by 361

Abstract

The integer factorization problem is a hard problem in classical. Let $N=PQ$, where P and Q are large primes. Pollard’s P-1 Algorithm is an efficient integer factorization algorithm while all the prime factors of $P-1$ are small. [...] Read more.

The integer factorization problem is a hard problem in classical. Let $N=PQ$, where P and Q are large primes. Pollard’s P-1 Algorithm is an efficient integer factorization algorithm while all the prime factors of $P-1$ are small. However, the previous variants of Pollard’s P-1 algorithms require a strict bound on the prime factors, and the running time depends on the bound instead of the actual size of prime factors, which is undesirable. This paper firstly designs a dynamic scaling version of Pollard’s P-1 Algorithm (abbreviate as $\mathsf{DSP}$) to solve this problem and also accelerate the algorithm’s efficiency by applying a fast multiplication method to it. Additionally, $\mathsf{DSP}$ saves the cost in computing the product of prime factors with high enough exponent by repeatedly using product of primes with low exponent. We also give the complexity analysis for our proposed algorithm and the latest published variant of Pollard’s P-1 Algorithm named IPP1 (Kritsanapong Somsuk, Symmetry). Moreover, we give a theoretical comparison between IPP1 and our algorithm. In particular, we show that our algorithm costs less than IPP1 in more than 95% while in IPP1 the bound of prime factors of P-1 is set to at least 64. Additionally, we also test several instances in factoring 1024-bit integers $N=PQ$ in experiment. We firstly construct the $P-1$ as a product of several randomly generated 30-bit numbers to ensure its solvability by the Pollard’s P-1 Algorithm, then test four variants of Pollard’s P-1 Algorithm. The experimental result shows that our algorithm is most efficient among them. Its efficiency improvement performs more apparently while the exponent of a prime factor in $P-1$ is large. In factoring 1024-bit integer, our algorithm solves it nearly 23.5 times faster than IPP1, 16.4 times faster than the Original Pollard’s P-1 Algorithm (J. M. Pollard, MPCPS), 35.6 times faster than the trivial Pollard’s P-1 Algorithm (D. Bishop, Introduction to cryptography with Java applets). Full article

(This article belongs to the Topic Trends and Prospects in Security, Encryption and Encoding: 2nd Edition)

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34 pages, 6962 KB  

Open AccessReview

A Brief Survey on Hardware Implementation of Fully Homomorphic Encryption

by Yang Su, Kaixuan Zhou, Weidong Zhong, Jianfei Wang, Jia Hou and Chen Yang

Cryptography 2026, 10(4), 49; https://doi.org/10.3390/cryptography10040049 - 13 Jul 2026

Cited by 1 | Viewed by 1144

Abstract

Leveraging the favorable properties of cryptographic computation, FHE effectively ensures data availability without visibility, thereby holding broad application prospects in cloud computing security and data privacy protection. However, computational efficiency remains a critical bottleneck that constrains its practical deployment and further development. Consequently, [...] Read more.

Leveraging the favorable properties of cryptographic computation, FHE effectively ensures data availability without visibility, thereby holding broad application prospects in cloud computing security and data privacy protection. However, computational efficiency remains a critical bottleneck that constrains its practical deployment and further development. Consequently, research on hardware implementations of FHE has become a major direction in the cryptographic community. This paper first systematically reviews the research progress of FHE schemes, summarizing and analyzing the characteristics of representative FHE schemes. Subsequently, we survey and analyze hardware research progress and optimization techniques from the perspectives of overall accelerator architecture design, polynomial multiplier design, and integer modular multiplier design, highlighting the main advantages, disadvantages, and common features of different hardware structures. Finally, based on an analysis of existing hardware implementation architectures for FHE, this paper presents the potential deficiencies, summarizes and outlines future research directions and development prospects, aiming to further improve the operational performance of FHE hardware implementations. Full article

(This article belongs to the Topic Trends and Prospects in Security, Encryption and Encoding: 2nd Edition)

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62 pages, 21176 KB  

Open AccessArticle

TALOS: An Ultra-Efficient Area-Space 6G CryptoProcessor Leveraging Reusable Hardware Security Modules

by Anastasios N. Bikos

J. Cybersecur. Priv. 2026, 6(4), 122; https://doi.org/10.3390/jcp6040122 - 13 Jul 2026

Viewed by 824

Abstract

This paper presents TALOS, a unified reusable 6G CryptoProcessor architecture for high-assurance symmetric security services under a 256-bit private-key baseline. The design addresses a core hardware challenge in future mobile systems: supporting heterogeneous strong symmetric primitives without duplicating complete cipher cores. TALOS combines [...] Read more.

This paper presents TALOS, a unified reusable 6G CryptoProcessor architecture for high-assurance symmetric security services under a 256-bit private-key baseline. The design addresses a core hardware challenge in future mobile systems: supporting heterogeneous strong symmetric primitives without duplicating complete cipher cores. TALOS combines a Hierarchical Common Data Path (HCDP) with a three-tier cryptographic encapsulation model spanning AES-256, Snow 5G/SNOW-V-class, and ZUC-256. Tier-1 captures native nonlinear substitutions, Tier-2 compiles bounded arithmetic nonlinearities into exact micro-S-boxes, and Tier-3 consolidates shared permutation, XOR, affine, diffusion, and state-transport fabrics. This decomposition preserves cipher correctness while exposing realistic sharing opportunities across substitution, arithmetic, and linear transport layers. The architecture also supports confidentiality processing and integration with integrity- and authentication-oriented service logic through a common control/resource framework. Compared with monolithic universal-box or loosely aggregated multi-core approaches, TALOS provides a disciplined, RTL-oriented taxonomy for crypto-agile symmetric-core hardware. The proposed framework advances 6G cryptographic hardware design by combining operator-exact reuse, architectural scalability, and implementation-oriented efficiency within a single CryptoProcessor paradigm. Full article

(This article belongs to the Topic Trends and Prospects in Security, Encryption and Encoding: 2nd Edition)

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