Search Results (28)

This paper presents new fast algorithms for the type VII discrete cosine transform (DCT-VII) applied to input data sequences of lengths ranging from 3 to 8. Fast algorithms for small-sized trigonometric transforms enable the processing of small data blocks in image and video coding with low computational complexity. To process the information in image and video coding standards, the fast DCT-VII algorithms can be used, taking into account the relationships between the DCT-VII and the type II discrete cosine transform (DCT-II). Additionally, such algorithms can be used in other digital signal processing tasks as components for constructing algorithms for large-sized transforms, leading to reduced system complexity. Existing fast odd DCT algorithms have been designed using relationships among discrete cosine transforms (DCTs), discrete sine transforms (DSTs), and the discrete Fourier transform (DFT); among different types of DCTs and DSTs; and between the coefficients of the transform matrix. However, these algorithms require a relatively large number of multiplications and additions. The process of obtaining such algorithms is difficult to understand and implement. To overcome these shortcomings, this paper applies a structural approach to develop new fast DCT-VII algorithms. The process begins by expressing the DCT-VII as a matrix-vector multiplication, then reshaping the block structure of the DCT-VII matrix to align with matrix patterns known from the basic papers in which the structural approach was introduced. If the matrix block structure does not match any known pattern, rows and columns are reordered, and sign changes are applied as needed. If this is insufficient, the matrix is decomposed into the sum of two or more matrices, each analyzed separately and transformed similarly if required. As a result, factorizations of DCT-VII matrices for different input sequence lengths are obtained. Based on these factorizations, fast DCT-VII algorithms with reduced arithmetic complexity are constructed and presented with pseudocode. To illustrate the computational flow of the resulting algorithms and their modular design, which is suitable for VLSI implementation, data-flow graphs are provided. The new DCT-VII algorithms reduce the number of multiplications by approximately 66% compared to direct matrix-vector multiplication, although the number of additions decreases by only about 6%. Full article

Low-light image enhancement (LLIE) is an essential task for improved image quality that ultimately supports crucial downstream tasks such as autonomous driving and mobile photography. Despite notable advances achieved by traditional, Retinex-based methods, existing approaches still struggle to maintain globally consistent illumination and to suppress sensor noise under extremely dark conditions. To overcome these limitations, we propose a noise-resilient LLIE framework that integrates a CLIP-guided loss (CLIP-LLA) and a pixel-reordering subsampling (PRS) scheme into the Retinexformer backbone. The CLIP-LLA loss exploits the semantic prior of a large-scale vision–language model to align enhanced outputs within the manifold of well-illuminated natural images, leading to faithful global tone rendering and perceptual realism. In parallel, the PRS-based multi-scale training strategy effectively regularizes the network by augmenting structural diversity, thereby improving denoising capability without architectural modification or inference cost. Extensive experiments on both sRGB and RAW benchmarks validate the effectiveness of our design. The proposed method achieves consistent improvements over state-of-the-art techniques, including a $+2.73\mathrm{dB}$ PSNR gain on the SMID dataset and superior perceptual scores, while maintaining computational efficiency. These results demonstrate that fusing foundation-model priors with transformer-based Retinex frameworks offers a practical and scalable pathway toward perceptually faithful low-light image enhancement. Full article

This paper proposes a novel heart rate detection scheme to address key challenges in millimeter-wave radar-based vital sign monitoring, including weak signals, various types of interference, and the demand for high-precision and super-resolution frequency estimation under practical computational constraints. First, we propose a multi-dimensional coherent accumulation (MDCA) method to enhance the signal-to-noise ratio (SNR) by fully utilizing both spatial information from multiple receiving channels and temporal information from adjacent range bins. Additionally, we are the first to apply the fast iterative interpolated beamforming (FIIB) algorithm to radar-based heart rate detection, enabling super-resolution frequency estimation with low computational complexity. Compared to the traditional fast Fourier transform (FFT) method, the FIIB achieves an improvement of 1.08 beats per minute (bpm). A reordering strategy is also introduced to mitigate potential misjudgments by FIIB. Key parameters of FIIB, including the number of frequency components L and the number of iterations Q, are analyzed and recommended. Dozens of subjects were recruited for experiments, and the root mean square error (RMSE) of heart rate estimation was less than 1.12 bpm on average at a distance of 1 m. Extensive experiments validate the high accuracy and robust performance of the proposed framework in heart rate estimation. Full article

This paper presents new fast algorithms for the fourth type discrete Hartley transform (DHT-IV) for input data sequences of lengths from 3 to 8. Fast algorithms for small-sized trigonometric transforms can be used as building blocks for synthesizing algorithms for large-sized transforms. Additionally, they can be utilized to process small data blocks in various digital signal processing applications, thereby reducing overall system latency and computational complexity. The existing polynomial algebraic approach and the approach based on decomposing the transform matrix into cyclic convolution submatrices involve rather complicated housekeeping and a large number of additions. To avoid the noted drawback, this paper uses a structural approach to synthesize new algorithms. The starting point for constructing fast algorithms was to represent DHT-IV as a matrix–vector product. The next step was to bring the block structure of the DHT-IV matrix to one of the matrix patterns following the structural approach. In this case, if the block structure of the DHT-IV matrix did not match one of the existing patterns, its rows and columns were reordered, and, if necessary, the signs of some entries were changed. If this did not help, the DHT-IV matrix was represented as the sum of two or more matrices, and then each matrix was analyzed separately, if necessary, subjecting the matrices obtained by decomposition to the above transformations. As a result, the factorizations of matrix components were obtained, which led to a reduction in the arithmetic complexity of the developed algorithms. To illustrate the space–time structures of computational processes described by the developed algorithms, their data flow graphs are presented, which, if necessary, can be directly mapped onto the VLSI structure. The obtained DHT-IV algorithms can reduce the number of multiplications by an average of 75% compared with the direct calculation of matrix–vector products. However, the number of additions has increased by an average of 4%. Full article

This research contributes to the studies on the origins and transformations of Tchaikovsky’s Children’s Album, Op. 39 using the linguistic methods of discourse, metaphor, and comparative analysis to explore a number of connected questions and their impact on how the audiences and scholars perceive and understand the compositions. These methods are supported by the technology provided by computational linguistics, such as large language models along with music analysis algorithms based on signature pattern elicitation. This article examines how artificial intelligence technologies can shed light on the differing views on the Children’s Album. The meanings and implications of the published reordering of the pieces are explored. The influence of Schumann’s Album for the Young and the broader pedagogical and cultural significance of editorial transformations is investigated. Through this interdisciplinary approach, this study offers new insights into the compositional intent and interpretive possibilities of Tchaikovsky’s work. The presented results of the musicology, literary, computational, and linguistic analyses complement the few scholarly studies aimed at unveiling the intriguing metaphors and connections of the Children’s Album, which tend to remain in the shadows of his larger-scale piano and symphonic works. Full article

To address the challenge of low diagnostic accuracy in rolling bearing fault diagnosis under varying operating conditions, this paper proposes a novel method integrating the synchronized wavelet transform (SWT) with an enhanced Vision Transformer architecture, referred to as ResCAA-ViT. The SWT is first applied to process raw vibration signals, generating high-resolution time–frequency maps as input for the network model. By compressing and reordering wavelet transform coefficients in the frequency domain, the SWT enhances time–frequency resolution, enabling the clear capture of instantaneous changes and local features in the signals. Transfer learning further leverages pre-trained ResNet50 parameters to initialize the convolutional and residual layers of the ResCAA-ViT model, facilitating efficient feature extraction. The extracted features are processed by a dual-branch architecture: the left branch employs a residual network module with a CAA attention mechanism, improving sensitivity to critical fault characteristics through strip convolution and adaptive channel weighting. The right branch utilizes a Vision Transformer to capture global features via the self-attention mechanism. The outputs of both branches are fused through addition, and the diagnostic results are obtained using a Softmax classifier. This hybrid architecture combines the strengths of convolutional neural networks and Transformers while leveraging the CAA attention mechanism to enhance feature representation, resulting in robust fault diagnosis. To further enhance generalization, the model combines cross-entropy and mean squared error loss functions. The experimental results show that the proposed method achieves average accuracy rates of 99.96% and 96.51% under constant and varying load conditions, respectively, on the Case Western Reserve University bearing fault dataset, outperforming other methods. Additionally, it achieves an average diagnostic accuracy of 99.25% on a real-world dataset of generator non-drive end bearings in wind turbines, surpassing competing approaches. These findings highlight the effectiveness of the SWT and ResCAA-ViT-based approach in addressing complex variations in operating conditions, demonstrating its significant practical applicability. Full article

The Burrows–Wheeler Transform (BWT) is a widely used reversible data compression method, forming the foundation of various compression algorithms and indexing structures. Prior research has analyzed the sensitivity of compression methods and repetitiveness measures to single-character edits, particularly in binary alphabets. However, the impact of such modifications on the compression efficiency of the bijective variant of BWT (BBWT) remains largely unexplored. This study extends previous work by examining the compression sensitivity of both BWT and BBWT when applied to larger alphabets, including alphabet reordering. We establish theoretical bounds on the increase in compression size due to character modifications in structured sequences such as Fibonacci words. Our devised lower bounds put the sensitivity of BBWT on the same scale as of BWT, with compression size changes exhibiting logarithmic multiplicative growth and square-root additive growth patterns depending on the edit type and the input data. These findings contribute to a deeper understanding of repetitiveness measures. Full article

Chip rate estimation for direct-sequence spread spectrum (DSSS) signals plays a crucial role in signal detection and interference identification in non-cooperative wireless communication systems. However, accurate chip rate estimation is difficult in low signal-to-noise ratio (SNR) environments due to the influence of noise and channel fading. To address this problem, an improved chip rate estimation method, based on a time-reassigned multisynchrosqueezing transform energy squeeze, for DSSS signals is proposed for low SNR conditions. In this method, we explain how to choose an appropriate wavelet function and concentrate the wavelet coefficients on the energy ridge by reordering time details. This enhances the time resolution of the signal energy, reduces noise interference, and improves the accuracy of chip rate estimation for DSSS signals. To validate the proposed method, we compared the effects of different information code lengths, spread spectrum code lengths, spread spectrum code sequences, and modulation schemes on chip rate estimation performance with traditional methods. Additionally, we applied the method to real DSSS signal data to demonstrate its feasibility. Simulation examples and measurements demonstrate the reliability of the proposed method in low SNR environments. Full article

This paper introduces an innovative framework for visualisation design ideation, which includes a collection of terms for creative visualisation design, the five-step process, and an implementation called VisAlchemy. Throughout the visualisation ideation process, individuals engage in exploring various concepts, brainstorming, sketching ideas, prototyping, and experimenting with different methods to visually represent data or information. Sometimes, designers feel incapable of sketching, and the ideation process can be quite lengthy. In such cases, generative AI can provide assistance. However, even with AI, it can be difficult to know which vocabulary to use and how to strategically approach the design process. Our strategy prompts imaginative and structured narratives for generative AI use, facilitating the generation and refinement of visualisation design ideas. We aim to inspire fresh and innovative ideas, encouraging creativity and exploring unconventional concepts. VisAlchemy is a five-step framework: a methodical approach to defining, exploring, and refining prompts to enhance the generative AI process. The framework blends design elements and aesthetics with context and application. In addition, we present a vocabulary set of 300 words, underpinned from a corpus of visualisation design and art papers, along with a demonstration tool called VisAlchemy. The interactive interface of the VisAlchemy tool allows users to adhere to the framework and generate innovative visualisation design concepts. It is built using the SDXL Turbo language model. Finally, we demonstrate its use through case studies and examples and show the transformative power of the framework to create inspired and exciting design ideas through refinement, re-ordering, weighting of words and word rephrasing. Full article

Sparse matrix–matrix multiplication (SpMM) is essential for deep learning models and scientific computing. Recently, Tensor Cores (TCs) on GPUs, originally designed for dense matrix multiplication with mixed precision, have gained prominence. However, utilizing TCs for SpMM is challenging due to irregular memory access patterns and a varying number of non-zero elements in a sparse matrix. To improve data locality, previous studies have proposed reordering sparse matrices before multiplication, but this adds computational overhead. In this paper, we propose Tensor Core-Adapted SpMM (TCA-SpMM), which leverages TCs without requiring matrix reordering and uses the compressed sparse row (CSR) format. To optimize TC usage, the SpMM algorithm’s dot product operation is transformed into a blocked matrix–matrix multiplication. Addressing load imbalance and minimizing data movement are critical to optimizing the SpMM kernel. Our TCA-SpMM dynamically allocates thread blocks to process multiple rows simultaneously and efficiently uses shared memory to reduce data movement. Performance results on sparse matrices from the Deep Learning Matrix Collection public dataset demonstrate that TCA-SpMM achieves up to 29.58× speedup over state-of-the-art SpMM implementations optimized with TCs. Full article

Convolutional neural network (CNN) hardware acceleration is critical to improve the performance and facilitate the deployment of CNNs in edge applications. Due to its efficiency and simplicity, channel group parallelism has become a popular method for CNN hardware acceleration. However, when processing data involving small channels, there will be a mismatch between feature data and computing units, resulting in a low utilization of the computing units. When processing the middle layer of the convolutional neural network, the mismatch between the feature-usage order and the feature-loading order leads to a low input feature cache hit rate. To address these challenges, this paper proposes an innovative method inspired by data reordering technology, aiming to achieve CNN hardware acceleration that reuses the same multiplier resources. This method focuses on transforming the hardware acceleration process into feature organization, feature block scheduling and allocation, and feature calculation subtasks to ensure the efficient mapping of continuous loading and the calculation of feature data. Specifically, this paper introduces a convolutional algorithm mapping strategy and a configurable vector operation unit to enhance multiplier utilization for different feature map sizes and channel numbers. In addition, an off-chip address mapping and on-chip cache management mechanism is proposed to effectively improve the feature access efficiency and on-chip feature cache hit rate. Furthermore, a configurable feature block scheduling policy is proposed to strike a balance between weight reuse and feature writeback pressure. Experimental results demonstrate the effectiveness of this method. When using 512 multipliers and accelerating VGG16 at 100 MHz, the actual computing performance reaches 102.3 giga operations per second (GOPS). Compared with other CNN hardware acceleration methods, the average computing array utilization is as high as 99.88% and the computing density is higher. Full article

Artificial intelligence (AI) is advancing across technology domains including healthcare, commerce, the economy, the environment, cybersecurity, transportation, etc. AI will transform healthcare systems, bringing profound changes to diagnosis, treatment, patient care, data, medicines, devices, etc. However, AI in healthcare introduces entirely new categories of risk for assessment, management, and communication. For this topic, the framing of conventional risk and decision analyses is ongoing. This paper introduces a method to quantify risk as the disruption of the order of AI initiatives in healthcare systems, aiming to find the scenarios that are most and least disruptive to system order. This novel approach addresses scenarios that bring about a re-ordering of initiatives in each of the following three characteristic layers: purpose, structure, and function. In each layer, the following model elements are identified: 1. Typical research and development initiatives in healthcare. 2. The ordering criteria of the initiatives. 3. Emergent conditions and scenarios that could influence the ordering of the AI initiatives. This approach is a manifold accounting of the scenarios that could contribute to the risk associated with AI in healthcare. Recognizing the context-specific nature of risks and highlighting the role of human in the loop, this study identifies scenario s.06—non-interpretable AI and lack of human–AI communications—as the most disruptive across all three layers of healthcare systems. This finding suggests that AI transparency solutions primarily target domain experts, a reasonable inclination given the significance of “high-stakes” AI systems, particularly in healthcare. Future work should connect this approach with decision analysis and quantifying the value of information. Future work will explore the disruptions of system order in additional layers of the healthcare system, including the environment, boundary, interconnections, workforce, facilities, supply chains, and others. Full article

With the development of the digital and intelligent transformation of the power grid, the structure and operation and maintenance technology of the power grid are constantly updated, which leads to problems such as difficulties in information acquisition and screening. Therefore, we propose a recommendation method for power knowledge retrieval based on a graph neural network (RPKR-GNN). The method first uses a graph neural network to learn the network structure information of the power fault knowledge graph and realize the deep semantic embedding of power entities and relations. After this, it fuses the power knowledge graph paths to mine the potential power entity relationships and completes the power fault knowledge graph through knowledge inference. At the same time, we combine the user retrieval behavior features for knowledge aggregation to form a personal subgraph, and we analyze the user retrieval subgraph by matching the similarity of retrieval keyword features. Finally, we form a fusion subgraph based on the subgraph topology and reorder the entities of the subgraph to generate a recommendation list for the target users for the prediction of user retrieval intention. Through experimental comparison with various classical models, the results show that the models have a certain generalization ability in knowledge inference. The method performs well in terms of the MR and Hit@10 indexes on each dataset, and the F1 value can reach 87.3 in the retrieval recommendation effect, which effectively enhances the automated operation and maintenance capability of the power system. Full article

Contrastive learning techniques make it possible to pretrain a general model in a self-supervised paradigm using a large number of unlabeled remote sensing images. The core idea is to pull positive samples defined by data augmentation techniques closer together while pushing apart randomly sampled negative samples to serve as supervised learning signals. This strategy is based on the strict identity hypothesis, i.e., positive samples are strictly defined by each (anchor) sample’s own augmentation transformation. However, this leads to the over-instancing of the features learned by the model and the loss of the ability to fully identify ground objects. Therefore, we proposed a relaxed identity hypothesis governing the feature distribution of different instances within the same class of features. The implementation of the relaxed identity hypothesis requires the sampling and discrimination of the relaxed identical samples. In this study, to realize the sampling of relaxed identical samples under the unsupervised learning paradigm, the remote sensing image was used to show that nearby objects often present a large correlation; neighborhood sampling was carried out around the anchor sample; and the similarity between the sampled samples and the anchor samples was defined as the semantic similarity. To achieve sample discrimination under the relaxed identity hypothesis, the feature loss was calculated and reordered for the samples in the relaxed identical sample queue and the anchor samples, and the feature loss between the anchor samples and the sample queue was defined as the feature similarity. Through the sampling and discrimination of the relaxed identical samples, the leap from instance-level features to class-level features was achieved to a certain extent while enhancing the network’s invariant learning of features. We validated the effectiveness of the proposed method on three datasets, and our method achieved the best experimental results on all three datasets compared to six self-supervised methods. Full article

This article addresses a novel methodology for the utilization of Field Programmable Gate Array (FPGA) accelerators in on-board Synthetic Aperture Radar (SAR) processing routines. The methodology consists of using High-Level Synthesis (HLS) to create Intellectual property (IP) blocks and using the Reusable Integration Framework for FPGA Accelerators (RIFFA) to develop a Peripheral Component Interconnect express (PCIe) interface between the Central Processing Unit (CPU) and the FPGA, attaining transfer rates up to 15.7 GB/s. HLS and RIFFA reduce development time (between fivefold and tenfold) by using high-level programming languages (e.g., C/C++); moreover, HLS provides optimizations like pipeline, cyclic partition, and unroll. The proposed schematic also has the advantage of being highly flexible and scalable since the IPs can be exchanged to perform different processing routines, and since RIFFA allows employing up to five FPGAs, multiple IPs can be implemented in each FPGA. Since Fast Fourier Transform (FFT) is one of the main functions in SAR processing, we present a FPGA accelerator in charge of the reordering stage of VEC-FFT (an optimized version of FFT) as a proof of concept. Results are retrieved in reversed bit order, and the conventional reordering function may consume more than half of the total clock cycles. Next, to demonstrate flexibility, an IP for matrix transposition is implemented, another computationally expensive process in SAR due to memory access. Full article