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Keywords = a-InGaZnO

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8 pages, 2729 KiB  
Communication
Origin of the High Density of Oxygen Vacancies at the Back Channel of Back-Channel-Etched a-InGaZnO Thin-Film Transistors
by Shimin Ge, Juncheng Xiao, Shan Li, Dong Yuan, Yuhua Dong and Shengdong Zhang
Micromachines 2024, 15(3), 400; https://doi.org/10.3390/mi15030400 - 16 Mar 2024
Cited by 3 | Viewed by 2128
Abstract
This study reveals the pronounced density of oxygen vacancies (Vo) at the back channel of back-channel-etched (BCE) a-InGaZnO (a-IGZO) thin-film transistors (TFTs) results from the sputtered deposition rather than the wet etching process of the source/drain metal, and they are distributed within approximately [...] Read more.
This study reveals the pronounced density of oxygen vacancies (Vo) at the back channel of back-channel-etched (BCE) a-InGaZnO (a-IGZO) thin-film transistors (TFTs) results from the sputtered deposition rather than the wet etching process of the source/drain metal, and they are distributed within approximately 25 nm of the back surface. Furthermore, the existence and distribution depth of the high density of Vo defects are verified by means of XPS spectra analyses. Then, the mechanism through which the above Vo defects lead to the instability of BCE a-IGZO TFTs is elucidated. Lastly, it is demonstrated that the device instability under high-humidity conditions and negative bias temperature illumination stress can be effectively alleviated by etching and thus removing the surface layer of the back channel, which contains the high density of Vo defects. In addition, this etch method does not cause a significant deterioration in the uniformity of electrical characteristics and is quite convenient to implement in practical fabrication processes. Thus, a novel and effective solution to the device instability of BCE a-IGZO TFTs is provided. Full article
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11 pages, 3622 KiB  
Article
Electrical Stability Modeling Based on Surface Potential for a-InGaZnO TFTs under Positive-Bias Stress and Light Illumination
by Xiaoming Huang, Wei Cao, Chenyang Huang, Chen Chen, Zheng Shi and Weizong Xu
Micromachines 2023, 14(4), 842; https://doi.org/10.3390/mi14040842 - 13 Apr 2023
Cited by 4 | Viewed by 1898
Abstract
In this work, an electrical stability model based on surface potential is presented for amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) under positive-gate-bias stress (PBS) and light stress. In this model, the sub-gap density of states (DOSs) are depicted by exponential band tails [...] Read more.
In this work, an electrical stability model based on surface potential is presented for amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) under positive-gate-bias stress (PBS) and light stress. In this model, the sub-gap density of states (DOSs) are depicted by exponential band tails and Gaussian deep states within the band gap of a-IGZO. Meanwhile, the surface potential solution is developed with the stretched exponential distribution relationship between the created defects and PBS time, and the Boltzmann distribution relationship between the generated traps and incident photon energy, respectively. The proposed model is verified using both the calculation results and experimental data of a-IGZO TFTs with various distribution of DOSs, and a consistent and accurate expression of the evolution of transfer curves is achieved under PBS and light illumination. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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12 pages, 15037 KiB  
Article
An Analytical Surface Potential and Effective Charge Density Approach Based Drain Current Model for Amorphous InGaZnO Thin-Film Transistors
by Zhaoxu Song, Shichun Wang, Yujie Han, Gongyi Huang and Chuanzhong Xu
Coatings 2023, 13(2), 423; https://doi.org/10.3390/coatings13020423 - 13 Feb 2023
Cited by 1 | Viewed by 2152 | Correction
Abstract
An analytical surface-potential-based drain current model for amorphous indium–gallium–zinc–oxide (a-InGaZnO) thin film transistors (TFTs) is proposed by introducing an effective charge density approach in this paper. This approach gives two initial approximate values of the effective state density and the effective thermal voltage [...] Read more.
An analytical surface-potential-based drain current model for amorphous indium–gallium–zinc–oxide (a-InGaZnO) thin film transistors (TFTs) is proposed by introducing an effective charge density approach in this paper. This approach gives two initial approximate values of the effective state density and the effective thermal voltage by using the dominant state of the free charge density in total charge density, and then obtains a high-precision one-exponent equivalent transformation for three-exponent total charge density. Based on this approach, we have solved the problem that the physical meaning of the transition area in the regional method is not clear and a one-piece analytical surface potential solution to Poisson’s equation is successfully derived. Furthermore, the drain current is also explicitly derived from the charge sheet model and I-V characteristics of a-InGaZnO TFTs are reproduced from the above obtained model. Finally, accurate and effective surface-potential model and drain current model are obtained and verified by experimental data, respectively. Good verification results prove that the proposed model could become an accurate and suitable tool for being embedded into a circuit simulation. Full article
(This article belongs to the Section Corrosion, Wear and Erosion)
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12 pages, 3484 KiB  
Article
One-Step Synergistic Treatment Approach for High Performance Amorphous InGaZnO Thin-Film Transistors Fabricated at Room Temperature
by Chunlan Wang, Yuqing Li, Yebo Jin, Gangying Guo, Yongle Song, Hao Huang, Han He and Aolin Wang
Nanomaterials 2022, 12(19), 3481; https://doi.org/10.3390/nano12193481 - 5 Oct 2022
Cited by 3 | Viewed by 2173
Abstract
Amorphous InGaZnO (a-InGaZnO) is currently the most prominent oxide semiconductor complement to low-temperature polysilicon for thin-film transistor (TFT) applications in next-generation displays. However, balancing the transmission performance and low-temperature deposition is the primary obstacle in the application of a-InGaZnO TFTs in the field [...] Read more.
Amorphous InGaZnO (a-InGaZnO) is currently the most prominent oxide semiconductor complement to low-temperature polysilicon for thin-film transistor (TFT) applications in next-generation displays. However, balancing the transmission performance and low-temperature deposition is the primary obstacle in the application of a-InGaZnO TFTs in the field of ultra-high resolution optoelectronic display. Here, we report that a-InGaZnO:O TFT prepared at room temperature has high transport performance, manipulating oxygen vacancy (VO) defects through an oxygen-doped a-InGaZnO framework. The main electrical properties of a-InGaZnO:O TFTs included high field-effect mobility (µFE) of 28 cm2/V s, a threshold voltage (Vth) of 0.9 V, a subthreshold swing (SS) of 0.9 V/dec, and a current switching ratio (Ion/Ioff) of 107; significant improvements over a-InGaZnO TFTs without oxygen plasma. A possible reason for this is that appropriate oxygen plasma treatment and room temperature preparation technology jointly play a role in improving the electrical performance of a-InGaZnO TFTs, which could not only increase carrier concentration, but also reduce the channel-layer surface defects and interface trap density of a-InGaZnO TFTs. These provides a powerful way to synergistically boost the transport performance of oxide TFTs fabricated at room temperature. Full article
(This article belongs to the Special Issue Nanomaterials Processing for High Performance Thin-Film Transistors)
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14 pages, 7460 KiB  
Article
The Fabrication of Indium–Gallium–Zinc Oxide Sputtering Targets with Various Gallium Contents and Their Applications to Top-Gate Thin-Film Transistors
by Tsung-Cheng Tien, Jyun-Sheng Wu, Tsung-Eong Hsieh and Hsin-Jay Wu
Coatings 2022, 12(8), 1217; https://doi.org/10.3390/coatings12081217 - 19 Aug 2022
Cited by 5 | Viewed by 2672
Abstract
We prepared amorphous indium–gallium–zinc oxide (a-IGZO) thin films with various Ga content ratios and investigated their feasibility as the active channel layers of top-gate thin-film transistors (TFT). First, the 2-inch IGZO sputtering targets with stoichiometric ratios of InGaZn2O5 [...] Read more.
We prepared amorphous indium–gallium–zinc oxide (a-IGZO) thin films with various Ga content ratios and investigated their feasibility as the active channel layers of top-gate thin-film transistors (TFT). First, the 2-inch IGZO sputtering targets with stoichiometric ratios of InGaZn2O5, InGaZnO4, and InGa2ZnO5.5 were fabricated using In2O3, Ga2O3, and ZnO oxide powders as raw materials via sintering treatments at temperatures ranging from 900 °C to 1300 °C for 6 h or 8 h. X-ray diffraction analysis indicated that the InGaZn2O5 and InGaZnO4 targets are single-phase structures whereas the InGa2ZnO5.5 target is a two-phase structure. Hall effect measurement indicated that the a-InGaZn2O5 and a-InGaZnO4 layers possess a carrier concentration (N) of about 1019 cm−3 and a resistivity (ρ) of about 10−2 Ω·cm; however, the N of the a-InGa2ZnO5.5 layer is only 1017 cm−3, and the ρ is about 1 to 4 Ω·cm. Moreover, the a-InGaZn2O5 layer exhibited the highest Hall-effect mobility (μHall) of 21.17 cm2·V−1·sec−1. This indicated that the impedance of Ga3+ ions to carrier migration is the main factor affecting the electrical properties of a-IGZO layers. Ga content in the a-IGZO channel similarly affects the performance of the TFT devices prepared in this study. The annealing at 300 °C for 1 h in an ambient atmosphere was found to significantly improve the electrical properties of the TFT devices. The best performance was observed in the a-InGaZnO4 TFT sample subjected to post-annealing at 300 °C with Vth = −0.85 V, μFE = 8.46 cm2, V−1·sec−1, SS = 2.31, V·decade−1, and Ion/Ioff = 2.9 × 104. Full article
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8 pages, 2641 KiB  
Article
Compact Integration of Hydrogen–Resistant a–InGaZnO and Poly–Si Thin–Film Transistors
by Yunping Wang, Yuheng Zhou, Zhihe Xia, Wei Zhou, Meng Zhang, Fion Sze Yan Yeung, Man Wong, Hoi Sing Kwok, Shengdong Zhang and Lei Lu
Micromachines 2022, 13(6), 839; https://doi.org/10.3390/mi13060839 - 27 May 2022
Cited by 10 | Viewed by 4654
Abstract
The low–temperature poly–Si oxide (LTPO) backplane is realized by monolithically integrating low–temperature poly–Si (LTPS) and amorphous oxide semiconductor (AOS) thin–film transistors (TFTs) in the same display backplane. The LTPO–enabled dynamic refreshing rate can significantly reduce the display’s power consumption. However, the essential hydrogenation [...] Read more.
The low–temperature poly–Si oxide (LTPO) backplane is realized by monolithically integrating low–temperature poly–Si (LTPS) and amorphous oxide semiconductor (AOS) thin–film transistors (TFTs) in the same display backplane. The LTPO–enabled dynamic refreshing rate can significantly reduce the display’s power consumption. However, the essential hydrogenation of LTPS would seriously deteriorate AOS TFTs by increasing the population of channel defects and carriers. Hydrogen (H) diffusion barriers were comparatively investigated to reduce the H content in amorphous indium–gallium–zinc oxide (a–IGZO). Moreover, the intrinsic H–resistance of a–IGZO was impressively enhanced by plasma treatments, such as fluorine and nitrous oxide. Enabled by the suppressed H conflict, a novel AOS/LTPS integration structure was tested by directly stacking the H–resistant a–IGZO on poly–Si TFT, dubbed metal–oxide–on–Si (MOOS). The noticeably shrunken layout footprint could support much higher resolution and pixel density for next–generation displays, especially AR and VR displays. Compared to the conventional LTPO circuits, the more compact MOOS circuits exhibited similar characteristics. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Transistors)
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7 pages, 1763 KiB  
Article
Influence of N2/O2 Partial Pressure Ratio during Channel Layer Deposition on the Temperature and Light Stability of a-InGaZnO TFTs
by Xiaoming Huang, Dong Zhou and Weizong Xu
Appl. Sci. 2019, 9(9), 1880; https://doi.org/10.3390/app9091880 - 8 May 2019
Cited by 6 | Viewed by 3993
Abstract
The electrical characteristics of amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) deposited with different N2/O2 partial pressure ratios (PN/O) are investigated. It is found that the device with 20% PN/O exhibits enhanced electrical stability after positive-bias-stress temperature [...] Read more.
The electrical characteristics of amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) deposited with different N2/O2 partial pressure ratios (PN/O) are investigated. It is found that the device with 20% PN/O exhibits enhanced electrical stability after positive-bias-stress temperature (PBST) and negative-bias-stress illumination (NBSI), presenting decreased threshold voltage drift (ΔVth). Compared to the N-free TFT, the average effective interface barrier energy (Eτ) of the TFT with 20% PN/O is increased from 0.37 eV to 0.57 eV during the bias-stress process, which agrees with the suppressed ΔVth from 3.0 V to 1.12 V after the PBS at T = 70 °C. X-ray photoelectron spectroscopy analysis revealed that the enhanced stability of the a-IGZO TFT with 20% PN/O should be ascribed to the control of oxygen vacancy defects at the interfacial region. Full article
(This article belongs to the Special Issue Oxide Thin Film Transistors)
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