Comparative Study of Voltage Amplification in Cylindrical FE-FE-DE and FE-DE Heterostructures

Abstract

This work examines a cylindrical FE-DE heterostructure and compares its performance with that of a cylindrical FE-FE-DE heterostructure. It aims to maximize voltage amplification, increase capacitance, and attain a constant negative capacitance. First, the existence of negative capacitance is shown by analyzing isolated cylindrical ferroelectric capacitors. A cylindrical dielectric capacitor and a cylindrical ferroelectric capacitor are integrated in series to stabilize negative capacitance. Our results indicate that the capacitance of the FE-FE-DE stack, consisting of ${Si:HfO}_2$ and ${Zr:HfO}_2$, closely aligns with the dielectric capacitance. Consequently, enhanced performance is anticipated in comparison with the FE-DE arrangement. Additionally, the dynamic response of two distinct configurations was analyzed, yielding a comprehensive understanding of these heterostructures’ behavior.

1. Introduction

The continuous scaling of electronic devices has driven the search for novel materials and device architectures that can overcome the fundamental limitations of conventional field-effect transistors, in terms of power consumption and switching efficiency. Ferroelectric materials that possess spontaneous polarization can be polarized even in the absence of an electric field. Spontaneous polarization is due to the non-Centro symmetry in the crystal lattice of the ferroelectric material. In ferroelectric materials, non-centrosymmetry is also essential for generating ferroelectricity and negative capacitance [1]. Ferroelectricity was discovered experimentally 100 years ago. Rochelle salt and potassium dihydrogen phosphate are ferroelectric materials for which initial experiments were performed. Since they are fragile and water-soluble, they cannot be used for various applications. Perovskite materials, typically represented by the general formula ${ABO}_3$, are well known for exhibiting ferroelectric properties. In this structure, $A$ denotes a di or monovalent atom, $B$ refers to a trivalent or tetravalent atom, and $O$ represents the oxygen atom [2,3]. These materials usually crystallize in a tetragonal lattice structure, characterized by one lattice parameter being longer than the other two, while all interaxial angles remain at 90 degrees within the unit cell [4,5]. Power dissipation has emerged as a critical concern in contemporary times [6]. The faster scaling of the complementary metal-oxide-semiconductor (CMOS) sector has resulted in greater power loss, mostly as a result of the reduced feature size regulation [7,8]. Since dynamic power dissipation is proportional to the square of the supply voltage $\left(P_{dyn}\propto V_{DD}^2\right)$ lowering the supply voltage is one practical way to mitigate these problems [9]. Lowering the supply voltage, however, also lowers the ON current, which decreases the transistor speed $I_{on}\propto {\left(V_{DD}-V_T\right)}^{\alpha }$. To maintain sufficient ON current and operating speed, the threshold voltage $V_T$ must be reduced. Unfortunately, lowering the threshold voltage increases the OFF current ($I_{OFF}\propto {10}^{-V_T/SS}$), which raises the static power dissipation of the transistor $\left(P_{OFF}\propto I_{OFF}\right).$ Effectiveness and power dissipation are always traded off, according to this contradictory criterion [7,8]. The inherent 60 mV/decade limit of the subthreshold swing makes it difficult to reduce the operating voltage even while transistor dimensions continue to decrease as CMOS technology advances [10,11]. The negative capacitance (NC) characteristic of ferroelectric materials facilitates a decrease in the subthreshold swing (SS) [12]. Landau’s phenomenological theory can be used to explain the nonlinear polarization response of ferroelectric materials, which gives rise to the idea of negative capacitance. The ferroelectric system may show an unstable area when the differential capacitance turns negative in the polarization–electric field (P–E) curve, according to the Landau free energy expansion. When properly stabilized by a dielectric or semiconductor layer, this region, which represents a section of the energy profile with negative curvature, offers the possibility of voltage amplification. The dynamic polarization behavior is frequently modelled using the Landau–Khalatnikov (L–K) equation, which enables a thorough analysis of the transient and steady-state properties of ferroelectric capacitors. The theoretical basis for comprehending how negative capacitance can lower the subthreshold swing below the typical thermionic limit of 60 mV/decade is provided by such modeling frameworks [10]. Ferroelectric oxide can reduce the SS below 60 mV/decade when used as the gate oxide [13]. Ferroelectric materials are a special type of dielectric that can maintain their polarization even after the electric field is removed. The thing that makes them even more fascinating is that their dipole direction can be altered by employing an external field [14]. Ferroelectricity is the term used to describe the capacity of some dielectrics to exhibit spontaneous polarization that can be reversed by an applied electric field (E). Ferroelectric materials experience a phase transition at a particular temperature known as the Curie temperature $\left({\mathit{T}}_{\mathit{C}}\right)$. They naturally acquire electric polarization, without needing an external electric field. At or below this temperature, the crystal structure shifts from an ordered to a disordered phase. However, above the Curie temperature, the material can only become polarized when an external electric field is applied. This means ferroelectric materials spontaneously polarize below the Curie temperature [15]. Ferroelectric materials present a viable remedy for the widespread challenge of power dissipation faced in contemporary times [16,17]. The Incorporation of ferroelectric layers enables negative capacitance field effect transistor (NCFETs) to sustain elevated on-current while markedly diminishing the off-current, resulting in decreased power consumption [9,18]. Although negative capacitance was not first visible through experimentation, a recent study verified its existence. Khan et al. [19] reported direct observation of negative capacitance in a thin ferroelectric sheet. Later research revealed sub-60 mV/decade switching and differential voltage amplification when ferroelectric capacitors were correctly connected to dielectric/MOS stacks [19]. Studying negative capacitance is essential because it can be used to reduce power dissipation by amplifying voltage [20]. Recent studies have further expanded the understanding of negative capacitance and ferroelectric integration in advanced device geometries. A ferroelectric layer was included between the gate and oxide in the cylindrical ferroelectric dual-metal nanowire FET suggested by Kaul et al. through Landau–Khalatnikov-based modeling. Their work showed that the negative capacitance effect of the ferroelectric layer causes intrinsic voltage amplification, which significantly reduces the gate-induced drain leakage (GIDL) and improves subthreshold characteristics [21]. Wang et al. engineered a van der Waals metal–ferroelectric–metal–insulator–semiconductor (MFMIS) architecture using CuInP₂S₆ (CIPS) and reported sub-60 mV dec⁻¹ switching, an enhanced memory window, and long-term retention stability. These investigations collectively highlight the breadth of device configurations, ranging from cylindrical ferroelectric capacitors to 2D van der Waals heterostructures, that successfully exploit the negative capacitance phenomenon for improved voltage amplification, leakage suppression, and overall device performance [22]. Negative capacitance research has led to new developments in memory and neuromorphic computing beyond traditional transistors. Ferroelectric tunnel junctions (FTJs) and ferroelectric-based non-volatile memory (FeRAMs) use the polarization switching properties for fast, low-power data storage. Similarly, the analogue tunability of polarization states is being studied for artificial junctions in neuromorphic systems, where non-volatility and energy efficiency are critical. In line with the objectives of next-generation low-power electronics, integrating ferroelectric and dielectric heterostructures into these systems offers a viable solution to integrate memory and logic functions inside a single device framework. New geometric structures, new materials, and new technologies are needed to scale conventional MOSFETs and enhance gate control over the channel [23]. Emerging device structures employ multigate geometries such as dual-gate, tri-gate, and gate-all-around configurations to enhance channel control and suppress short-channel effects [24]. Among these materials, the nanotube structure exhibits superior performance compared with its planar counterparts, owing to its larger effective gate area and improved charge control around the channel [25,26,27]. Since the cylindrical FE-DE heterostructure controls the fundamental physics of the negative capacitance-enabled nanotube, this motivates us to research it [28]. In the development of negative capacitance field-effect transistors (NCFETs), traditional ferroelectric materials such as lead zirconium titanate $\left(PZT\right)$, barium titanate ${BaTiO}_3$, and strontium bismuth tantalate $\left(SBT\right)$ were initially incorporated because of their strong ferroelectric properties. However, these materials present significant challenges, including health and environmental concerns associated with lead $\left(Pb\right)$ content, the need for relatively thick films to achieve robust ferroelectricity, and limitations arising from their small bandgaps. Conventional ferroelectric materials suffer from drawbacks such as high processing temperatures and incompatibility with CMOS technology, which hinders their widespread adoption in advanced electronic devices [29,30]. In contrast, hafnium oxide based ferroelectric materials have attracted considerable attention because they are lead-free, CMOS-compatible, and retain ferroelectricity even at nanometer-scale thicknesses. Modern electronic device design greatly benefits from the investigation of ferroelectric materials and their negative capacitance behavior [31]. Ferroelectrics can overcome the fundamental constraint of subthreshold swing when included in field-effect transistor topologies, allowing for low-voltage operation and increased energy efficiency [32]. Ferroelectric-based devices are therefore being actively investigated for implementation in advanced integrated circuits for low-power computing applications and negative capacitance field-effect transistors (NCFETs) [33,34]. As a result, doped ${HfO}_2$ has become a focal point for research and development in NCFET technology, offering a more sustainable and scalable pathway for next-generation low-power electronics [7,35,36]. Studies on cylindrical heterostructures are still limited despite a great deal of study on planar and gate-all-around ferroelectric transistors. Compared to its planar equivalents, cylindrical designs provide improved electrostatic control, higher gate capacitance, and less short-channel effects. This study attempts to clarify how interlayer coupling between stacked ferroelectrics affects voltage amplification and stability by expanding our earlier investigation of FE–DE heterostructures to a FE-FE-DE configuration. The anisotropy constants and voltage gain characteristics for both configurations are recovered using Landau–Khalatnikov-based simulations, offering fresh perspectives on the development of optimized negative capacitance devices for upcoming energy-efficient applications [37]. Our previous work focused on a cylindrical FE–DE heterostructure. In this study, we extend the analysis to an FE-FE-DE configuration by stacking two ferroelectric layers to explore the influence of interlayer coupling on voltage amplification and negative capacitance behavior [38]. In this study, we investigate cylindrical FE-DE heterostructure and compare its performance with that of a cylindrical FE-FE-DE heterostructure. For the FE-DE configuration, $Zr$-doped ${HfO}_2$ and $Si$-doped ${HfO}_2$ materials are considered ferroelectric materials with thicknesses of 10 nm each. In the FE-FE-DE stack, a combination of ${Si:HfO}_2$ and ${Zr:HfO}_2$ is used, each with thickness of 5 nm. ${SiO}_2$ makes up the dielectric layer, which has a dielectric constant of 3.9 and a thickness of 1 nm. The

Table 1. Anisotropy constants.

FE Material	$\mathit{\alpha }(1/\mathit{F})$	$\mathit{\beta }(1/\mathit{F}{\mathit{C}}^2)$
${\mathit{Z}\mathit{r}:\mathit{H}\mathit{f}\mathit{O}}_2(10 \mathbf{n}\mathbf{m})$	${-9.69\times 10}^{15}$	${2.85\times 10}^{47}$
${\mathit{S}\mathit{i}:\mathit{H}\mathit{f}\mathit{O}}_2(10 \mathbf{n}\mathbf{m})$	${-6.18\times 10}^{15}$	${9.11\times 10}^{46}$
${\mathit{S}\mathit{i}:\mathit{H}\mathit{f}\mathit{O}}_2(5 \mathbf{n}\mathbf{m})$	${-4.32\times 10}^{15}$	${8.60\times 10}^{46}$
${\mathit{Z}\mathit{r}:\mathit{H}\mathit{f}\mathit{O}}_2(5 \mathbf{n}\mathbf{m})$	${-2.91\times 10}^{15}$	${1.58\times 10}^{46}$

below provides the anisotropy constants after the mathematical equations have been solved in MATLAB R2023b.

2. Results and Discussion

2.1. An Isolated Cylindrical FE Capacitor

The equation describes the relationship between the charge on the ferroelectric capacitor and the voltage across the ferroelectric material in a stable state, according to the Landau–Khalatnikov (LK) framework.

$$V_{FE}=\alpha Q_{FE}+\beta Q_{FE}^3+{\gamma Q}_{FE}^5$$

(1)

Here, $V_{FE}$ represents the voltage across the ferroelectric capacitor, and $Q_{FE}$ represents the charge. The anisotropy coefficients for ferroelectric materials are represented by the constants $\alpha$, $\beta$, and γ.

$${\alpha }_{\mathrm{o}}={\displaystyle \frac{-3\sqrt{3}}{2}}{\displaystyle \frac{Vc}{Q_{\mathrm{o}}}} and {\beta }_{\mathrm{o}}={\displaystyle \frac{3\sqrt{3}}{2}}{\displaystyle \frac{Vc}{Q_{\mathrm{o}}^3}}$$

$$\alpha ={\displaystyle \frac{{\alpha }_{\mathrm{o}}}{2\pi L}}\mathit{ln}\left({\displaystyle \frac{r_2}{r_1}}\right) and \beta ={\displaystyle \frac{{\beta }_{\mathrm{o}}}{16{\pi }^3{L}^3}}\left({\displaystyle \frac{1}{r_1^2}}-{\displaystyle \frac{1}{r_2^2}}\right)$$

where $V_C$ is the coercive voltage and where $Q_{\mathrm{o}}$ is the remanent charge in the ferroelectric material, with $r_1$ and $r_2$ representing the inner and outer radii, respectively. Figure 1a shows a representation of an isolated cylindrical FE capacitor. By solving Equation (1), the charge–voltage (Q-V) characteristics of the ferroelectric material can be obtained, as illustrated in Figure 1b. The negative slope of the Q-V curve shows that the charge decreases as the voltage increases, verifying that the ferroelectric material has a negative capacitance. The free energy $U$ of a ferroelectric material can be expressed as follows:

$$U_{FE}={\displaystyle \frac{\alpha }{2}}{Q}_{FE}^2+{\displaystyle \frac{\beta }{4}}{Q}_{FE}^4+{\displaystyle \frac{\gamma }{6}}{Q}_{FE}^6,$$

(2)

Figure 1c displays the energy versus charge of a single cylindrical ferroelectric capacitor. The energy profile for each ferroelectric material under consideration has an inverted parabolic shape, indicating the presence of a zone of negative capacitance. This state is fundamentally unstable, as illustrated by the analogy of placing a charge at the apex of the parabola. It automatically travels toward one of the energy minima. This behavior demonstrates the NC state’s intrinsic instability in the isolated cylindrical FE capacitor. A cylindrical DE capacitor connected in series with the FE capacitor, however, can counteract this instability and stabilize the entire system.

2.2. Cylindrical FE-DE and FE-FE-DE Heterostructure

Figure 2 clearly shows that a cylindrical dielectric capacitor and a cylindrical ferroelectric capacitor are connected in line. If the dielectric capacitance meets the criterion ($C_D< -1/\alpha )$, where α is the ferroelectric anisotropy constant, this series setup can stabilize the intrinsically unstable negative capacitance behavior of an isolated ferroelectric material. Notably, considerable voltage amplification can be achieved when the ferroelectric and dielectric capacitance magnitudes are similar. The capacitance vs. charge characteristics of the cylindrical heterostructure are shown in Figure 3a. The capacitance of the FE-FE-DE stack, composed of ${Si:HfO}_2$ and ${Zr:HfO}_2$, nearly coincides with the dielectric capacitance. Thus, it is anticipated to provide better performance than $Zr$-doped $Hf{O}^2$ and $Si$-doped $Hf{O}^2$ in the FE-DE configuration. Conversely, the dielectric layer’s capacitance ($C_{FE}<C_{DE})$ is greater than that of a ferroelectric material ${Zr:HfO}_2$. Owing to the tendency to exhibit hysteresis, this FE-DE combination was disregarded for additional examination. The dielectric and ferroelectric capacitors share the charge since they are connected in series. On the basis of Kirchhoff’s voltage law, the total applied voltage ${(V}_S)$ the sum of the voltage drop across the ferroelectric ($V_{FE})$ and dielectric ($V_{DE})$ capacitors, expressed as $V_S=V_{FE}+V_{DE}$

$${\mathit{V}}_{\mathit{S}}=\mathit{\alpha }{\mathit{Q}}_{\mathit{F}\mathit{E}}+\mathit{\beta }{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{3}}+{\mathit{\gamma }\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{5}}+{\displaystyle \frac{{\mathit{Q}}_{\mathit{F}\mathit{E}}}{{\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(3)

Figure 3b displays the charge versus voltage features of the FE-DE and FE-FE-DE combinations. Since the graph does not have a negative slope, the heterostructure functions in a stable, positive capacitance domain. The ferroelectric and dielectric capacitors build up an equal amount of charge since they are connected in series. Therefore, the sum of the energies stored in the individual ferroelectric and dielectric capacitors equals the overall energy stored in the heterostructure for a given charge.

$${\mathit{U}}_{\mathit{T}}={\displaystyle \frac{\mathit{\alpha }}{\mathbf{2}}}{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{2}}+{\displaystyle \frac{\mathit{\beta }}{\mathbf{4}}}{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{4}}+{\displaystyle \frac{\mathit{\gamma }}{\mathbf{6}}}{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{6}}+{\displaystyle \frac{{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{2}}}{{\mathbf{2}\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(4)

Figure 3c shows the energy landscape of the cylindrical FE-DE and FE-FE-DE configurations. The cylindrical ferroelectric–dielectric heterostructures connected in series reduce the total energy of the system and aid in maintaining the negative capacitance (NC) state. The ferroelectric layer’s distinctive double-well energy profile flattens when it is coupled in series with a dielectric capacitor, increasing the heterostructure’s overall capacitance. In the FE-FE-DE configuration, this energy flattening is even more pronounced, indicating a greater enhancement in capacitance than in the FE-DE case, as evident from the graph. Interestingly, when the ferroelectric and dielectric capacitances are almost equal, the cylindrical FE-FE-DE heterostructure exhibits better voltage amplification. Equations (5) and (6) provide the expressions for the capacitance of isolated ferroelectric and dielectric capacitors, respectively.

$${\mathit{C}}_{\mathit{F}\mathit{E}}={\displaystyle \frac{\mathbf{1}}{\mathit{\alpha }+\mathbf{3}\mathit{\beta }{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{2}}}},$$

(5)

$${\mathbf{C}}_{\mathbf{D}\mathbf{E}}={\displaystyle \frac{\mathbf{2}\mathsf{\pi }\mathsf{ϵ}\mathbf{L}}{\left(\mathbf{ln}\frac{{\mathbf{r}}_{\mathbf{3}}}{{\mathbf{r}}_{\mathbf{2}}}\right)}},$$

(6)

The capacitance–voltage characteristics for the FE-DE and FE-FE-DE combinations are shown in Figure 3d. The graph clearly demonstrates that the capacitance of the dielectric (DE) and ferroelectric (FE) layers together is higher than that of the dielectric by itself. Notably, the FE-FE-DE heterostructure results in a higher capacitance than the FE-DE configuration does. This enhancement is possible only when one of the constituent capacitances becomes negative. This behavior appears to contradict conventional circuit theory and electrostatics, which indicates that the equivalent capacitance of two capacitors in series should be less than either of the individual capacitances. Negative capacitance in the ferroelectric layer explains this apparent violation. Equation (7) provides the system’s total capacitance in the cylindrical heterostructure, where the dielectric and ferroelectric layers are coupled in series.

$${\mathit{C}}_{\mathit{T}}={\displaystyle \frac{{\mathit{C}}_{\mathit{F}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}}{{\mathit{C}}_{\mathit{F}\mathit{E}}+{\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(7)

$${\mathit{C}}_{\mathit{T}}={\displaystyle \frac{\frac{{\mathit{C}}_{\mathit{D}\mathit{E}}}{\mathit{\alpha }+{3\mathit{\beta }\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{2}}}}{{\mathit{C}}_{\mathit{D}\mathit{E}}+\frac{\mathbf{1}}{\mathit{\alpha }+{\mathbf{3}\mathit{\beta }\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{2}}}}},$$

(8)

The heterostructure’s total capacitance changes with charge, as shown in Figure 3e. In the FE-FE-DE configuration, the total capacitance reaches its maximum and is found to be greater than that of the dielectric layer alone. As previously mentioned, an essential requirement for voltage amplification is the tight matching of the ferroelectric and dielectric capacitances. The FE-FE-DE heterostructure produces higher voltage amplification, as seen by the plot of the supply voltage against the voltage across the dielectric layer for the FE-DE and FE-FE-DE configurations in Figure 3f.

We compared the voltage amplification of FE–DE planar and FE–DE cylindrical heterostructures from our previous work with the newly proposed FE-FE-DE cylindrical heterostructure. The comparative results are summarized in the

Table 2. Comparison of voltage amplification in planar and cylindrical ferroelectric–dielectric heterostructures.

Configuration	${\mathit{V}}_{\mathit{D}} \mathit{w}\mathit{h}\mathit{e}\mathit{n} {\mathit{V}}_{\mathit{S}}=0.9$ V	% Increment
FE-DE Planar [38]	1.3314	47.93%
FE-DE Cylindrical [38]	1.4827	64.74%
FE-FE-DE Cylindrical	1.5648	73.87%

. From the $V_S$ versus $V_D$ characteristics, it is evident that $V_D$ increases nonlinearly with $V_S$ for all configurations, with the rate of increase being more pronounced in ferroelectric-based heterostructures. For the planar configuration, $V_D$ reaches 1.3314 V at $V_S$ = 0.9 V, corresponding to a 47.93% increment compared to the ideal linear response ($V_D$ = $V_S$). In the case of the FE–DE cylindrical configuration, $V_D$ further rises to 1.4827 V, resulting in a 64.74% enhancement. Notably, the FE-FE-DE cylindrical structure exhibits the highest voltage amplification, achieving $V_D$ = 1.5648 V resulting in 73.87%. These results clearly demonstrate that incorporating multiple ferroelectric layers in a cylindrical geometry significantly improves voltage amplification efficiency compared to planar or single-ferroelectric configurations, making the FE-FE-DE structure a promising candidate for next-generation steep-slope and energy-efficient device applications.

The following formula represents the relationship between the supply voltage $\left({\mathit{V}}_{\mathit{S}}\right)$ and the voltage drop across the dielectric layer $\left({\mathit{V}}_{\mathit{D}}\right)$:

$${\mathit{V}}_{\mathit{D}}={\mathit{V}}_{\mathit{S}}\times {\displaystyle \frac{{|\mathit{C}}_{\mathit{F}\mathit{E}}|}{\left|{\mathit{C}}_{\mathit{F}\mathit{E}}\right|-{\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(9)

According to this equation, the dielectric can experience a voltage drop exceeding the supply voltage when the Fe capacitance $\left(C_{FE}\right)$ is larger than the DE capacitance $\left(C_{DE}\right)$. In such scenarios, even a small variation in $V_S$ can result in a significantly larger change in $V_D$, thereby demonstrating the voltage amplification effect. Furthermore, the amplification becomes more pronounced when $C_{FE}$ approaches $C_{DE}$ closely. Among the configurations investigated, the FE-FE-DE heterostructure results in the highest voltage amplification due to superior capacitance matching and enhanced negative capacitance stabilization. Figure 4a illustrates the differential voltage amplification ${dV}_D/{dV}_S$ as a function of the supply voltage. The figure clearly shows how the amplification varies with $V_S$, with the maximum amplification observed for the FE-FE-DE configuration.

2.3. Dynamic Response of Cylindrical Heterostructure

In this section, Equation (10) is solved to investigate the dynamic behavior of the heterostructure. Although the term ${\rho dQ}_{FE}/dt$ was previously neglected under steady-state conditions, it becomes essential when the system’s transient response is considered. Including this term, the dynamic form of the equation becomes

$${\mathit{V}}_{\mathit{S}}=\mathit{\alpha }{\mathit{Q}}_{\mathit{F}\mathit{E}}+\mathit{\beta }{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{3}}+\mathit{\gamma }{\mathit{Q}}_{\mathit{F}\mathit{E}}^{\mathbf{5}}+\mathit{\rho }{\displaystyle \frac{{\mathit{d}\mathit{Q}}_{\mathit{F}\mathit{E}}}{\mathit{d}\mathit{t}}}+{\displaystyle \frac{{\mathit{Q}}_{\mathit{F}\mathit{E}}}{{\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(10)

The time-dependent charge behavior under a 0.9 V triangular pulse at 100 MHz is shown in Figure 4b for the heterostructure. The charge versus time curves for both the FE-DE and FE-FE-DE configurations indicate a gradual charge accumulation, with the FE-FE-DE configuration achieving a higher maximum charge. Among these two materials, the FE-FE-DE heterostructure demonstrated the greatest charge storage. By substituting $Q_{FE}=Q_{DE}=V_{DE}{C}_{DE}$ into Equation (10), we obtain the following voltage–capacitance relationship:

$${\mathit{V}}_{\mathit{S}}=\mathit{\alpha }{\mathit{V}}_{\mathit{D}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}+\mathit{\beta }{{\mathit{V}}_{\mathit{D}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}}^{\mathbf{3}}+\mathit{\gamma }{{\mathit{V}}_{\mathit{D}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}}^{\mathbf{5}}+\mathit{\rho }{\displaystyle \frac{\mathit{d}{\mathit{V}}_{\mathit{D}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}}{\mathit{d}\mathit{t}}}+{\displaystyle \frac{{\mathit{V}}_{\mathit{D}\mathit{E}}{\mathit{C}}_{\mathit{D}\mathit{E}}}{{\mathit{C}}_{\mathit{D}\mathit{E}}}},$$

(11)

Equation (11) shows that the supply voltage $V_S$ is directly influenced by the dielectric capacitance $C_{DE}$, and hence, voltage amplification is enhanced when $C_{DE}$ is large. Since the FE-FE-DE heterostructure offers the highest capacitance among the considered configurations, it also results in the greatest voltage amplification. The voltage drop across the dielectric as a function of time is shown in Figure 4c. The voltage amplification is consistently higher in the FE-FE-DE heterostructure compared to the FE-DE configuration, indicating its superior dynamic performance.

3. Conclusions

This study proves that the use of a cylindrical FE-FE-DE heterostructure leads to a considerable improvement in the capacitance, voltage amplification, and stability of negative capacitance compared with those of the cylindrical FE-DE configuration evaluated. For the FE-DE configuration, $Zr$-doped $Hf{O}^2$ and $Si$-doped $Hf{O}^2$ are regarded as ferroelectric materials with a thickness of 10 nm each. In the FE-FE-DE stack, a combination of $Si:Hf{O}^2$ and $Zr:Hf{O}^2$ is employed, each with a thickness of 5 nm. This arrangement enhances the static capacitance properties and has greater dynamic responsiveness, indicating its suitability for high-performance low-power electronic applications. The findings verify the efficiency of FE-FE-DE stacks in optimizing ferroelectric–dielectric interactions and attaining near-ideal voltage amplification. The enhanced voltage amplification and stable negative capacitance observed in cylindrical FE-FE-DE heterostructures suggest promising applications in next-generation NCFETs and integrated circuits. These configurations could contribute to achieving a low subthreshold swing, a reduced operating voltage, and improved electrostatic control, making them suitable for high-performance and low-power logic technologies.