Gutiérrez Arance, H.; Fiorini, L.; Valero Biot, A.; Hervás Álvarez, F.; Folgueras, S.; Vico Villalba, C.; Leguina López, P.; Oyanguren Campos, A.; Kholoimov, V.; Svintozelskyi, V.;
et al. Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS). Particles 2025, 8, 63.
https://doi.org/10.3390/particles8030063
AMA Style
Gutiérrez Arance H, Fiorini L, Valero Biot A, Hervás Álvarez F, Folgueras S, Vico Villalba C, Leguina López P, Oyanguren Campos A, Kholoimov V, Svintozelskyi V,
et al. Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS). Particles. 2025; 8(3):63.
https://doi.org/10.3390/particles8030063
Chicago/Turabian Style
Gutiérrez Arance, Héctor, Luca Fiorini, Alberto Valero Biot, Francisco Hervás Álvarez, Santiago Folgueras, Carlos Vico Villalba, Pelayo Leguina López, Arantza Oyanguren Campos, Valerii Kholoimov, Volodymyr Svintozelskyi,
and et al. 2025. "Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS)" Particles 8, no. 3: 63.
https://doi.org/10.3390/particles8030063
APA Style
Gutiérrez Arance, H., Fiorini, L., Valero Biot, A., Hervás Álvarez, F., Folgueras, S., Vico Villalba, C., Leguina López, P., Oyanguren Campos, A., Kholoimov, V., Svintozelskyi, V., & Zhuo, J.
(2025). Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS). Particles, 8(3), 63.
https://doi.org/10.3390/particles8030063
