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J. Imaging 2018, 4(10), 122; https://doi.org/10.3390/jimaging4100122

Accelerating SuperBE with Hardware/Software Co-Design

Embedded Systems Research Group, Department of Electrical and Computer Engineering, The University of Auckland, Auckland 1023, New Zealand
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Received: 11 September 2018 / Revised: 29 September 2018 / Accepted: 16 October 2018 / Published: 18 October 2018
(This article belongs to the Special Issue Image Processing Using FPGAs)
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Abstract

Background Estimation is a common computer vision task, used for segmenting moving objects in video streams. This can be useful as a pre-processing step, isolating regions of interest for more complicated algorithms performing detection, recognition, and identification tasks, in order to reduce overall computation time. This is especially important in the context of embedded systems like smart cameras, which may need to process images with constrained computational resources. This work focuses on accelerating SuperBE, a superpixel-based background estimation algorithm that was designed for simplicity and reducing computational complexity while maintaining state-of-the-art levels of accuracy. We explore both software and hardware acceleration opportunities, converting the original algorithm into a greyscale, integer-only version, and using Hardware/Software Co-design to develop hardware acceleration components on FPGA fabric that assist a software processor. We achieved a 4.4× speed improvement with the software optimisations alone, and a 2× speed improvement with the hardware optimisations alone. When combined, these led to a 9× speed improvement on a Cyclone V System-on-Chip, delivering almost 38 fps on 320 × 240 resolution images. View Full-Text
Keywords: background estimation; image segmentation; System-on-Chip; embedded systems; real-time systems; hardware accelerators background estimation; image segmentation; System-on-Chip; embedded systems; real-time systems; hardware accelerators
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Chen, A.T.-Y.; Gupta, R.; Borzenko, A.; Wang, K.I.-K.; Biglari-Abhari, M. Accelerating SuperBE with Hardware/Software Co-Design. J. Imaging 2018, 4, 122.

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