Strategies for Managing Charge in Electron-Beam Lithography on Glass

Abstract

Optical metasurfaces fabricated via electron beam lithography (EBL) are increasingly pivotal for biosensing and bioimaging applications. However, charge accumulation on insulating glass substrates persists as a critical barrier, causing distortion of the incident electron beam and degradation of patterning fidelity manifested as pattern deflection, increased line-edge roughness (LER), and overlay inaccuracy. Here, we evaluate three charge-mitigation strategies: optimization of electron-beam resist (EBR) thickness, spin-coated conductive polymer layers, and thin metal capping layers. A reduction in EBR thickness from 800 nm to 150 nm led to a significant improvement in LER attributed to a shortened charge dissipation path. The introduction of a conductive polymer further enhanced pattern integrity, whereas the most substantial improvement was attained by depositing a 20 nm Au layer, which offers a highly conductive pathway for rapid charge dissipation and resulted in the lowest LER of 0.24. Our comparison establishes a clear hierarchy of effectiveness and identifies metal capping as the most reliable approach for high-fidelity nanofabrication on insulating substrates, thereby offering practical solutions for advancing glass-based photonic and meta-optical devices.

1. Introduction

Optical metasurfaces, which enable precise manipulation of light at the nanoscale, are increasingly employed in biosensing and bioimaging applications [1,2,3]. The performance of these devices is intrinsically linked to the accuracy of their constituent nanostructures, placing stringent demands on the fabrication technique used. Electron beam lithography (EBL) meets this need as a direct-write, maskless method capable of high-resolution patterning [4,5,6]. By utilizing the exceptionally short wavelength of electrons, EBL avoids the diffraction limits of optical lithography and achieves feature definition with sub-nanometer precision, making it indispensable for applications requiring extreme accuracy [7]. A primary limitation arises, however, when EBL is applied to insulating substrates such as glass, where performance is severely compromised by charge accumulation [8,9]. During exposure, accumulated surface charge deflects the incident electron beam, leading to patterning defects including distortion, increased line-edge roughness (LER), placement errors, and in severe cases, electrostatic discharge damage [10,11,12,13,14]. These adverse effects are further exacerbated by electron scattering and the proximity effect, which collectively degrade the patterning fidelity required for realizing advanced meta-optical devices [15].

Despite the severity of this charging issue, glass substrates remain highly attractive for advanced photonic and sensing applications [16,17,18]. Their excellent optical transparency, low propagation loss, and compatibility with established platforms make them a well-suited, low-loss waveguide material for fabricating photonic integrated circuits and meta-optical systems [19,20]. Consequently, the development of reliable, high-precision EBL processes on glass is essential to unlocking its full potential in these fields. To mitigate charge accumulation on insulating substrates, several strategies have been proposed [21,22,23,24]. These include the deposition of conductive layers, such as thin metal films or transparent conductive oxides, directly onto the substrate to facilitate charge dissipation [21]. Alternative approaches involve replacing conventional glass with conductive substrates like indium tin oxide (ITO) or coating the EBR surface with an ultrathin conductive film (e.g., 3–5 nm aluminum) [22,23]. Additionally, the integration of conductive polymers (e.g., PEDOT:PSS) or anti-static additives into EBR formulations has been explored to enhance intrinsic conductivity [24]. While these methods offer varying degrees of effectiveness in reducing charging effects, they often introduce trade-offs in terms of process complexity, optical performance, patterning resolution, and compatibility with subsequent fabrication steps. Crucially, the absence of systematic comparative studies conducted under standardized experimental conditions has hindered the establishment of clear, application-specific guidelines for selecting and optimizing these charge mitigation strategies.

The underlying cause of these patterning defects is that charge accumulation in EBL fundamentally results from an imbalance between the rates of charge injection and dissipation [25,26,27]. This issue is particularly pronounced on insulating substrates such as glass, where low charge carrier mobility prevents the rapid dispersal of injected electrons, leading to significant surface charge buildup. The severity of accumulation is influenced by several key parameters: electron beam conditions (including current density and exposure time), the quality of electrical contact to the sample stage, and the acceleration voltage [28]. Although employing a high acceleration voltage (e.g., 100 kV) can mitigate charging by allowing electrons to penetrate insulating layers and reach a conductive underlying substrate, as illustrated in Silicon-on-Insulator (SOI) processing, the high cost and limited accessibility of such systems render them impractical for many applications [29,30,31]. Consequently, developing effective charge management strategies for commonly used lower-voltage systems (e.g., 20 kV) remains a critical and persistent need in the field.

In this work, we evaluate the efficacy of three charge-management approaches for EBL on glass through a comparative analysis. The strategies include: EBR thickness optimization, conductive polymer coating, and metal capping layer deposition. Using controlled experiments that evaluate patterning accuracy, line-edge roughness, and process compatibility, we show that reducing the EBR thickness markedly enhances performance by shortening the path for charge dissipation. We further demonstrate that conductive polymers provide a removable, moderate-conductivity alternative, whereas a thin Au capping layer delivers the most efficient charge dissipation, achieving the highest patterning fidelity. Our work defines a roadmap for implementing these strategies and advances a reliable nanofabrication method for insulators, supporting the next generation of glass-based photonic and meta-optical devices.

2. Experimental Equipment

Borosilicate glass substrates (size: 2 cm × 2 cm, resistivity: ~8 Ω·cm) were cleaned sequentially by ultrasonication in acetone, isopropanol, and deionized water, followed by surface activation using oxygen/argon plasma treatment. The fabrication process consisted of spin-coating, exposure, development, and characterization. Different thicknesses of AR6200 series EBR (Eching, Germany) were obtained by spin-coating specific formulations: 6200.18 for 800 nm, 6200.09 for 200 nm, and 6200.04 for 150 nm. Each resist was soft-baked on a hotplate at 150 °C. Additionally, a 40 nm-thick layer of an organic conductive polymer (type 5090.02) was spin-coated onto selected EBR surfaces. Separately, a 20 nm-thick gold conduction layer was deposited by thermal evaporation (IBVEB500, Microtec, Shenyang, China) without an adhesion layer to facilitate lift-off processing. The detailed layer structures for all three sample types are summarized in

Table 1. Layer structures of the three sample types.

Sample 1	Conductive layer (nm)	-	-	-
	EBR/Thickness (nm)	6200.18/800 nm	6200.09/200 nm	6200.04/150 nm
	Substrate	Glass
Sample 2	Conductive layer (nm)	Conductive polymer 40 nm	Conductive polymer 40 nm	Conductive polymer 40 nm
	EBR/Thickness (nm)	6200.18/800 nm	6200.09/200 nm	6200.04/150 nm
	Substrate	Glass
Sample 3	Conductive layer (nm)	Au 20 nm	Au 20 nm	Au 20 nm
	EBR/Thickness (nm)	6200.18/800 nm	6200.09/200 nm	6200.04/150 nm
	Substrate	Glass

. Nanostructure arrays (210 nm × 70 nm) were exposed using an EBL system (Pioneer Two, Raith, Dortmund, Germany) operated at an acceleration voltage of 20 kV, with a 20 μm aperture and a beam current of 1 nA. The exposure dose was 200 μC/cm² for 6200.09 and 6200.04 and 300 μC/cm² for 6200.18. Prior to development, the conductive polymer layer was removed by dissolution in deionized water, and the conductive Au layer was removed using an iodine-potassium iodide (I₂–KI) gold etchant. The I₂–KI solution was prepared by first dissolving 34.0 g of potassium iodide (KI) in 150 mL of deionized water with stirring, followed by the addition of 11.0 g of iodine (I₂) until complete dissolution. Development was carried out using 600-546 as the developer and 600-60 as the stopper, with the processing time of 30 s for each EBR type. Finally, the LER of the developed nanostructures was measured under a relatively low voltage (0.5 kV or 1 kV) using a scanning electron microscope (Gemini 560, Zeiss, Oberkochen, Germany).

3. Results

To directly assess the influence of charge accumulation on patterning fidelity, exposures were performed on glass substrates using a 20 kV acceleration voltage. The primary internal factor governing charge buildup is the inherent insulating property of glass, which originates from its stable silicate structure and severely restricts charge carrier mobility, thereby impeding efficient charge dissipation [32,33]. Externally, the severity of charging is modulated by several process parameters, including EBR composition, key electron-beam settings, sample-grounding efficacy and the presence of conductive overlayers. These external factors critically affect the dynamic balance between charge injection and dissipation during exposure. These adjustments to the EBR and coated layers counteract charging, thereby illustrating how process optimization can compensate for the material’s intrinsic limitations. Consequently, the overall extent of charge accumulation is jointly determined by the interplay between the substrate’s inherent material properties and the configured process conditions. These findings are intended to guide process design and resist selection, assisting researchers and manufacturers in optimizing EBL on glass for improved nanostructure precision.

3.1. Influence of EBR Thickness on Patterning Fidelity

To evaluate the influence of EBR thickness on patterning fidelity in EBL, a single EBR series was spin-coated onto glass substrates to achieve three distinct thicknesses: 800 nm (6200.18), 200 nm (6200.09), and 150 nm (6200.04). We designed a rectangular array pattern for exposure, with each unit measuring 210 nm × 70 nm and arranged with a pitch of 300 nm horizontally and 200 nm vertically (Figure 1a), whose actual thickness is determined by the EBR used. This structure is representative of the basic elements used in metasurface research, serving as a model for the non-periodic sequences commonly implemented in such devices.

All exposures were conducted using a 20 kV electron beam lithography system. The use of the same EBR series ensured consistent intrinsic resolution and sensitivity across the different thicknesses, although the optimal exposure dose required minor adjustment for each thickness. For each condition, samples exhibiting well-defined morphological integrity and sufficient exposure dose were selected for characterization to avoid artifacts from under-exposure. The patterns were fully exposed without overexposure and underexposure which could lead to reduced edge roughness. Especially when the structure were overexposure on glass the charge will lead to reduction in edge roughness and when the structure were underexposure on glass the resist of structure was not thorough with poor edges.

Figure 1b illustrates the three-dimensional profiles of different EBR types spin-coated on glass, with each yielding a distinct thickness. Following spin-coating and soft-baking, the resists were exposed by EBL and subsequently developed to form the intended nanostructures. The corresponding patterned structures obtained after this process, imaged by scanning electron microscopy (SEM) for the three EBR thicknesses, are presented in Figure 1c. Overall, greater EBR thickness leads to higher topographic contrast between the resist structures and the substrate, which aligns with theoretical expectations. In terms of structural fidelity, patterns developed in the 800 nm-thick resist exhibited pronounced notching and largely failed to form complete rectangles. In comparison, structures fabricated with the 200 nm-thick resist showed improved edge integrity, although residual deformation and incompleteness were still observable. Among the three thicknesses evaluated, the best results were obtained with the 150 nm-thick resist, which produced structures characterized by the sharpest edges, minimal deformation, the most continuous edge profiles, and the highest degree of structural completeness.

To quantitatively evaluate edge quality, LER was employed as a metric to assess the deviation of the patterned edges from their ideal shape. LER is widely used in lithography for such quantification and can be expressed as:

$$\sigma =\sqrt{{\displaystyle \frac{1}{N}}{\displaystyle {\sum }_{i=1}^N{\left(A_i-\overline{A}\right)}^2}}$$

where the standard deviation σ reflects the dispersion of edge points from their mean position, A_i represents the coordinate of each sampled edge point, Ᾱ represents average position along the measured edge and N represents the number of sampled points.

LER was measured along the 210 nm side of the developed rectangles, with results summarized in

Table 2. Line-edge roughness corresponding to different EBR thicknesses.

Type of EBR	Thickness of EBR (nm)	LER (nm)	Reduction
6200.18	800	1.70	-
6200.09	200	1.25	26.5%
6200.04	150	1.03	39.4%

. The 800 nm resist exhibited the highest LER (1.70 nm). A clear reduction was observed for thinner resists: the 200 nm and 150 nm resists yielded LER values of 1.25 nm and 1.03 nm, corresponding to reductions of approximately 26.5% and 39.4%, respectively. This progressive decline in LER with decreasing resist thickness confirms that thinner EBR layers significantly enhance pattern quality and edge definition. It should be noted, however, that resist thickness cannot be reduced indefinitely, as excessively thin films may adversely affect etch selectivity, mechanical stability, and process window in subsequent fabrication steps.

To provide a consistent and shape-artifact-free comparison, LER values were also measured on linear grating structures. In this set of measurements, the geometry was adapted to each resist thickness to maintain validity: for the 800 nm thick resist, LER was characterized on 70 nm lines with a 600 nm period to avoid structural collapse associated with high aspect ratios. For the thinner 200 nm and 150 nm resists, measurements were performed on 70 nm lines with a 200 nm period. As shown in Figure 2, the resulting LER is 1.63 nm for the 800 nm resist, and decreases to 1.27 nm and 1.15 nm for the 200 nm and 150 nm resists, respectively. These values correspond to improvements of approximately 22.1% and 29.4% relative to the thickest resist. This measurement enables a reliable comparison of edge quality and further confirms that reducing resist thickness enhances patterning fidelity.

The exposure results establish that pattern fidelity improves significantly with reduced EBR thickness. Structures fabricated in the 150 nm-thick resist display sharper edges, less deformation, and higher structural completeness relative to those produced with the 800 nm and 200 nm resists. This improvement is due to more controlled charge accumulation and dissipation dynamics in thinner resist layers. In thin films, the primary electron beam penetrates more readily, depositing charge nearer to the resist–substrate interface. Although strong, the resulting electric field remains relatively localized and influences the incident beam in a more direct and predictable manner. In contrast, within thick resist layers, electrons undergo increased scattering and become trapped inside the larger insulating volume. The resulting expansion of the charge-trapping region promotes the formation of complex, non-uniform internal electric fields. These fields deflect the electron beam irregularly and cause pronounced pattern distortions. Additionally, accumulated charge dissipates more efficiently in thinner films. Charges located close to the substrate interface encounter a shorter, lower-resistance path to ground, often aided by conductive clamping or surface grounding. By comparison, charges trapped deeper within a thick EBR layer must overcome a longer, higher-resistance dissipation path. This impedes rapid charge bleed-off and increases vulnerability to charging-related defects, such as line breaks or severe distortions, even when surface grounding is applied. Therefore, the reduction in charging effects in thin EBR arises from both a smaller charge-trapping volume and a shorter dissipation path. Together, these factors minimize the total accumulated charge and the strength of internal electric fields, which reduces electron-beam deflection and ultimately enhances patterning fidelity.

3.2. Enhanced Charge Management Using a Spin-Coated Conductive Polymer Layer

Effective charge dissipation is essential to mitigate charging effects during EBL on insulating substrates, as reducing charge injection is often limited by the exposure dose required for the EBR. Coating the resist surface with an organic conductive layer, such as a polyaniline derivative, offers a practical route for charge dissipation. This layer, typically around 40 nm thick with a conductivity of approximately 0.8 S/m, provides a conductive pathway that directs accumulated charge away from the exposed region. The 40 nm thickness was selected as it represents an optimal balance, providing sufficient conductivity for effective charge spreading and dissipation while remaining thin enough to minimize any additional electron scattering or interference with the underlying resist patterning process, consistent with the parameters reported in prior studies of polymer-based charge dissipation layers for high-resolution EBL [34]. The same conductive polymer was spin-coated onto each of the three EBR thicknesses (800 nm, 200 nm, and 150 nm), after which electron-beam exposure was carried out at 20 kV on glass substrates. To ensure reliable characterization and minimize artifacts from under-exposure, samples exhibiting well-defined morphology and sufficient exposure dose were selected for each resist thickness.

Figure 3a illustrates the three-dimensional profiles of the EBR layers after the application of a spin-coated conductive polymer. The samples were prepared following a consistent procedure: spin-coating the conductive polymer, performing electron-beam exposure at 20 kV, and developing under conditions optimized for each resist thickness. The corresponding patterned structures resulting from this process, as imaged by SEM for the three EBR thicknesses, are presented in Figure 3b. Structures fabricated with the 800 nm resist and the conductive polymer exhibited a basic rectangular shape with visible gaps, showing a clear improvement over the severely distorted patterns obtained without the coating. Patterns in the 200 nm resist demonstrated notably improved edge integrity, although slight local deformation and incompleteness were still observed. The best results were achieved with the 150 nm resist, which displayed optimal edge definition, high structural integrity, and negligible deformation.

LER was measured along the 210 nm side of the developed structures, with the results detailed in

Table 3. LER values of EBR structures with a spin-coated conductive polymer layer.

Type of EBR	Thickness of EBR + Conductive Resist (nm)	LER (nm)	Reduction
6200.18	800 + 40	1.25	-
6200.09	200 + 40	0.94	24.8%
6200.04	150 + 40	0.47	62.4%

. The 800 nm resist showed an LER of 1.25 nm, corresponding to a reduction of approximately 26.5% relative to its uncoated counterpart (1.70 nm, Table 2). A further significant decrease was observed for the thinner resists: the 200 nm resist achieved an LER of 0.94 nm (a reduction of 24.8% compared to the coated 800 nm sample), and the 150 nm resist reached 0.47 nm (representing a reduction of 62.4%). These results confirm that the conductive polymer layer substantially enhances patterning fidelity and edge definition across all resist thicknesses.

To further validate this trend on a standardized test pattern, LER was measured along the same two kinds of designed linear gratings, 70 nm lines on a 200 nm period and 70 nm lines on a 600 nm period, with the results detailed and corresponding SEM images shown in Figure 4. The 800 nm resist showed an LER of 1.28 nm, corresponding to a reduction of approximately 21.5% relative to its uncoated counterpart (1.63, Figure 2). A further significant decrease was observed for the thinner resists: the 200 nm resist achieved an LER of 0.97 nm (a reduction of 23.8% compared to the coated 800 nm sample), and the 150 nm resist reached 0.57 nm (representing a reduction of 55.4%). Collectively, these results confirm that the conductive polymer layer substantially enhances patterning fidelity and edge definition across all resist thicknesses.

The spin-coated organic conductive polymer forms a continuous, uniform film over the insulating resist surface, effectively transforming the EBR-on-glass stack from an electrically isolated “insulating island” into a grounded conductive system. This film establishes a continuous conductive network that allows accumulated charge to diffuse laterally and dissipate efficiently to ground via connections such as conductive tape or a grounding metal clip attached to the sample stage. By offering a low-resistance path, the layer enables near real-time charge bleed-off, thereby preventing localized charge accumulation and suppressing the electric fields that would otherwise deflect the electron beam and distort the pattern.

A key function of a well-designed charge-dissipation layer is not only to remove charge but also to ensure uniform dissipation over the exposure area. The continuous conductive network distributes charge laterally across the film plane, preventing localized high-potential spots at the beam impact point, even on slightly uneven surfaces, and thus suppressing the local electric fields responsible for pattern distortion. From a practical standpoint, many organic conductive polymers designed for EBL offer easy integration and removal. These layers are often water-soluble and can be dissolved after exposure by immersion in deionized water, without affecting the underlying EBR or subsequent development processes.

3.3. Enhanced Patterning Fidelity Using a Highly Conductive Gold Capping Layer

To achieve effective charge dissipation in EBL on insulating substrates, the implementation of a highly conductive pathway is critical. Although spin-coated organic polymers provide moderate conductivity, the deposition of a thin metal layer, such as gold (Au), establishes a more efficient route for rapid charge removal. A 20 nm-thick Au layer with a high electrical conductivity of approximately 3.3 × 10⁴ S/m was thermally evaporated onto the EBR surface. This thickness was selected to ensure excellent lateral conductivity while minimizing additional electron scattering and facilitating its removal after exposure. The Au layer is removed by immersing the sample in an I₂–KI solution for about 30 s, a duration for which over-etching is generally harmless. Afterwards, the sample is thoroughly rinsed with deionized water. The Au layer was applied to each of the three EBR thicknesses (800 nm, 200 nm, and 150 nm), followed by electron-beam exposure at 20 kV on glass substrates. For each thickness, samples exhibiting well-defined morphology and sufficient exposure dose were chosen to ensure reliable characterization.

Figure 5a illustrates the sample architecture with the Au capping layer. Figure 5b presents SEM images of the resulting nanostructures, fabricated by sequentially depositing the Au layer, performing EBL exposure, removing the metal via wet etching, and developing under optimized conditions. Structures fabricated with the 800 nm resist and the Au layer formed essentially complete rectangles with only minor edge irregularities. Both the 200 nm and 150 nm resists produced structures with sharp edges, high structural completeness, and minimal deformation, representing a significant advancement in patterning quality on glass substrates.

LER was measured along the 210 nm side of the developed rectangular structures, with the quantitative results summarized in

Table 4. LER values for EBR structures capped with a 20 nm Au layer.

Type of EBR	Thickness of EBR + Au (nm)	LER (nm)	Reduction
6200.18	800 + 20	0.82	-
6200.09	200 + 20	0.41	50.0%
6200.04	150 + 20	0.24	70.7%

. Among the Au-capped samples, the 800 nm resist exhibited the highest LER (0.82 nm), which nevertheless represents a substantial reduction of approximately 51.8% relative to its uncoated counterpart (1.70 nm, Table 2). LER values further decreased to 0.41 nm for the 200 nm resist and 0.24 nm for the 150 nm resist, corresponding to reductions of 50.0% and 70.7%, respectively, relative to the capped 800 nm reference.

To verify the consistency of these enhancements, LER was measured on the same set of designed linear gratings, with the quantitative results and corresponding SEM images shown in Figure 6. Among the Au-capped samples, the 800 nm resist exhibited the highest LER (0.91 nm), a reduction of approximately 44.3% relative to its uncoated counterpart (1.63 nm, Figure 2). LER further decreased to 0.45 nm for the 200 nm resist and 0.29 nm for the 150 nm resist, corresponding to reductions of about 50.0% and 68.4%, respectively, relative to the capped 800 nm reference. Therefore, the Au capping layer conclusively optimizes LER across all resist thicknesses, as evidenced by both datasets, yielding a significant enhancement in overall pattern quality and edge definition. The observed enhancement can be attributed to the superior conductivity of the Au film, which establishes a more efficient charge-dissipation pathway than organic layers, thereby significantly mitigating charging effects and enabling high-fidelity patterning on insulating substrates.

The deposited Au film forms a continuous and uniform metallic coating over the EBR surface, creating a highly conductive plane that is electrically connected to the grounded sample stage via conductive tape or a grounding metal clip. This configuration establishes a low-resistance path to ground, enabling incident charge to dissipate rapidly through lateral conduction within the metal layer. By doing so, it prevents localized charge accumulation and suppresses the formation of strong electric fields, deflecting electric fields that would otherwise disturb subsequent electron trajectories. The benefits of this metallic capping layer are twofold. First, it fundamentally suppresses local charge buildup, ensuring that the electron beam accurately addresses its intended target positions, a prerequisite for high pattern fidelity. Second, by maintaining the entire exposure area at a uniform ground potential, the Au layer stabilizes the electrical reference plane for the beam. This effectively inhibits large-scale field distortions that could lead to overall pattern displacement, thereby ensuring critical dimension control and precise feature placement. Consequently, the implementation of a thin, continuous metal layer represents a key enabling strategy for high-resolution lithography on insulating substrates such as glass.

To benchmark the effectiveness of the charging mitigation strategies, a comparative experiment was conducted by spin-coating three types of EBR onto semiconductive silicon substrates. LER was measured on the same linear grating patterns (70 nm lines on 200 nm and 600 nm periods). The results, presented alongside SEM images in Figure 7, show that the 800 nm resist exhibited the highest LER (0.75 nm) on Si. Thinner resists yielded improved LER values of 0.40 nm (200 nm resist) and 0.22 nm (150 nm resist), corresponding to reductions of 46.1% and 64.9%, respectively, relative to the thickest resist. This progressive decline with thickness confirms that even on conductive substrates, thinner resists intrinsically enhance pattern quality. Conversely, when compared to samples with a Au capping layer on glass, the LER values on Si are only marginally lower (by approximately 17.6%, 11.4%, and 8.5% for the three thicknesses). This close agreement demonstrates that the Au capping layer effectively neutralizes substrate charging, achieving patterning fidelity comparable to that on conductive substrates, thereby enabling high-resolution nanofabrication on insulators.

The integration of a highly conductive gold capping layer has been demonstrated as the most effective strategy for charge mitigation in EBL on glass. This 20 nm Au film provides a superior grounded conduction pathway that facilitates rapid lateral dissipation of accumulated charge. Experimental results confirm its exceptional performance, yielding the lowest LER values across all resist thicknesses and delivering the highest degree of patterning fidelity, characterized by sharp edges and minimal structural deformation. The mechanism relies on the film’s continuous metallic network, which suppresses local charge accumulation, stabilizes the electrical reference plane, and thereby mitigates both local beam deflection and large-scale field distortion.

A systematic comparison of the three evaluated approaches, EBR thinning, spin-coated conductive polymer overlayers, and thin metal capping layers, reveals a clear hierarchy of effectiveness corresponding to their respective charge dissipation mechanisms. Optimizing EBR thickness reduces the charge-trapping volume and shortens the dissipation path, offering an intrinsic, material-based improvement suitable for moderate charging conditions. The application of a conductive polymer overlayer provides a practical, removable pathway for charge bleed-off, striking a balance between added conductivity and process simplicity, though its performance remains constrained by moderate conductivity. In contrast, a thin metal capping layer such as the 20 nm Au film creates a highly conductive, grounded plane that most effectively neutralizes surface charge. This makes it indispensable for high-precision applications where severe charging effects must be eliminated. The selection among these strategies can therefore be informed by the required patterning precision, the severity of the charging challenge, and the allowable process complexity.

Compared to the other two methods, the use of a Au capping layer introduces additional process complexity, including the need for thermal evaporation and subsequent gold etching. Furthermore, the potential for minimal metallic residue, though not yet observed in downstream processes such as etching or deposition, remains a contamination concern that warrants careful attention. Consequently, the choice of a charging mitigation strategy should be dictated by the severity of the observed charging. A tiered approach is recommended: employing a thinner resist should be the first consideration where feasible. If charging persists, applying a conductive polymer coating is the subsequent step. The Au capping layer, while exhibiting the highest efficacy, should be reserved for severe charging scenarios where simpler methods prove inadequate.

Notably, despite the marked improvements in edge sharpness and line-edge roughness afforded by the metal capping layer, the developed nanostructures observed in SEM micrographs retain an elliptical, rather than ideally rectangular, cross-sectional profile. This persistent shape deviation is predominantly attributable to the proximity effect inherent to electron-beam lithography, in which electron scattering within the resist and substrate results in non-uniform energy deposition and consequent development bias near pattern edges. Such proximity-induced effects, manifested as edge rounding and critical dimension bias, are fundamental to the exposure process and generally necessitate advanced compensation techniques, such as dose modulation or proximal-effect correction in the design layout, for complete rectification. While the thorough optimization of feature morphology via proximity-effect correction extends beyond the immediate focus of this work on charge management, addressing this phenomenon remains a crucial avenue for future research directed at achieving ultimate shape fidelity in nanoscale patterning.

4. Conclusions

This study presents a comparison of charge mitigation strategies for high-precision electron beam lithography on insulating glass substrates. The findings demonstrate that a strategic reduction in EBR thickness effectively alleviates charging through minimizing the charge-trapping volume, whereas the application of conductive overlayers, be they organic polymers or thin metal films, directly improves charge dissipation. Among the approaches evaluated, the deposition of a 20 nm Au capping layer emerges as the most effective, enabling the fabrication of nanostructures with the highest fidelity, sharpest edge definition, and lowest line-edge roughness. Collectively, these results provide a clear, evidence-based framework for selecting charge management techniques in nanofabrication processes.

By demonstrating practical methods to overcome the critical challenge of charge accumulation on insulators, this work contributes to the advancement of glass-based integrated photonics and, in particular, to the fabrication of optical metasurfaces. Such devices, which are increasingly adopted in biosensing and bioimaging applications, require high-precision, high-fidelity patterning on transparent substrates, a requirement that the methodologies evaluated herein help to meet. Future efforts should focus on refining the integration and removal processes for metallic capping layers and developing enhanced organic conductive materials, thereby further improving the accessibility and performance of these essential nanofabrication techniques.