Integrated Photonic Passive Building Blocks on Silicon-on-Insulator Platform

Abstract

Integrated photonics on Silicon-On-Insulator (SOI) substrates is a well developed research field that has already significantly impacted various fields, such as quantum computing, micro sensing devices, biosensing, and high-rate communications. Although quite complex circuits can be made with such technology, everything is based on a few ’building blocks’ which are then combined to form more complex circuits. This review article provides a detailed examination of the state of the art of integrated photonic building blocks focusing on passive elements, covering fundamental principles and design methodologies. Key components discussed include waveguides, fiber-to-chip couplers, edges and gratings, phase shifters, splitters and switches (including y-branch, MMI, and directional couplers), as well as subwavelength grating structures and ring resonators. Additionally, this review addresses challenges and future prospects in advancing integrated photonic circuits on SOI platforms, focusing on scalability, power efficiency, and fabrication issues. The objective of this review is to equip researchers and engineers in the field with a comprehensive understanding of the current landscape and future trajectories of integrated photonic components on SOI substrates with a 220 nm thick device layer of intrinsic silicon.

1. Introduction

Silicon photonics, rooted in the Silicon-On-Insulator SOI architecture, has emerged as a transformative technology, revolutionizing various sectors from communication systems to sensing applications [1,2]. Over the past two decades, continuous innovations have propelled the success of silicon photonics, offering unprecedented opportunities for high-speed communication, sensing, and computing. The development of photonic integrated circuits (PICs) on silicon-based platforms, particularly SOI technology, showcases remarkable potential in developing next-generation photonic devices [3] and quantum applications [4,5]. SOI technology, characterized by a thin layer of silicon over an insulating substrate, offers several distinct advantages over traditional bulk silicon and other semiconductor materials. Its thin silicon layer enables efficient light confinement and manipulation, while the insulating layer minimizes optical loss and crosstalk, facilitating the realization of high-performance photonic components. Silicon photonics faces challenges such as fabrication process variations and high losses in coupling between fibers and chips, particularly in sensitive applications like quantum optics. However, by leveraging concepts from solid-state physics and engineering principles, promising avenues emerge for overcoming these fabrication obstacles [6]. One promising approach is to directly integrate single-photon-emitting color centers [7] and single-photon detectors onto the chip [8].

In recent years, significant progress has been made in developing various photonic devices on the SOI platform, including waveguides, modulators, detectors, filters, and light sources, exhibiting remarkable performance metrics suitable for applications in telecommunications, data centers, sensing, and biomedical imaging [9].

By providing a comprehensive evaluation of the current state of the art and a discussion of the challenges and opportunities, this review aims to contribute to the continuous advancement and deployment of SOI-based photonic technologies.

This article is organized based on the following functions:

• Coupling with external fibers.
• Splitting devices.
• Filtering and phase shifting during transmission.

Section 2 explores the coupling of an optical fiber to the photonic chip, with a focus on grating coupling and edge coupling methods. These techniques are vital for minimizing signal loss and enabling efficient light input/output onto the photonic chip. Section 3 delves into switching and splitting functionalities within the chip, discussing devices like directional couplers, y-branches, and MMI devices that are essential for manipulating light signals effectively. Mastery of these techniques is paramount for designing scalable and versatile photonic chip architectures. Section 4 addresses filtering and phase shifting during signal transmission within the chip, covering waveguide crossings, phase shifters, and ring resonators. These mechanisms enable precise control over signal properties, catering to diverse application requirements such as telecommunications and sensing.

To limit the breadth of the topics, we will discuss, except for particularly interesting examples functional to the structure of this article, SOI devices with an intrinsic silicon device layer with a thickness of 220 nm.

2. Coupling with External Fiber

Fiber-to-chip coupling is the stage where the most significant signal loss occurs. It is not always feasible to work with on-chip sources and detectors, necessitating a fiber-to-chip coupling system. This aspect is also influenced by external fiber manipulation equipment and fiber termination (fiber array). In this section, we will discuss the structures that can be constructed on-chip. For an overview of the state of the art up to 2020, we recommend the following specific review papers: [10,11,12]. To address this challenge, two primary solutions are commonly used:

• Edge Coupling: Referred to as “in-plane”, “end-fire”, or “butt” coupling. Involves directing the light beam in/out of the waveguide through the lateral sides, ensuring propagation in the same plane. It requires high-quality optical facets on the chip sides to achieve efficient coupling (typically exceeding 80%) with minimal polarization dependence.
• Vertical Coupling: In this approach, the light beam is directed onto the top surface of the silicon chip (or the bottom if necessary). A specially designed coupling structure alters the k-vector direction, facilitating the coupling of light into the integrated waveguide. The widely adopted vertical coupling solution relies on diffractive gratings, which are known for their relaxed positioning tolerances, ease of lithographic fabrication, and suitability for multi-point wafer characterizations. However, the simplest forms of these structures inherently exhibit sensitivity to polarization and wavelength, necessitating careful design and optimization to mitigate these limitations. Vertical coupling ensures greater positioning independence at the cost of higher losses. It also enables coupling on the chip surface, facilitating coupling at any point without the need to enter and exit from the edges.

2.1. Edge Coupling

Edge coupling (Figure 1) allows coupling only at the chip’s edges and is highly dependent on the edge cut and fiber positioning. Regarding optical fibers and their terminations, the current trend in edge coupling packaging entails the utilization of high-numerical-aperture (HNA) fibers to optimize the coupling efficiency and alleviate alignment constraints. V-grooves passively place and align the fiber, but they may occupy too much chip area, affecting integration density and cost. Edge coupling’s misalignment tolerance limits its applicability to single-channel packaging, making it costly and time-consuming for multiple fiber connections. Some groups and companies are exploring multi-channel edge coupling for its potential high coupling efficiency [12,13].

The inverse taper is the main and simplest on-chip structure constructed to enhance performance. This design features a waveguide tapering in width along the direction of mode propagation, connecting the narrow end to the fiber and the wider end to photonic waveguides. Modal distribution is determined by both mode order and waveguide structure. Silicon photonic edge couplers primarily focus on the transverse electric (TE) mode, with the commonly used waveguide size supporting TE mode propagation at minimal loss. The gradually varying cross-section area of an inverse taper facilitates mode conversion, allowing it to confine the electromagnetic field inside the taper. In summary, an edge coupler, based on an inverse taper aligned to the fiber core, can effectively convert a large mode from the optical fiber to the compressed guided mode in photonic waveguides. The geometry and the material of the inverse taper zone is the proper building block structure of the edge coupling [14,15,16,17,18,19]. A summary overview of the characteristics of various types of edge couplers is provided in Table 1.

2.1.1. Structural Profiles of Inverse Tapers

Standard inverse tapers have conical form and a length of about 100–500 microns. The fundamental structure for various edge coupler types is an inverse taper that tightens linearly. In this design, the Si waveguide thickness gradually decreases in width toward the fiber, forming a taper. However, the narrow taper end faces challenges in confining light effectively, resulting in a mode distributed over a larger area and an enlarged modal size. Although not always optimal, the linear profile is frequently employed in inverse taper configurations due to its structural simplicity. However, this often results in larger sizes and limited coupling efficiency, especially with fibers that have a large spot size. To address these challenges, inverse tapers can have a nonlinear profile [20,21,22,23,24], including multi-sectional, parabolic, and exponential tapers; these designs are explored for improved performance, emphasizing a smaller footprint, lower propagation loss, and broader bandwidth. In Ref. [25], Ren et al. compared the results about the coupling loss and performance of different inverse taper shapes. The mode spot size decreases with increasing taper length, contributing to enhanced mode confinement. However, as the inverse taper length becomes longer than 200 μm, the coupling efficiency decreases gradually, with length becoming a less critical factor. Linear-shape inverse tapers are preferable for ease of fabrication, while parabolic and exponential tapers excel in achieving lower coupling losses and better misalignment tolerance within a smaller length. Inverse taper-based edge couplers work well only when power efficiency is not strictly required in transmitting light to the photonic circuit. For applications emphasizing power, it is better to use different types of edge couplers.

2.1.2. Multi-Tip Tapers and Multiple Tapers

A multi-tip taper with multiple tips can loosen the constraints of alignment and reach larger misalignment tolerance as well as fabrication deviation tolerance. The efficiency of a fiber-to-chip edge coupler is determined by the overlap between the fiber mode and the superimposed mode at the coupler facet, as well as by the mode conversion efficiency. Multi-tip tapers, which feature multiple tips like the ones shown in Figure 2, are commonly used to enhance this overlap efficiency. The modal field diameter (MFD) increases with these tips, improving the match with the fiber mode. Design parameters like tip number, interval distance, tip width, and taper length are adjustable for optimal modal overlap. In fiber-to-chip coupling, precise alignment of the edge coupler facet with the fiber core is crucial for high efficiency. This approach introduces design flexibility to achieve the expected coupling efficiency within a compact footprint [26,27,28,29,30,31].

Taking inspiration from the multi-tip taper concept, a logical next step is to suggest a different type of edge coupler using multiple tapers, as shown in Figure 3. The trident edge coupler, featuring three distinct tapers, is a widely adopted form among various edge couplers with multiple tapers [32,33,34]. An edge coupler with multiple tapers is simple, feasible, and compatible with standard lithography and etching. Like edge couplers with a single multi-tip taper, multiple tapers are more tolerant to misalignment between an optical fiber and the edge coupler compared to a single inverse taper.

The introduction of subwavelength grating (SWG) structures can be applied to the previously mentioned tapers [35,36,37]. The incorporation of secondary wavelength grating structures can achieve a lower effective modal refractive index compared to the Si waveguide on the coupler facet, leading to higher modal overlap with the low-index fiber. The SWG structure offers multiple design variables, providing a high degree of design freedom. Consequently, it is possible to achieve excellent coupling performance, including a high coupling efficiency, compact dimensions, low sensitivity to the polarization state, and a wide bandwidth at the expense of increased fabrication challenges [38].

2.1.3. Vertical Multi-Layer Edge Couplers

Multiple Upper Waveguides, index-matching cladding, cascaded multi-stage tapers, and Three-Dimensional Tapers are vertical structures, orthogonal to the fiber-waveguide direction. The primary objective is to expand the effective modal area vertically, ensuring a robust modal match with the fiber core and the coupler facet.

Multiple Upper Waveguides [39,40], which are typically made of materials with lower refractive indexes than silicon, like silicon nitride (SiN) and silicon oxynitride (SiON), ensure compatibility with the SOI platform and CMOS fabrication. An example of this design is represented in Figure 4.

However, challenges arise in the design. Alignment complexities must be addressed during the deposition of each layer, including the lateral alignment of upper assisting waveguides with the Si inverse taper for proper modal distribution. Interlayer alignment becomes crucial as assisting waveguides are positioned at various heights, requiring careful achievement of the required waveguide pattern. Despite these challenges, a novel spot size converter, assisted by upper SiON waveguides, has been demonstrated to achieve a nominally low loss of 0.4 dB over a total length of 450 μm [41]. This novel design reduces the complexity of the alignment and fixation of a single mode fiber to photonic chips, but it is quite challenging for fabrication feasibility and further practical applications.

Cascaded multi-stage tapers consist of multiple unidirectional tapers in different layers with their wide end near the fiber and their narrow end close to the waveguides.

At the wide end, where tapers from different layers converge, the edge coupler features a large cross-section area comparable to the fiber core. In multi-stage tapers, the top layer has the shortest taper length, and the bottom layer has the longest, as shown in Figure 5. As light propagates through these cascaded multi-stage tapers, it reaches the first taper tip where the top-layer taper ends, and due to a small cross-section area, it tends to transmit into the successive layer below with a higher refractive index than the surrounding SiO2 cladding. This pattern continues as light propagates, reaching the bottom layer that connects with the silicon waveguides. The quantity of stages in a cascaded multi-stage edge coupler is unconstrained but too many layers will increase the fabrication complexity with excessive deposition and lithography steps. Too-few layers may lead to insufficient mode conversion into the critical silicon layer. In the literature, bilayer tapers completely made of silicon can be found, which are simple to manufacture [42,43,44]. Generally, if several materials are used, as in Figure 5, three to five layers are most commonly used for cascaded multi-stage tapers [45,46,47].

Tapers buried in index-matching claddings are another technique that is not so different from two-stage tapers. A spot size converter buried in the cladding can be composed of different polymers [48,49], with the most widely used being SU8 [50,51,52], amorphous silicon [53], and SiON materials [54,55]. In recent times, 3D-structure tapers have gained popularity, as highlighted in references [56,57,58]. Despite facing challenges such as losing Y symmetry and encountering fabrication issues, these tapers show low coupling losses. Zhao et al. [59] proposed a design for a spot size converter that integrates an ion-implanted graded index waveguide (GRIN) with a 2D inversely tapered waveguide. This design aims to facilitate the efficient coupling of light between a cleaved single-mode fiber and a silicon waveguide. The device demonstrates a low coupling loss of 0.29 dB for TE mode and 0.27 dB for TM mode. Brunetti et al. [60] proposed a very-high-performance spot size converter that can produce losses of 0.18 dB for TE mode with a 600 μm length and 0.6 db for TM mode with a 600 μm length. The fabrication procedure carried out at LioniX International BV is explained in the article. Cantilevered structures are commonly used in micro-electromechanical devices (MEMSs) and play important roles in edge coupler design. A suspended Si taper clad with SiO2 is exposed by undercutting the BOX layer and the substrate beneath it to a certain thickness, starting from an initial single Si inverse taper. As discussed in Ref. [61], staggered structures are difficult to automate and therefore the distribution of these couplers is limited.

Table 1. Overview of edge couplers with different structures.

Edge C. Configuration	Coupling Loss (dB)	Polarization	Size (µm)	Manufacturing Process
Taper with linear profile [25]	1.37/2.13	TE/TM	250/200	simple
Taper with exponential
profile [25]	1.37/2.12	TE/TM	170/140	simple
Taper with quadratic profile [25]	1.39/1.87	TE/TM	170/150	simple
Edge double-tip inverse
taper [31]	1.10/1.52	TE/TM	40	intermediate
Trident edge coupler [34]	<1.5/<1.7	TE/TM	300	intermediate
Trident edge coupler [34]	<1.5/<1.7	TE/TM	300	intermediate
GRIN waveguide with a 2D inverse taper [59]	0.29/0.27	TE/TM	300	very hard
Silicon nitride spot size converter [60]	0.18	TE	600	medium
Nano-taper coupler cladded with SU8 cladding [50]	0.5/0.9	TE/TM	300	simple but expensive
Compact cantilever
coupler [62]	0.62/0.50	TE/TM	7	very hard
Sustainable 3D edge couplers [58]	0.70/1.34	TE/TM	55	hard
	0.80/1.60
	1.00/1.14
Buried 3D spot size
converter [57]	0.54	TE	100	very hard

Table 1. Overview of edge couplers with different structures.

Edge C. Configuration	Coupling Loss (dB)	Polarization	Size (µm)	Manufacturing Process
Taper with linear profile [25]	1.37/2.13	TE/TM	250/200	simple
Taper with exponential
profile [25]	1.37/2.12	TE/TM	170/140	simple
Taper with quadratic profile [25]	1.39/1.87	TE/TM	170/150	simple
Edge double-tip inverse
taper [31]	1.10/1.52	TE/TM	40	intermediate
Trident edge coupler [34]	<1.5/<1.7	TE/TM	300	intermediate
Trident edge coupler [34]	<1.5/<1.7	TE/TM	300	intermediate
GRIN waveguide with a 2D inverse taper [59]	0.29/0.27	TE/TM	300	very hard
Silicon nitride spot size converter [60]	0.18	TE	600	medium
Nano-taper coupler cladded with SU8 cladding [50]	0.5/0.9	TE/TM	300	simple but expensive
Compact cantilever
coupler [62]	0.62/0.50	TE/TM	7	very hard
Sustainable 3D edge couplers [58]	0.70/1.34	TE/TM	55	hard
	0.80/1.60
	1.00/1.14
Buried 3D spot size
converter [57]	0.54	TE	100	very hard

2.2. Vertical Coupling

The widely adopted vertical coupling solution relies on diffractive gratings. Characterized by relatively relaxed positioning tolerances and ease of lithographic fabrication, they allow for multi-point wafer characterizations.

Vertical coupling solutions are highly sensitive to polarization and wavelength, and various structures and geometries have been developed to manage this sensitivity.

A grating, in the context of SOI-based photonic chips, is an often periodic pattern of materials or structures on a surface. It is created by etching on SOI or selectively depositing amorphous silicon on SOI, causing a refractive index variation. If the index variation’s period is larger than the light wavelength, the diffraction effect prevails; otherwise, it behaves like a uniform medium. Grating couplers (GCs) operate in the diffraction regime.

A 1D-GC, with index variation in one direction, couples light in that direction. Straight-grating GCs require a spot size converter, while confocal gratings enable compact GC design. The same principles apply to 2D-GCs if only one direction works in the diffraction regime; if both directions work, light can propagate in both, with 1D-GC principles applying to each.

The behavior of a grating coupler is explained in Figure 6 and can be described using the phase matching condition, which aligns the wave vector of incident light with the vector of the light beam propagating in the waveguide. We omit the mathematical details of the Bragg equation, as they have been presented in several reviews [11,12].

A summary overview of the characteristics of various types of grating couplers is provided at the end of this section in Table 2.

2.2.1. Parameters of Grating Couplers’ Structures

Consider a planar waveguide grating structure with grating material index $n_1$, gap material index $n_0$, period $\Lambda$, and fill factor f, like the one shown in Figure 7. The size of a focusing grating coupler is influenced by the section angle (${\alpha }_s$) after setting the grating curve. To reduce the footprint, a larger ${\alpha }_s$ can be chosen, but this might lead to increased roughness due to lithographic representation as polygons, causing extra scattering loss. Achieving a balance is necessary, considering fabrication constraints and minimizing footprint while managing potential roughness-related issues.

2.2.2. Coupling Strategies

There are two commonly used vertical coupling techniques [63,64,65]. One is direct vertical coupling [66], usually with an inclination from 0° to 10°. The fiber is tilted relative to the normal direction of the plane by a maximum of 10 degrees in the direction in which the light is to be injected, so that the plane formed by the fiber and waveguide is perpendicular to the chip plane. In cases of bidirectional grating couplers, the light will be injected in a completely vertical direction. The distance of the fiber end from the chip is usually macroscopic. This setup offers the advantage of leveraging three-dimensional space using fiber holders positioned at various heights, thus keeping the chip surface unobstructed. The disadvantage is the presence of losses due to the optimization of coupling.

The other technique is quasiplanar coupling [67]. A v-groove array is positioned above and in contact with the chip, and the light is reflected from the end of the chip to a specific point where the input or output grating coupler is located, as shown in Figure 8. The advantages of this technique are robust fixation and rigidity, but it requires the use of the chip surface, necessitating the avoidance of crossovers and overcrowding with other elements on the surface.

2.2.3. Multi-Layer Grating Coupler

Diffraction gratings on the SOI face limite directionality due to similar refractive indices in the superstrate and buried oxide. To improve directionality, the grating structure is modified to create constructive interference upwards and destructive interference downwards [69,70], as shown in Figure 9a. The thickness of the oxide layer can be adjusted for constructive interference (see Distributed Bragg Reflector technology [71]); alternatively, a highly reflective material, like a thin metal layer, can be buried below the grating [72] (see Figure 9b). However, building localized multi-layer structures involves complex fabrication methods.

2.2.4. Grating Structural Innovations

Modification of the geometry of the grating brings significant improvements to transmission, and various techniques have been proposed in the literature. The shallow grating coupler has established itself as the norm [73,74]; however, more complicated shapes, such as multiple etching shapes [75] (see Figure 10a) permit a few very efficient mode transmissions. Furthermore, altering the pitch of the grating and apodization of the grating are very common techniques to improve GCs. A general theoretical approach to optimize the pitch is presented in [76]. We can build a GC that operates as a wavelength filter [77] with irregular pitches. Slanted GCs [78,79] (see Figure 10b) are not as widespread as the previous ones due to manufacturing difficulties. Oblique profiles require the use of the Focused Ion Beam technique, and have long development times.

2.2.5. Two-Dimensional Grating Couplers

A 2D Polarization Splitting Grating Coupler (PSGC) [80,81] combines two 1D-GCs arranged orthogonally, each efficiently guiding the light of its respective polarization into the TE mode within the associated waveguide, as depicted in Figure 11. When light enters from a fiber with any polarization, it splits into two orthogonal linear components. These parts can then be transformed into TE modes within two separate waveguides. Even if the polarization changes, the total power coupled into the two waveguides remains nearly the same, making the 2D PSGC polarization-insensitive.

Table 2. Overview of different grating couplers.

Grating C. Configuration	Experimental C. Loss (dB)	Polarization	Bandwidth	To Be Modified
Shallow etched grating coupler [73]	3.1	TE	44 nm 1 dB	simple
Poly-Si overlay [69]	1.6	TE	33 nm 1 dB	simple
Non-uniform shallow etch depth 70 nm [82]	0.8	TE	75 nm 3 dB	simple
GC dual band // demultiplexer [83]	4.9	TE	81 nm 3 dB	intermediate
Slanted grating couplers fabricated by FIB [79]	3.32	TE	80 nm 3 dB	intermediate
Grating couplers with backside metal mirrors [72]	0.5	TE	40 nm 1 dB	very hard
Double etch L-shaped grating [75]	2.7	TE	62 nm 3 dB	simple but expensive
Apodized shallow grating coupler [74]	2.7	TE	41 nm 1 dB	very hard

Table 2. Overview of different grating couplers.

Grating C. Configuration	Experimental C. Loss (dB)	Polarization	Bandwidth	To Be Modified
Shallow etched grating coupler [73]	3.1	TE	44 nm 1 dB	simple
Poly-Si overlay [69]	1.6	TE	33 nm 1 dB	simple
Non-uniform shallow etch depth 70 nm [82]	0.8	TE	75 nm 3 dB	simple
GC dual band // demultiplexer [83]	4.9	TE	81 nm 3 dB	intermediate
Slanted grating couplers fabricated by FIB [79]	3.32	TE	80 nm 3 dB	intermediate
Grating couplers with backside metal mirrors [72]	0.5	TE	40 nm 1 dB	very hard
Double etch L-shaped grating [75]	2.7	TE	62 nm 3 dB	simple but expensive
Apodized shallow grating coupler [74]	2.7	TE	41 nm 1 dB	very hard

3. Splitting Devices

To separate and divide the signal, a bifurcation is introduced into the optical path. When encountering this junction, a beam is split in different paths. This process is described by defining two coefficients, denoted as T and R. The ideal values for these coefficients are within the range $0\le T\le 1$, with the constraint $T+R=1$.

If $T+R$ is less than one, it indicates losses, and the signal is either reflected within the fiber or is dispersed outside the fiber. Enabling the modulation of these switches through an external signal is one of the active components found in chips. The modulation principle is based on interference, and the devices can be thermal, electrical, or path-based. To separate or direct beams, three types of structures are employed:

• Y-branches.
• Directional couplers.
• Multimode interferometer and inverse design devices.

In Figure 12, we find a schematic description of the different kinds of devices. The coefficients T and R depend on the mode (TE or TM) of propagation in the physical structure. In addition to the fabrication challenges, the fundamental parameter for a high-quality splitter are the losses in single-mode transmission, which must be minimal. We will only discuss SOI splitters at 1550 nm; for other platforms and wavelengths, we refer to the 2022 review [84].

3.1. Y-Branch

The y-branch splitter, considered one of the fundamental integrated optical devices, comprises a single input waveguide and two output waveguides, effectively confining a beam for distribution and propagation along the y-axis. Achieving uniform power splitting is facilitated by employing a longitudinally symmetric design for the y-branch, allowing for optimization of its basic structure. Additionally, the integration of specialized structures onto the conventional y-branch enables the realization of enhanced functionalities, including polarization beam splitting. Y-branch splitters have compact dimensions below 10 × 3 $\mathsf{\mu }{\mathrm{m}}^2$, but introduce some radiation losses at the branch point ([0.01–: 0.1 dB]).

Typically, the performance of these devices is strongly influenced by the polarization of the radiation. However in 2019 [85], a significant advancement occurred with the development of a polarization-independent beam splitter using SWG structures. The design features a compact 8.5 μm coupling length, strategically positioning SWG structures on both sides of the central input waveguide and the inner sides of the two outer waveguides. These integrated SWG structures markedly boost coupling strength for the TE mode while having minimal impact on the TM mode. Experimental results showcase impressive performance, including an insertion loss (IL) of 0.1 dB (0.085 dB) and a reflection loss (RL) of $-39$ dB ($-46$ dB) for TE (TM) mode at a 1.55 μm wavelength. More polarization-independent splitters are described in [86,87,88,89] and in the 2023 review [90]. Contrarily, there are geometrically different splitters that allow the separation of the TE mode from the TM mode [91,92]. The device [93], developable through lithography, consists of a silicon layer with a hole array, demonstrating that the polarization insertion loss is less than 2.98 dB at 1550 μm, and the extinction ratio reaches values greater than 22–27 dB for the TE output port and 16–22 dB for the TM output port within a bandwidth of 110 nm. The efficient wavelength range covers the telecom band from 1500 to 1630 μm. Ugo et al. [94] developed a highly efficient mode splitter. This mode splitter can be fabricated with just one lithography step and demonstrates excellent fabrication tolerances. Experimental findings reveal that the device achieves cutting-edge performance with insertion loss below 0.9 dB and cross talk exceeding −16 dB across a wide bandwidth from 1500 to 1600 nm.

3.2. Directional Coupler

The directional coupler serves the purpose of interfering with the signals from two input channels, generating an output across two channels. Two waveguides approach each other with a gap width smaller than half the wavelength. The length of the interval over which the waveguides run parallel at the gap distance (G) is referred to as the coupling length (Lc) (see Figure 13). This configuration causes the wave propagation to transition from a single mode on a 220 nm guide to a superposition of higher-order modes, one even and one odd, on a wider guide. Consequently, an oscillation of the electric field occurs between the two waveguides.

To analyze this physical entity, a 2 × 2 matrix is employed for computation. The use of asymmetric physical entities enables the realization of a splitter that is highly dependent on the input channel (one or two), exhibiting low crosstalk values (20–30 dB) and insertion loss below 1.2 dB [96]. Splitting via the directional coupler allows for achieving variations in transmission/reflection (T/R) near one. Extremely low values of insertion loss (−0.27 dB) are observed, as discussed in Ref. [95]. The exploration of different shapes for directional couplers, such as asymmetrical bent directional couplers [95,97,98,99] or bridged silicon wires [97,100,101], enables the enhancement of component performance or the creation of polarization beam splitters. To achieve tunability with temperature, coupling coefficients can be manipulated using alloy arrangements, transitioning between a crystalline and amorphous state as the temperature varies, making the system tunable [102].

SWG structures within directional couplers offer an effective approach for achieving polarization-independent power beam splitting [85,103]. Although metamaterial structures in the form of SWGs pose fabrication challenges, they enable the creation of an increasingly diverse range of high-performance devices operating at near-infrared telecommunication wavelengths across various components, as highlighted in recent reviews [104,105].

A directional coupler fully suspended in air can serve as a basic building block for large-scale silicon photonic micro-electromechanical system circuits [106]. Polarization-independent splitters can be constructed using the directional coupler principle, as we have already discussed for y-branches [107]. In 2023, a multi-output 3D, multi-output, 1xM directional coupler-based splitter was proposed [108].

Brunetti et al. proposed a comprehensive switch [109] utilizing a directional coupler that can be tuned by a heater. In Section 4.2.2, we will delve into the construction of the heater as a fundamental component of the thermal phase shifter.

3.3. Multimode Interferometer (MMI) and Inverse Design Devices

Multimode interferometers (MMIs) serve as crucial components in the enhancement of high-performance transceivers, aiming to elevate the data transmission capabilities of prospective detector systems. Their application is dictated by the distinctive power splitting ratio inherent to MMIs, designating them for specific roles in both Mach–Zehnder modulators and the facilitation of precise working point control. This allocation aligns with the strategic utilization of MMIs to optimize signal modulation within transceivers, contributing to the overall advancement of data transmission capabilities in forthcoming detector systems. MMIs enable 1 × N power splitting with customizable split ratios for each output, which is achieved through optical path interference. Unlike y-branch configurations, the MMI operation is elucidated through the distinct propagation velocities of TE and TM modes, causing interference at the output guides, leading to a controlled separation. A more comprehensive theoretical discussion on the operation of MMIs is presented in [110]. In Ref. [111], two types of the standard 3-dB compact structures shown in Figure 14, with dimensions around 25 × 5 μm, are presented and compared with other devices.

Conventional and easy fabrication design demonstrates greater wavelength independence, making them suitable for operation within the 1550 nm range as well as the 1500–1600 nm and 1950–2050 nm wavelength bands [112].

A very easy to build and essential design of polarization beam splitters (PBSs), based on MMIs, is explained and tested in [113]. Other PBSs constructed through MMIs show larger dimensions compared to y-branch and directional coupler devices [114,115].

An insensitive power splitter 1 × 2 based on MMIs is presented in [116], while an SWG MMI 1 × 2 utilized as a mode-insensitive phase shifter is discussed and tested in [117].

A semi-analytical method for calculating S-parameters in general $NxM$ MMI couplers is introduced in [118].

The method, based on mode decomposition and an effective index approach, approximates the channel waveguide using an equivalent slab waveguide with exact analytic expressions for its modes.

Alternatively to the direct approach, inverse design devices are conceived with a specific focus on their intended function, wherein the multimode zone can adopt varied shapes and profiles for optimization according to the desired splitting ratio or desired function. See Figure 15 and the explanations described in [119,120].

MMIs are well suited to the inverse design technique; in Ref. [121], a one to four inverse architecture for MMIs is introduced that allows for arbitrary split ratios with minimal losses (<1 dB). The proposed structures exhibit noteworthy sensitivity to wavelength variations, with the split ratio showing substantial changes in response to even minor wavelength fluctuations compared to classical MMIs.

4. Transmission and Signal Perturbation

During transmission along the waveguide, the signal in single mode can experience losses, reflections, wavelength shifts, or phase shifts, resulting in variations in the optical path or the refractive index. These effects can be non-negligible since we are focussing on the 1550 nm near-infrared (NIR) region.

4.1. Waveguide Technology

The characterization of the silicon waveguide and the creation of a standard was developed in the first decade of this century [122]. The high index difference ($\Delta n\sim 2.0$) between silicon and silicon dioxide enables the creation of waveguides with sub-micron cross-sections and bending radii of less than 5 μm [123]. Nonetheless, the scattering losses resulting from uneven sidewalls increase with the third power of the refractive index difference ($\Delta n^3$) [122], leading to considerable propagation losses in silicon nanowaveguides. The roughness on the sidewalls primarily stems from imperfections in photolithography and etching techniques. Sophisticated fabrication equipment with high resolution capabilities is often necessary to create silicon nanowaveguides with features smaller than a micron. These tools aid in refining the sidewalls and minimizing scattering losses. CMOS technology with deep ultraviolet lithography provides the necessary precision and efficiency for mass production, showcasing its capability. Using this technology, in 2004 [124] Vlasov et al. obtained propagation losses of $3.6\pm 0.2$ dB/cm in TE polarization and in 2014 [122] Qiu et al. proposed an optimized design with $2.4\pm 0.2$ dB/cm (TE) and $0.59\pm 0.32$ dB/cm (TM).

For a complete review of different shapes and materials, please refer to Mashanovich et al. [125] and Selvaraja and Sethi [126]. The best results presented are 0.6 dB/cm for a strip waveguide and 0.2 dB/cm for a rib profile for TE mode.

4.1.1. Bending Losses

FDTD simulations of bending losses by Sheng et al. [123] confirm the experimental results measured by Vlasov et al. in 2004 [124]: for TE mode, bending losses are 0.005 dB/turn, 0.013 ± 0.005 dB/turn, and 0.086 ± 0.005 dB/turn, respectively, for bending radii 5 μm, 2 μm, and 1 μm. In [123,124], the bending losses resulting from FDTD simulations are validated. All the results above are obtained for a 1550 nm light wavelength and Si waveguides with profile dimensions of 450 nm × 220 nm.

A 100 cm long waveguide spiral was presented in 2022 by Hong et al. [127] with a minimal bending radius of 10 μm by using a standard 220 nm thick Silicon-On-Insulator foundry process, and the measured propagation loss is as low as 0.28 dB/cm.

4.1.2. Waveguide Crossings

To create dense and fully operational photonic components on an SOI platform, the crossing of silicon waveguides is essential and unavoidable as system complexity grows. Simultaneously, there is a rising demand for compact device footprints. While most printed circuit boards (PCBs) for electrical circuits consist of four to eight layers, implementing efficient optical aspects for multiple layers proves challenging in the high-index contrast SOI platform. Consequently, this method is unsuitable for silicon photonic circuits due to limitations related to optical mode coupling and fabrication costs. In Ref. [128], various designs for silicon waveguide crossings, including shaped taper, multimode interference, subwavelength grating, and vertical directional coupler structures, are discussed and summarized. The FOMs of this device are the insertion losses and the waveguide crosstalk. In Ref. [129], the most optimal performance of waveguide crossings is achieved through vertical coupling with a polymer (SU-8) upper channel waveguide. FDTD simulation results indicate a crosstalk of −70 dB and an insertion loss of 0.08. An uncomplicated design [130] with low fabrication costs is demonstrated using shaped taper waveguides. The insertion losses are measured at 0.16 dB, while maintaining crosstalk levels below −40 dB.

Waveguide crossings can also serve as mode-division multiplexers, yielding satisfactory results [128].

4.2. Phase Shifter

A phase shifter is a component designed to modulate the phase of the transmission wave without altering the amplitude, which is essential for creating tunable interferometers. The simplest description involves a system with two inputs and two outputs, where the phase difference between the input signals differs from that of the output signals. Arbitrary linear optical systems can be constructed using a variety of building blocks. Chen et al. propose a review of integrated optical switches based on Mach–Zehnder Interferometers [109]. We will describe three common modulation mechanisms based on thermo-optic effects, free-carrier dispersion effects, and micro-electromechanical systems (MEMSs). The characteristics of such devices, such as optical losses, scalability, power consumption, and response time, are summarized in Figure 16.

We will use three FOMs to evaluate phase shifters: insertion losses, power consumption OR half-wave voltage length product, and response time. A summary of the characteristics of various types of grating couplers is provided Table 3.

4.2.1. MEMS-Based Phase Shifter

This concept involves integrating a movable structure capable onto the chip to generate a phase shift. The implementation of such structures on SOI compels it to work with various materials and multiple layers. Additional applications of MEMS technology beyond phase shifting are reported in Ref. [132]. In the literature, three primary methods by which MEMS-based phase shifters change or adjust are described, as depicted in Figure 17. In Figure 17a,b, the adjustment occurs by perturbing the evanescent field of the optical mode in the bus waveguide, as described in [133]. In Figure 17c,d, the adjustment is achieved by directly altering the optical mode field distribution in the waveguide as a directional coupler that changes their geometric parameters [134,135,136]. Figure 17e,f depict a modulation mechanism in which the modification of the optical path length ensures low insertion losses, although the cost of a modulation speed is reduced by an order of magnitude [137].

4.2.2. Thermo-Optical Phase Shifter

The underlying concept involves locally heating the silicon waveguide to modify its refractive index, thereby altering the optical path. This type of phase shifter is widely adopted, primarily due to its ease of manufacturing, modulation efficiency, and broad bandwidth. Despite exhibiting acceptable modulation speed and insertion losses, the main critical issue remains power consumption. Various configurations are proposed in Figure 18. In the most common configuration, Figure 18a a silicon waveguide is patterned in the cladding, with a heater positioned above it. To mitigate excessive optical insertion loss, an upper cladding is grown to isolate and support the metal heater. Careful consideration of silicon width, cladding thickness, and heater type is crucial during the design process [138]. The heater con be realized from different metals and materials, such as Tungsten, TiAu, NiCr, and TiN [139], where metal structures require double layer deposition for effective adhesion (see the fabrication process in [140]).

The strategy depicted in Figure 18b enhances energy efficiency by using a separate free-standing waveguide, which helps insulate the silicon waveguide from the cladding and substrate layers [141]. There is an ongoing debate in the current literature regarding whether a device with lower consumption, with a very high time response, justifies the manufacturing complexity involved [142,143].

Figure 18c illustrates a method for reducing the vertical gap between the heater and the bus waveguide to improve power consumption and modulation speed. An optically transparent material (e.g., 2D materials such as graphene [144,145] and indium tin oxide [146]) is required to prevent significant propagation losses.

Doping silicon can also be employed as a heater, as shown in Figure 18d,e, which exhibit an adequate balance between the FOMs [147,148].

More intricate and unconventional structures aimed at minimizing chip heating and enhancing the effective phase shifter length have been proposed recently. One example of a simpler structure involves waveguides following a spiral path beneath a heater [149]. Miller et al. [150] introduced additional complex structures, such as multiple directional couplers acting as mirrors. A multi-layer thermal phase shifter made of emerging phase-change materials (Sb₂Se₃), a Ti/Au heater, and graphene structures can be effective in a ring resonator thanks to their compact dimensions [151] with a length as small as 6 μm.

4.2.3. Free-Carrier-Depletion-Based Phase Shifter

Phase shifters that take advantage of the free-carrier dispersion are preferred in telecommunications and data center applications because of their rapid modulation capability and minimal energy consumption. The principle is to modify the concentration of charge carriers within the waveguide to alter the refractive index. This is accomplished through p-n doping junctions, which, in the absence of applied voltages, do not change the optical path. The cross-section is segmented into regions with variable doping concentrations. In region (i), the semiconductor is intrinsic (pure Si), with ’p’ representing free holes and ’n’ representing free electrons. The symbols ’+’ and ’++’ denote different levels of doping concentration, usually from ${10}^{13}{\mathrm{cm}}^{-3}$ to ${10}^{18}{\mathrm{cm}}^{-3}$. The distribution of the doping area and the doping concentrations are crucial parameters influencing both the modulation efficiency (V_π·L_π), where V_π and L_π are, respectively, the applied voltage and the device length needed to have a phase shift of $\pi$, and the propagation loss of the doped waveguide. Various designs are presented in Figure 19 to achieve the depletion zone.

Figure 19. Various structures of free-carrier-depletion-based phase shifters. (a) Phase shifter with offset carrier doping [152,153], (b) PIPIN phase shifters [154], (c) phase shifter with counter doping at corners [155], (d) phase shifter with epitaxy fabrication [156], (e) phase shifters with substrate removement [157], (f) interleaved structure phase shifter [158], (g) zig-zag structure phase shifter [159]. Image reproduced by [131].

Figure 19. Various structures of free-carrier-depletion-based phase shifters. (a) Phase shifter with offset carrier doping [152,153], (b) PIPIN phase shifters [154], (c) phase shifter with counter doping at corners [155], (d) phase shifter with epitaxy fabrication [156], (e) phase shifters with substrate removement [157], (f) interleaved structure phase shifter [158], (g) zig-zag structure phase shifter [159]. Image reproduced by [131].

Table 3. Overview of different phase shifters; * modulation efficiency (V_π·L_π) for MEMSs and depletion (PN Reverse Bias Voltage) power consumption for thermal phase shifters.

Shifter Type	Efficiency * (V $\mathit{·}$ mm) and Consumption * (mW)	Modulation Speed (MHz)	Insertion Loss (dB)
MEMS evanescent field perturbation [133]	0.535	0.503	0.33 dB
MEMS optical mode
modification [135]	0.02	0.04	0.26 dB
MEMS opt. path length adjustment [137]	75	0.139	0.1 dB
TPS conventional TiN heater [147]	21.4 mW	0.18	<0.01 dB
TPS Doped Silicon [147]	22.8 mW	0.45	<0.01 dB
TPS 2D layer ITO [146]	10 mW	0.19	<0.01 dB
Conventional TPS with air trench [143]	1.7 mW	0.010	0.1 dB
TPS spiral waveguide [149]	3 mW	0.039	0.9 dB
Standard PN junction [153]	∼0.8 V · mm (3 V)	12 × 103	1.2 dB
Junction PIPIN [154]	35 V $·$ mm (0 V)	42 × 103	2.5 dB
Corner doping
concentration [155]	26.7 V $·$ mm (−6 V)	8.9 × 103	4.5 dB
Grown vertical junction diodes [156]	7.4 V $·$ mm (1 V)	48 × 103	3.8 dB
Interleaved PN [159]	1.9 V $·$ mm (1 V)	6.8 × 103	∼2 dB

Table 3. Overview of different phase shifters; * modulation efficiency (V_π·L_π) for MEMSs and depletion (PN Reverse Bias Voltage) power consumption for thermal phase shifters.

Shifter Type	Efficiency * (V $\mathit{·}$ mm) and Consumption * (mW)	Modulation Speed (MHz)	Insertion Loss (dB)
MEMS evanescent field perturbation [133]	0.535	0.503	0.33 dB
MEMS optical mode
modification [135]	0.02	0.04	0.26 dB
MEMS opt. path length adjustment [137]	75	0.139	0.1 dB
TPS conventional TiN heater [147]	21.4 mW	0.18	<0.01 dB
TPS Doped Silicon [147]	22.8 mW	0.45	<0.01 dB
TPS 2D layer ITO [146]	10 mW	0.19	<0.01 dB
Conventional TPS with air trench [143]	1.7 mW	0.010	0.1 dB
TPS spiral waveguide [149]	3 mW	0.039	0.9 dB
Standard PN junction [153]	∼0.8 V · mm (3 V)	12 × 103	1.2 dB
Junction PIPIN [154]	35 V $·$ mm (0 V)	42 × 103	2.5 dB
Corner doping
concentration [155]	26.7 V $·$ mm (−6 V)	8.9 × 103	4.5 dB
Grown vertical junction diodes [156]	7.4 V $·$ mm (1 V)	48 × 103	3.8 dB
Interleaved PN [159]	1.9 V $·$ mm (1 V)	6.8 × 103	∼2 dB

4.3. Ring Resonators

A ring resonator (RR) is a passive component typically composed of a ring-shaped waveguide made from a high-refractive-index material, such as silicon, which is connected to a bus waveguide. The RR is specifically designed to exhibit a resonant frequency determined by its dimensions and refractive index (RI). When light is introduced into the waveguide, it circulates within the ring and interferes with itself. The resonant frequency of the ring corresponds to the frequency at which the light waves combine constructively, resulting in a significant signal detectable by an external photodetector. Changes in the refractive index of the surrounding medium can influence the resonant frequency of the ring, leading to a shift in the output signal.

Ring resonators are indispensable optical devices in photonics and telecommunications. Their functionality relies on connectivity, which is often established through evanescent coupling with a nearby bus waveguide. RRs integrated into a bus waveguide create dips in the transmission spectrum, serving as spectrum filters applicable in optical communication, especially in wavelength division multiplexing [160]. While the resonance dips offer high sensitivity, providing advantages for sensing and tuning, they may present challenges for filter stability.

RRs serve as narrowband filters and are crucial in optical communication systems like WDM and optical add-drop multiplexing. Additionally, they operate as optical modulators, facilitating the modulation of transmitted light intensity for applications such as optical data transmission. RRs also function as sensors and are capable of detecting variations in the refractive index for chemical, temperature, pressure [161], and biological sensing. In the realm of nonlinear optics, RRs induce nonlinear effects, enabling applications such as frequency doubling and entangled photon generation, as shown in Figure 20. Consequently, RRs play a pivotal role in quantum computing.

In 2023, Kazanskiy et al. [162] explored various applications, including biomedical sensing, environmental monitoring, and chemical analysis, focusing solely on RRs in the SOI platform. However, it is worth noting that the same structure can also be implemented on plasmonic and polymer platforms. One key parameter of the ring resonator is its sensitivity, which is typically measured in terms of $\frac{\Delta \lambda }{\mathrm{RIU}}$ RIU: refractive index unit). On the SOI platform, the sensitivity of $\mu$-RR-based sensors is less than 100 $\frac{\mathrm{nm}}{\mathrm{RIU}}$. However, employing subwavelength grating RRs enables the attainment of a sensitivity as high as 672.8 $\frac{\mathrm{nm}}{\mathrm{RIU}}$.

Similarly to other resonators, the quality factor (Q) is another critical parameter. It quantifies the ratio of the energy stored in the resonator to the energy lost per resonant cycle. Typical values of Q for SOI devices fall within the range of ${10}^3$ to ${10}^4$. For the limit of weakly damped oscillations (high Q values), Q is the ratio of the resonance frequency ${\nu }_0$ and the full width at half-maximum (FWHM) bandwidth $\delta \nu$ of the resonance [163]:

$$Q=\frac{{\nu }_0}{\delta \nu }$$

RRs are presented in the literature in relation to their applications. In 2022, Kumari et al. proposed a Silicon-On-Insulator waveguide-technology-based 1 × 2 integrated photonic beamformer for a 28 GHz signal with a device with a 30 μm radius, 425 $\frac{\mathrm{nm}}{\mathrm{RIU}}$ [164].

Among semiconductor-based RR devices tailored for gas detection, the study in [165] stands out. In the NIR spectrum, the presence and pressure of acetylene gas prompt oscillations in the resonance wavelength, coupled with marginal variations in the refractive index of up to ${10}^{-4}$. Benefitting from the slot waveguide design, the device shows a sensitivity of 490 $\frac{\mathrm{nm}}{\mathrm{RIU}}$ and a high Q factor of 5000.

Ring resonator biosensors detect minute changes in chemical liquid composition [166]. Using standard ring resonators with porous silicon waveguides, two radii (10 and 25 μm) are tested through exposure to varied saltwater solutions, gauging their overall sensitivity. Active characterization of porous silicon rings shows a bulk detection sensitivity of about 380 $\frac{\mathrm{nm}}{\mathrm{RIU}}$ ($Q={10}^4$) and a surface sensitivity of roughly 4 pm/nM.is revision.

In the subwavelength grating ring resonator, both the ring and the straight waveguide are fabricated using discrete small bricks. Kundal et al. [167] propose a radius of 5 μm yielding exceptional sensitivity, documented in the literature at 1012 $\frac{\mathrm{nm}}{\mathrm{RIU}}$ and Q = 1012.

A very recent review produced in 2024 by Saha et al. [168] provides a comprehensive overview of four key filter architectures—microring resonators, waveguide Bragg gratings, Mach–Zehnder interferometers, and arrayed waveguide gratings—offering insights into their basics, simulation tools, and applications. By summarizing these architectures concisely, the review sheds light on the importance and future trends of silicon photonic filters from both research and commercialization perspectives.

5. Conclusions and Perspectives

Integrated photonics has emerged as a pivotal force in advancing quantum devices and facilitating their global commercialization. The establishment of research hubs worldwide has cultivated expertise in photonic integration, forming a robust foundation for progress. Concerted efforts are now essential to fortify PICs and drive further advancements.

In the realm of modern computing, photonics and optical fibers play indispensable roles in high-speed data processing and transport. Silicon photonics technology offers a promising avenue to significantly reduce the cost, complexity, and power consumption of photonic connections.

Our aim in this review has been to provide a comprehensive yet concise list of optical components suitable for the Silicon-On-Insulator (SOI) platform. By focusing on both fabrication considerations and the specific characteristics of each component, we strive to contribute to the advancement of PIC technologies. We believe that this compilation will prove valuable to researchers and engineers working in the field, aiding in the development of more efficient and robust photonic integrated circuits for various applications.