Three-Phase Transformerless Buck-Inverter Topologies for PV Grid-Tied Systems: A Review

Abstract

With an emphasis on common-mode voltage (CMV) and leakage current suppression, this research offers a thorough examination of three-phase, two-level buck inverter topologies for transformerless (TL) grid-tied photovoltaic (PV) systems. A comprehensive classification and comparative evaluation of modern voltage-source inverter (VSI) and current-source inverter (CSI) topologies, such as H6, H7, H8, H10, and hybrid setups, constitute the paper’s main contribution. The main conclusions show that CSIs naturally offer better leakage current suppression, albeit at the expense of cost and complexity, while sophisticated VSIs (such as specific H8 and H10 topologies) in conjunction with specialized modulation techniques (like modified discontinuous PWM) provide balanced performance. The study finds intriguing research possibilities for further work in this area and indicates that the ideal topology depends on the specific application.

1. Introduction

In recent years, solar photovoltaic (PV) energy sources have become increasingly significant. One of the most promising renewable energy sources for supplying the future’s growing electrical energy needs is this one. PV resources’ common benefits include their widespread availability, dependability, lack of maintenance, longevity, lack of acoustic noise, and lack of environmental contamination [1]. Based on earlier benefits, PV systems are now widely used globally. Figure 1a presents the installed solar energy capacity worldwide [2].

Noticeably, has increased rapidly. PV systems can be used to supply electricity to isolated loads or the utility grid. Typically, standalone photovoltaic systems are designed for remote locations without access to the utility grid. Grid-connected PV probably constitutes >95% (perhaps ~98–99%) of the total solar electricity generation capacity [3,4]. The growing demand for PV installations, particularly grid-connected PV systems, suggests that more thorough research and development is required [5]. Figure 1b presents the research papers’ yearly increase in the “PV TL grid tied” topic. Other than that, grid-connected PV systems are favored over freestanding ones because of their high efficiency, affordability, optimal PV panel use, and lack of storage needs [6]. To match the voltage level to the grid, prevent direct current (DC) currents from being injected into the grid, provide galvanic isolation between the PV panel and the grid, and guarantee the quality of the grid-injected power, grid-connected PV systems have historically used power transformers. These transformers, however, result in large, expensive, and inefficient PV systems. To address the shortcomings of transformers, transformerless grid-connected photovoltaic systems have recently been proposed [7,8,9].

Table 1. A comparison between transformer-based and TL inverters for grid-tied PV systems [10,11].

Typical Attribute	Transformer-Based	Transformerless	Remarks
Application Type	Suitable for all PV systems, especially utility-scale plants where galvanic isolation is required.	Predominantly used in residential and commercial PV systems where weight, cost, and efficiency are priorities.	-
Typical Power Level	10 kW—several MW.	1–100 kW (typically ≤ 50 kW per unit).	-
Control/Modulation Strategy	Standard PWM or SPWM; simpler control; slower dynamic response due to transformer delay.	Advanced SPWM/SVPWM, predictive, or hybrid modulation to minimize CMV and leakage currents.	-
Power Quality (THD)	Typically, <3%; the transformer acts as a natural filter.	THD < 3% achievable with proper LCL filters and modulation.	-
Efficiency	Moderate (80–95%).	High (up to 98%).	TL inverters are generally more efficient (~1–4%).
Cost and Maintenance	High initial and maintenance costs due to transformer materials, insulation, and cooling requirements.	Lower cost, fewer magnetic components, and simpler installation.	TL cheaper at the system level (typical installed-hardware cost reduction on the order of ~10–30% depending on scale and design choices).
Size and Weight	Bulky and heavy because of the transformer; reduced power density.	Compact and lightweight, high-power density enables wall-mounted residential units.	TL smaller/lighter (≈30–70% reduction in size/weight for comparable power classes).
Leakage currents/EMI/CMV	Negligible (due to galvanic isolation).	Requires mitigation; CMV and leakage are typically reduced using advanced topologies and modulation (≤50 mA achievable).	Leakage currents to ground from TL topologies can be avoided with careful topology selection and monitoring.
Complexity	Simple	Moderate	-
Isolation & safety	Ensure galvanic isolation	No isolation (requires safety measures)	Additional standards/certifications are required for installing TL inverters.

shows the comparison between transformer and transformerless PV systems.

The comparison in Table 1 emphasizes that transformer-based inverters offer inherent galvanic isolation and minimal leakage current, making them reliable for large-scale or isolated PV systems; however, they suffer from higher losses, weight, and cost [12]. In contrast, transformerless inverters achieve higher efficiency (96–99%) and compactness, making them ideal for residential and commercial applications [13]. However, they require advanced control and modulation strategies to suppress common-mode voltage, leakage current, and EMI for safe grid integration [10].

These systems eliminate the need for power transformers and alter the topologies and modulations of the power inverters to function without one. The inverters are hence known as transformerless inverters. Depending on the system power level, its architecture might be either single- or three-phase. For power levels higher than 5 kW, three-phase transformerless inverters are often utilized. However, the earth leakage current is a significant safety issue with transformerless inverters. This current exceeds the guidelines that [14] recommends. The lack of power transformers and the PV panel’s high parasitic capacitance are the primary reasons for the earth leakage current. According to earlier studies, the earth leakage current is driven by the variations in the inverter’s common-mode voltage (CMV) [12]. Numerous solutions to the earth leakage current issue are presented for 1-φ systems [12,13,15,16]. However, the 3-φ topology and high operational power in 3-φ systems make the situation more complex. Reducing or, ideally, stabilizing CMV fluctuations is the key to problem-solving [13]. Either changing the inverter topology or using a modulation scheme that restricts the CMV fluctuations are the two methods to accomplish this goal.

To address the issue of ground leakage current, several transformerless inverter topologies have been proposed in the literature [17,18,19,20,21,22]. Numerous modulation techniques for the traditional two-level 3-φ inverter architecture (H6) were suggested in the references [17]. It has been determined that without altering the H6 topology, the leakage current cannot be eliminated.

Refs. [23,24,25,26,27] are review papers for the grid-connected TL inverters. The content and evaluation of those works compared to the present research are summarized in

Table 2. A summary survey of recent review papers.

Refs.	Year	Topologies	Comments
[23]	2023	Only H8, H6, H7, and NPC	Many topologies are not included, such as H10, four-leg, CSI, and others. It compared H6, H8, and NPC. Hence, it was concluded that NPC is the best choice.
[24]	2022	Two-level VSIs (buck and boost) and ZSI	Recent topologies are not included, such as hybrid topologies, new H10 topologies, CSI, and others. It does not discuss the standards.
[25]	2022	Two-level buck VSIs	Recent topologies are not included, such as hybrid topologies, new H10 topologies, CSI, and others. The modulation techniques are mentioned.
[26]	2020	Some 1-φ and 3-φ commercial topologies	Many topologies are not included, such as H10, four-leg, CSI, and others. It compared some industrial PV inverters
[27]	2019	VSIs (buck and boost) and some MLIs	Recent topologies are not included, such as hybrid topologies, new H10 topologies, CSI, and others. The modulation techniques are mentioned.
Our work	2025	Two-level buck VSIs and buck CSIs	Nearly all the recent topologies are discussed.

.

Refs. [28,29,30,31,32,33] provide evaluations and comparisons between some specified topologies of the 3-φ TL inverters. Ref. [28] evaluates how well the suggested modified discontinuous pulse width modulation (PWM) performs in lowering switching losses, guaranteeing CMV stability, minimizing device stress, and improving reactive power management in PV-fed systems in comparison to various hybrid TL setups. On the other hand, a comprehensive review and comparison of the performance of different 3-φ TL inverter topologies has been suggested by [29]. Also, modified discontinuous PWM has been applied to the topologies under test. The state-of-the-art technologies of commercial-scale PV inverters in the United States are reviewed and evaluated in [30], which also suggests future trends for transformerless solar inverters of the next generation. We talk about and evaluate current standards, leakage current, and transformerless inverter topologies. This research aims to tackle the novel obstacles of integrating transformerless solar inverters with 99% efficiency into commercial-scale photovoltaic systems. Three voltage-boost topologies for 3-φ TL PV systems are compared in [31]: the traditional two-stage converter (DC–DC boost + VSI) and two modified Z-source inverters. Using device models and datasheet information, it examines PWM techniques, switching and diode losses, and overall efficiency. According to the results, the two-stage converter has the lowest cost and the highest efficiency. Its appropriateness for three-phase transformerless PV applications is confirmed by simulations and experiments. Ref. [32] compares three TL PV inverter topologies for 3-φ grid connection, focusing on safety issues due to a lack of galvanic isolation. The topologies are the H6, the split capacitor H6, and the modularized neutral-point-clamped topology. A common-mode model is used to study leakage current paths, and simulation and experimental results are used to explain the influence of system unbalance and neutral conductor inductance. The primary goal of the research in [33] is to examine how clamping and unclamping DC-bypass switches affect 3-φ transformerless inverters’ capacity to reduce leakage current. The previous paragraph is summarized in

Table 3. A summary survey of recent comparative assessment papers.

Refs.	Year	Topologies	PWM	Compared Factors	Results and Comments
[28]	2025	Hybrid (I and II) + NPC-hybrid (I and II)	Modified discontinuous	Switching losses, CMV, device stress, reactive power, and Ileak	The study evaluated hybrid and NPC hybrid inverter topologies using the MDPWM technique. The NPC hybrid inverter topology II showed the least variation in CMV, maintaining the THD within the grid limit and limited Ileak, meeting the standards.
[29]	2017	H6 + H7 + H8	Modified discontinuous	CMV and Ileak	It finds that DPWM1 of the H6 inverter performs best but has high leakage current, making it unsafe for grid-connected inverters. Comparative analysis of H7 and H8 inverters with various PWM methods suggests that the H8 topology with a suitable PWM method offers better performance.
[30]	2015	Commercial topologies	SVPWM and modified PWM	Efficiency, reliability, CMV, cost, power density, and Ileak	Commercial-scale PV TL systems (50–250 kW) are compared. The pros and cons of different topologies are declared. An improved CMV filter is proposed.
[31]	2013	Two-stage H6 + ZSI-D + ZSI-S	Specific PWM	Switching losses, CMV, and Ileak	The two-stage converter with a specific modulation technique showed the best performance in terms of efficiency, number of devices, voltage rating, and cost, confirming its feasibility.
[32]	2009	H6 + split-H6 + NPC	Classical and interleaved PWM	CMV and Ileak	It revealed that the split capacitor topology results in low ripple voltage and Ileak below the standard requirements. However, the neutral inductance can lead to higher Ileak.
[33]	2019	Clamping and unclamping	Classical PWM	THD, CMV, and Ileak	The impact of clamping and unclamping DC-bypass switches on Ileak reduction is analyzed. It finds that unclamped H8 is the best choice for Ileak reduction, and future research should focus on soft-switching operation.

.

This paper offers a thorough analysis of several CMV reduction three-phase two-level inverters in order to present the development of transformerless PV inverters, particularly in three-phase buck inverter systems. Also, the study highlights conclusions and future work. In contrast to similar publications, this overview paper’s primary contributions are as follows: (i) it offers a thorough investigation of the 3-φ buck-VSI and buck-CSI transformerless inverter topologies; (ii) it investigates a thorough classification of the TL grid-tied inverter topologies; (iii) it introduces detailed comparisons of the different topologies. This paper presents and discusses each of these subjects in a logical manner.

Transformerless inverter topologies have been reviewed in a number of review studies [23,24,25,26,27], as Table 2 summarizes, but this study fills in some of the gaps. Specifically, this review is novel in that carried out the following:

• Provides a comprehensive analysis: In contrast to previous evaluations that mostly concentrate on VSIs, it offers a thorough and parallel analysis of both three-phase buck voltage-source inverters (VSIs) and buck current-source inverters (CSIs).
• Targets a crucial niche: It provides a targeted resource that is unavailable in more general surveys that include boost and multilevel topologies by providing a detailed, specialized examination of two-level buck inverters for CMV reduction.
• Features new advanced topologies: It includes a detailed explanation and categorization of new and uncommon topologies that were left out or not fully discussed in previous comparison studies, including H10, four-leg, ZVR, DCM-232, and hybrid configurations.

This review functions as a specialized reference for scientists and engineers creating the upcoming generation of safe and effective three-phase transformerless photovoltaic systems by compiling this analysis.

The manuscript is organized as follows: the preliminary of 3-φ transformerless PV inverters is introduced in Section 2. Section 3 provides a comprehensive discussion of the different 3-φ transformerless topologies. Section 4 discusses the conclusions and the future work.

2. Preliminary of Three-Phase Transformerless PV Inverters

Transformer and transformerless systems are two types of grid-tied photovoltaic systems. However, because of their compact size, cheap cost, and excellent efficiency, transformerless grid-connected PV systems are recommended [7,9,34]. Transformerless inverters are a common type of inverter seen in grid-tied PV installations. The modulation methods and topologies of these inverters vary [8]. Nevertheless, this kind of inverter has several issues, including the earth leakage current not meeting the standards’ suggested limit and the absence of galvanic separation from the grid [14]. The two main causes of earth leakage current are the PV array’s leakage capacitance and the lack of galvanic separation from the grid. Variations in the inverter’s common-mode voltage (CMV) are the source of ground leakage current for any transformerless inverter design [12]. Reducing or, ideally, making constant the CMV fluctuations is the path to problem-solving [13]. Either changing the inverter architecture or using a modulation technique that restricts the CMV variations are the two options to accomplish this goal.

The first step of finding the solution is the study of the CMV and leakage current paths of transformerless inverters, which will be discussed in the next paragraph.

2.1. Common-Mode Voltage and Leakage Current Concerns

To study the CMV of the general 3-φ transformerless inverter, consider the power circuit shown in Figure 2a. Where L_g is the grid’s ground inductance, C_l is the PV panel’s stray capacitance, and L_B is the boost converter’s inductance. Three voltage sources (V_AN, V_BN, and V_CN) can be used to represent the inverter [8]. Keep in mind that the voltages are known as the “N” common point. The PWM modulation method employed for the inverter switches determines the square wave character of these voltage sources. Z_A, Z_B, and Z_C are assumed to be phase-equivalent impedances. Figure 2b displays the common TL topology H6 system’s model. This circuit was altered in earlier studies utilizing common-mode and differential model approaches [8,35]. This paper employs a different analytical approach, which is described below. We apply Thevenin’s theorem to the positions N-O, assuming a balanced 3-φ system (v_a, v_b, and v_c are balanced and Z_A = Z_B = Z_C where Z_A = ω_LA). The circuit’s three parallel branches may be simplified to a single voltage source and impedance using the following formula:

$$V_{Th}=V_{NO}={\displaystyle \frac{V_{AN}+V_{BN}+V_{CN}}{3}}\text{ \& }{Z}_{Th}={\displaystyle \frac{Z_A}{3}}.$$

(1)

Thus, Figure 2c depicts the reduced comparable circuit. This simple circuit represents the earth leakage current path. Observe that the common-mode voltage CMV is the current voltage source. As a result, the earth leakage current will decrease when CMV fluctuations decrease. The modulation method and the inverter switching frequency are the primary determinants of the CMV value. Increasing the route impedances X_B, Z_A, and X_CG, where X_CG = ωL_CG, is another method of lowering the leakage current. Nevertheless, X_CG and Z_A have critical values that cannot be raised. However, the earth leakage current can be significantly impacted by the value of XB, the reactance of the boost inverter inductor. Generally speaking, the 3-φ transformerless inverter’s CMV may be computed as follows [36]:

$$V_{CMV}={\displaystyle \frac{V_{uM}+V_{vM}+V_{wM}}{3}}+V_{MN}.$$

(2)

However, 3-φ transformerless inverter terminal voltages and the voltage V_MN depend on the topology and the switching state.

Table 4. The 3-φ transformerless inverter CMVs for different topologies.

	Switching State		${\overline{\mathbf{V}}}_1$	${\overline{\mathbf{V}}}_2$	${\overline{\mathbf{V}}}_3$	${\overline{\mathbf{V}}}_4$	${\overline{\mathbf{V}}}_5$	${\overline{\mathbf{V}}}_6$	${\overline{\mathbf{V}}}_0$	${\overline{\mathbf{V}}}_7$
Topology			(1001)	(0101)	(0011)	(1101)	(0111)	(1011)	(0000)	(1111)
		VCMV/Vdc	1/3	2/3	1/3	2/3	1/3	2/3	1/3
H6		VCMV/Vdc	1/3	2/3	1/3	2/3	1/3	2/3	0	1
H7		VCMV/Vdc	1/3	2/3	1/3	2/3	1/3	2/3	3/4	1
H8 [33]		VCMV/Vdc	1/3	2/3	1/3	2/3	1/3	2/3	1/2	-

illustrates how to calculate the relevant CMV value based on the switching state for some common topologies [12,13,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,35,36,37,38].

2.2. Utility Constraints and Standards

The global standards have provided regulations for the PV system designs and solar inverter topologies. For transformerless solar inverters, the rules and laws pertaining to voltage requirements, leakage current, and DC current injection control are very crucial. Section 690.7 of the National Electrical Code (NEC) of 2011 prohibits PV source and output circuits from operating at voltages higher than 600 V. The greatest alternating current (AC) voltage that may be obtained at the inverter output without a transformer is thus limited. Since 1984, when PV requirements first appeared in the National Electrical Code (NEC), PV systems built in the United States have been required to include a grounded circuit conductor since the country’s PV systems are grounded electrical systems. If the PV system’s maximum system voltage is 50 V or less, a grounded circuit wire is not necessary. To allow the use of ungrounded PV arrays with minimal voltage constraints, Section 690.35 was introduced to the code [39]. These grounding requirements and voltage restrictions are crucial factors to take into account while choosing the transformerless inverter topologies in the next section. VDE-0126-1-1 contains the leakage current control for the PV systems. When the leakage current exceeds 300 mA, according to

Table 5. TL inverter standard [14].

Max. ILeak (mA)	tbreak (s)	tdis (s)
ILeak > 300	0.3	0.2
∆ILeak > 30	0.3	-
∆ILeak > 60	0.15	-
∆ILeak > 150	0.04	0.2

, it is advised to unplug in 0.3 s [40]. To mitigate the leakage current for inverters under 30 kVA, UL offers similar recommendations. In terms of DC current injection requirements, most utility interconnection standards (such as IEEE 929-2000, IEC 61727, IEEE 1547, and EN 61000-3-2) include a section on the level of DC current that can be injected, which ranges between 0.5% and 1% of the rated current [41].

2.3. Clarification of Common-Mode Voltage and Leakage Current Relationship

When it comes to the issue of leakage current, it is crucial to differentiate between cause and effect. The reason is the CMV. Driven by the inverter’s switching states, a high-frequency voltage potential manifests between the ground and the neutral point of the output. A fluctuating electric field is produced by this fluctuating voltage.

The unwanted impact is the leakage current. The intrinsic parasitic capacitance of the PV panel to the ground is subject to this CMV fluctuation. In accordance with the basic equation [16],

$$i_{leak}=C_{pv}{\displaystyle \frac{d{V}_{CMV}}{dt}}.$$

(3)

Hence, the leakage current is directly proportional to the rate of change of the CMV. Therefore, reducing or eliminating the changes in the CMV (either by utilizing inverter topologies that generate a constant CMV or by applying modulation techniques that limit its range of fluctuation) is the main strategy for limiting leakage current. Previous research indicates that the inverter’s CMV fluctuations are what drive the earth leakage current [12,13,15,16].

3. Three-Phase Transformerless PV Inverter Topologies

In general, 3-φ transformerless inverters can be classified according to the output voltage levels into two-level inverters and multilevel inverters. However, the two-level inverters can be categorized according to the power circuit topology into VSIs, CSIs, and ZSIs. Due to its advantages of being a mature technology, easy to regulate, and cost-effective, VSIs will be more prevalent in PV-grid-connected inverter systems than CSIs [21,35,36,42,43,44,45,46,47,48]. Nevertheless, the boost capacity cannot be supplied by the conventional three-phase, two-level voltage-source H6 inverter. Therefore, the low input DC voltage may be raised to a high DC-link voltage using a DC–DC converter or innovative topologies with additional components [49,50,51,52,53]. To prevent the DC-link bus from short-circuiting, a deadtime should also be added to the H-bridge switches. The THD value at the AC output voltage rises as a result [54,55]. Single-stage, impedance-source inverter topologies [56,57,58,59,60,61,62,63,64,65,66] have been developed recently, offering the ability to increase reliability and provide buck-boost capability.

Furthermore, these inverters may be divided into passive [67,68,69,70,71,72,73,74,75] and active types [76,77,78,79] based on the quantity of active switches in the impedance-source network. Figure 3 provides a summary and presentation of the many topologies that are currently in use. The sections that follow will provide thorough comparison and debate.

A systematic assessment of inverter configurations utilized in grid-tied PV systems, divided into transformer-based and TL categories, is presented in Section 3. The circuit topology, operating principle, control strategy, and performance behavior in terms of efficiency, CMV, and leakage current are all examined for each configuration. An index of all inverter categories and their related subsections is provided in

Table 6. Index of TL inverter configurations reviewed in this paper.

Category		Topologies	Main Features	Section
VSI	H6 (Full-Bridge)	H6	Standard 6-switch inverter; high CMV	3.1.1
VSI	NPC-H6 (Split Capacitor)	NPC-H6	Low CMV variation; split DC-link	3.1.2
VSI	H7 Topologies	H7, oH7, 7-switch	Extra DC-bus switch for decoupling	3.1.3
VSI	H8 Topologies	H8, oH8, 8-switch, new topology	Two DC-bypass switches; improved CMV	3.1.4
VSI	H10 Topologies	H10 (FC/RC/Non-clamped)	Clamping circuits for tight CMV control	3.1.5
VSI	Four-Leg	Four-Leg	Handles unbalanced loads; neutral control	3.1.6
VSI	ZVR Topology	ZVR	Introduce zero-voltage states to minimize CMV and leakage current and improve EMI performance	3.1.7
VSI	DCM-232 Topology	DCM-232	offering improved CMV and EMI mitigation through innovative circuit structures.	3.1.8
VSI	Hybrid Topologies	Hybrid and NPC-Hybrid	Combines AC/DC decoupling paths	3.1.9
CSI	Conventional CSI	CSI	inherent CMV advantages	3.2.1
CSI	CH7 Topologies	CH7 and Soft-switched CH7	H7-derived current-source version	3.2.2
CSI	Split capacitor CSI	Four-Wire CSI	Split capacitors raise CM path impedance for leakage suppression	3.2.3
CSI	Four-leg CSI		Avoids zero vectors to suppress CMV	3.2.4

to help the reader navigate the evaluation and ensure a smooth and consistent flow.

3.1. Buck Voltage Source Inverter Topologies

In these categories, the input source is a voltage source. It can be classified according to the capability of the output voltage boosting or reducing into buck-type and boost-type TL inverters.

Usually, traditional 3-φ TL inverters have an ultimate limit for the AC output voltage corresponding to the square wave mode. The AC output voltage of the inverters can only be reduced. Hence, those types of inverters are called buck-type TL inverters [80].

Nevertheless, the PV voltage in grid-connected PV systems often varies widely and is typically lower than the output’s peak voltage. Because single-stage buck-type TL inverters have a very narrow input voltage range and need the input DC voltage to be higher than the output voltage peak, they might not be sufficient. For situations where the input voltage is less than the output voltage peak, two-power-stage topologies, cascaded topologies, and multilevel topologies are thus documented. In addition to an inverter for DC/AC conversion, one DC–DC power stage is usually needed to enhance the DC voltage, which results in more complicated circuitry. To make the system simpler, one-stage inverters for converting low DC voltage to high AC voltage have been introduced [80].

3.1.1. Three-Phase Full Bridge (H6)

A three-phase full bridge is the commonly used topology for 3-φ inverter applications in the real world. It has the structure shown in Figure 4. When it is used as a 3-φ TL inverter, it has high distortion and a high leakage current [32] due to non-galvanic isolation. The operation of this topology as a TL grid-connected inverter is compared to its operation as a grid-connected inverter with an isolation transformer in [32]. The study indicated that there is no leakage current through the leakage capacitance when an isolation transformer is used. Nevertheless, high leakage current (about 10 times the standard value) occurred when using TL. Also, it is observed that the CMV fluctuates between ±V_d at the switching frequency. It is concluded that a high rate of change of the CMV is the reason behind the high leakage current.

3.1.2. Three-Phase Full Bridge with Split Capacitor (NPC H6)

With the exception of the input dc-link capacitor and PV array, the split capacitor architecture shown in Figure 5 is comparable to the previous one. It is divided in half, with the center point being linked to the grid’s neutral point. Three separate single-phase half-bridge inverters are the equivalent of this topology. In this instance, the switches are controlled using the same current control that the complete bridge uses. We shall employ two methods for PWM modulation. In the first PWM, a single triangular carrier signal is used for all three phases. In the second PWM, known as interleaved PWM, three triangular signals are displaced by 2π/3. The goal is to have the switching harmonics in the grid current cancel out. The three phases of CMV can be decreased by employing the PWM’s interleaved triangle signals. Hence, the leakage current is greatly reduced and becomes within the standards compared to the H6 topology [32].

The basic, often used three-phase topology is the H6 inverter. Its cost-effectiveness, simplicity, and low component count are its main advantages. Its main flaw, meanwhile, is the large CMV variation (from 0 to V_dc), which leads to undesirable leakage currents that do not adhere to transformerless system safety regulations. As a result, without considerable modification or filtering, the H6 is not a good option for contemporary, high-performance transformerless PV systems, even though it represents an essential benchmark.

3.1.3. Three-Phase H7 Topologies

H7 is a novel topology that was recently presented [36,38,81,82,83,84] (see Figure 6a). With the exception of a new series power switch, the architecture is identical to the traditional three-phase inverter. The well-known single-phase transformerless inverter H5 may be viewed as its marketed three-phase equivalent. The H7 topology was obtained with a novel space vector modulation in Refs. [36,81]. Efficiency was reduced even if the leakage current was only marginally reduced. However, the transformerless H7 inverter’s current source inverter version has been proposed [82,83,84]. The current source H7 inverter improves the PV’s utilization factor and offers superior current protection. Unfortunately, the system dynamics are worse, and its size is increased by its big inductance [38].

As seen from the H7 topology, the CMV fluctuates throughout the freewheeling phase, as was previously mentioned. By including the clamping branch, as seen in Figure 6b, oscillation may be prevented. It is the 3-φ version of the 1-φ topology and is named oH7. During the freewheeling switching period, the clamping circuit’s job is to clamp the voltage at points u, v, and w to 0.5 V_d. Q₇ and Q₈ are complementary clamping switches. Nevertheless, this topology has low performance compared to the original H7 [33]. The efficiency, number of components, and leakage current are better with the H7 topology than that of H7.

Another topology called the seven-switch structure [81], as shown in Figure 6c. It has the same structure as the standard H6 inverter with the presented integrated circuit. To reduce the CMV fluctuation, a switch Q₇ with a 3-ϕ diode bridge rectifier is added to the inverter’s output terminals. The switch Q₇ reduces the CMV fluctuation in the V_dc/3 range to 2 × V_dc/3 upon entering conduction in both zero states.

Table 7. A comparison of H6, NPC H6, and different H7 topologies [32,33,44].

Topology	Number of Devices		PWM	CMV (Pu)		Decoupling Side	Efficiency	Ileak	Merits and Demerits
	Q	D		From	To
H6	6	0	SVPWM	0	1	-	~97–98%	>300 mA	Simple and good THD, however, has high CMV variation and high Ileak that does not meet the standards.
NPC-H6	6	0	SVPWM	0	0.01	-	-	<30 mA	It has relatively low CMV variation and acceptable Ileak that meet the standards.
H7	7	0	SVPWM	0	2/3	DC	~97.5–98.5%	~50–100 mA	Lower number of devices with moderate CMV, Ileak value, and efficiency.
oH7	8	0	SVPWM	0	2/3	DC	~97%	~70–120 mA	The performance is low compared to the increased number of devices.
Seven switch	7	6	SVPWM	1/3	2/3	AC	~98%	<40 mA	Better CMV variation and lower Ileak and efficiency.

illustrates a comparison of H6, NPC H6, and different H7 topologies.

In order to separate the DC source during freewheeling states, the H7 family adds an additional switch. Its main benefit is that, in comparison to the H6, it has a moderately lower CMV range and leakage current without significantly increasing the number of components. The main trade-off is a minor decrease in efficiency brought on by the additional switching device. As a result, between the more complicated H8/H10 inverters and the more conventional H6, the basic H7 topology offers a good mid-performance choice.

3.1.4. Three-Phase H8 Topologies

H8, a more modern topology, is shown in Figure 7a [35,85,86,87]. It is made up of two power transistors that link the conventional 3-arm transformerless inverter to the DC bus. One may consider it to be the three-phase counterpart of the well-known 1-φ H6 transformerless inverter scheme. To lower the common mode voltage (CMV) for electrical drives, the first suggested H8 inverter architecture was developed [35,85]. The concept was then applied to grid-connected transformerless PV systems. The suggested design in [21] combined the advantages of DC bypass structures with AC bypass circuits. The findings revealed a tiny THD of the grid current and a low leakage current. Nevertheless, the controller employed had a low response, and the modulation was the conventional method. In [44], the H8 topology’s performance was contrasted with that of the traditional H6-type voltage source inverter. However, the system’s dynamic reaction was subpar, and its efficiency was low. The H8 was altered in [33] to achieve 0% CMV mutations. The method relied on the control strategy and a changed configuration to enter and exit the zero-voltage vector. Because of the 50% decrease in CMV amplitude, the H8 architecture performed better than H7 according to the results of [86]. As a result, the H8 architecture enhanced the attenuation of leakage current.

Another variation of the H8 topology is presented in Figure 7b, called oH8 [87]. It is the extended 3-φ version of the 1-φ topology oH6, and it contains more diodes and capacitors. However, the leakage current, THD of the grid current, number of devices, and efficiency are worse than the original H8 [33,87].

Figure 7c provides another version of the H8 topology, sometimes called the eight-switch topology. Although it has slightly better efficiency than the traditional H8 topology, it has not reduced the earth leakage current as much as the original H8 [33]. An improved H8 topology, illustrated in Figure 7d, was introduced by [21]. It has been tested with induction motor drives using a new PWM switching to reduce CMV variations. It provides a 66.6% reduction in the variation of the CMV [88].

Table 8. A comparison of different H8 topologies [85,86,87].

Topology	Number of Devices		PWM	CMV Variations		Decoupling	Performance Metrics (Typ.)	Merits and Demerits
	Q	D		From	To
H8	8	0	SVPWM	0	2/3	DC	Efficiency: 98.5–99% Ileak: <30 mA THD: <3%	Increased gate drivers and possible higher losses; however, the Ileak is low.
oH8	8	2	SVPWM	1/3	2/3	DC	Efficiency: ~97.5% I_leak: ~50 mA	Improved CMV, but higher losses and low efficiency; no significant decrease in Ileak.
Eight switch	8	0	SVPWM	1/3	2/3	hybrid	Efficiency: >98% Ileak: <30 mA	More complex, increased gate drivers, and possible higher losses; however, the Ileak is low.
[88]	8	0	Special PWM	1/3	2/3	DC	Efficiency: >98.5% Ileak: <25 mA THD: <2.5%	Lower total voltage rating, fewer driver requirements, and best efficiency with improved CMV.

demonstrates the comparison of different H8 topologies.

In H8 topologies, the inverter is disconnected from the DC source during zero states by means of two DC-bypass switches. Their main benefit is that the CMV range can be effectively reduced (for example, to 0–2 V_dc/3 or 1/3–2 V_dc/3), which results in much lower leakage currents that can still reach acceptable limits. Higher switching losses, additional gate drivers, and increased complexity are the trade-offs. As a result, the H8 is a high-performance VSI choice where safety and the suppression of leakage current are of utmost importance and where the complexity and cost involved are reasonable.

3.1.5. Three-Phase H10 Topologies

The H10 three-phase inverter may be classified into clamped and non-clamped topologies [89]. The clamped topologies have different versions named forward-clamped (FC-H10) and reverse-clamped H10 (RC-H10) inverters, as presented in Figure 8a,b. Although two DC bus switches, a clamping circuit, and a conventional three-phase inverter make up each topology, these two topologies employ different clamping techniques. For these two topologies, a general control strategy that combines logic operation and carrier modulation is suggested. The control strategy allows the common-mode voltage of these two topologies to vary between one-third and two-thirds of the DC bus voltage, but the frequency of the CMV of the reverse-clamped inverter is three times that of the forward-clamped inverter. The loop impedance of the reverse-clamped inverter increases greatly at high frequency; therefore, the leakage current suppression performance is improved.

To lower the leakage current, a novel nonclamped H10 inverter architecture for PV applications was introduced in [90], as shown in Figure 8c. The H10 inverter in [90] isolates the grid during zero vector states and permits CMV variation between V_dc/3 and 2 V_dc/3. However, the CMV’s dv/dt stays the same as in the two-level inverter (V_dc/3), suggesting that a larger drop in leakage current and fewer current harmonics in the grid current should follow from further dv/dt reduction. Ref. [91] proposes a different nonclamped H10 inverter architecture for PV grid-connected system applications, as presented in Figure 8d. In grid-connected photovoltaic (PV) systems, the new H10 inverter has the ability to lower leakage current and grid current harmonics [91]. Similar to three-level inverters with fewer switches, the common mode voltage (CMV) ranges from V_dc/3 to 2 V_dc/3 with a dv/dt of V_dc/6. The comparison of different H10 topologies is demonstrated in

Table 9. A comparison of different H10 topologies [89,90].

Topology	Number of Devices		PWM	CMV (pu)		Decoupling Side	Performance Metrics (Typ.)	Merits and Demerits
	Transistors	Capacitors		Range	dv/dt
H10	10	0	SVPWM	1/3:2/3	1/3	DC	Efficiency: ~98% Ileak: <35 mA	Simple and good THD, however, it has high CMV variation and high Ileak, which does not meet the standards.
FC-H10	10	3	Special PWM	1/3:2/3	1/3	DC	Efficiency: ~98% Ileak: <20 mA	Has relatively low CMV variation and acceptable Ileak that meet the standards.
RC-H10	10	3	Special PWM	1/3:2/3	1/3	DC	Efficiency: ~98.2% Ileak: <15 mA	Low number of devices with moderate CMV, Ileak value, and efficiency.
[91]	10	2	Special PWM	1/3:2/3	1/6	DC	Efficiency: 98.5% Ileak: <10 mA THD: <2%	Better CMV variation and lower Ileak and efficiency.

.

H10 topologies control freewheeling routes by using either non-clamped structures or clamping circuits (forward or reverse). The capacity to firmly confine the CMV to a narrow band (such as V_dc/3 to 2 V_dc/3) and, in certain versions, lower the CMV’s dv/dt, which results in superior leakage current suppression, is their main advantage. The primary disadvantage is that, in comparison to other common VSI families, it has the most components and control complexity. As a result, H10 inverters are leading the way in VSI performance for reducing leakage currents, but their higher cost and more complicated design limit their use.

3.1.6. Three-Phase Four-Leg Topology

Note that the majority of the three-phase solutions listed above are only applicable to three-leg PV inverters, and there hasn’t been much focus on solutions for transformerless three-phase four-leg PV inverters [18,92]. To get rid of the CMV, a four-leg inverter with a phase-shifting modulation was introduced in [93], as shown in Figure 9a. However, a modulation index of less than 0.666 or greater than 1.108 limits its operation. For an effective DC-link voltage consumption and linear-modulation operation range, the modulation index in most PV system applications is typically higher than 0.666 and lower than 1.0. Therefore, more research is required on the proposed modulation approach with leakage current removal for three-phase, four-leg PV inverters. According to [19], the high-frequency CMV makes it impossible for the three conventional modulation techniques (PWM, SVPWM, and DPWM) to completely eradicate the leakage current. In order to attain a constant CMV, the modulation technique for a three-phase, four-leg PV inverter was explored. As a result, it is possible to significantly reduce the leakage current.

3.1.7. Three-Phase ZVR Topology

Ref. [47] proposed a novel modulation approach and 3-φ topology, as presented in Figure 9b. Although its functioning mechanism differs greatly from that of the single-phase ZVR (zero-voltage state rectifier) architecture, it is developed from it. To reduce the leakage current, a novel modulation technique based on the Boolean logic function is suggested in order to create a constant common mode voltage. Using a predefined group of switching states, the CMV can be made constant at 0.5 V_d. Future studies will focus on a thorough theoretical examination of the suggested solution’s capacitor voltage-balancing mechanism.

3.1.8. Three-Phase DCM-232 Topology

To eliminate the CMV fluctuation, the DCM-232 inverter design, as seen in Figure 9c, is suggested with two separate sources for odd and even vectors [94]. The H6 inverter is often made up of two CMVs connected to non-zero vectors, such as V_d/3 in odd states or 2/3 × V_d in even states. The inner H6 still functions similarly to a traditional inverter. The lower PV source (V_b) is linked to the H6 inverter during non-zero even vectors, while the upper PV source (V_a) is connected during non-zero odd vectors to eliminate the CMV fluctuation across the stray capacitors. The Q₇ and Q₈ switches separate the sources from the load while they are in zero states. Thus, we may essentially apply zero voltage and all of the active vectors while keeping the voltage across the corresponding panels’ parasitic capacitance constant. Consequently, in the DCM-232 inverter architecture, the CMV over the stray capacitance of both sources is constant, resulting in zero or low leakage current [27,95].

3.1.9. Three-Phase Hybrid Transformerless Inverter Topologies

Another topology class called hybrid TL inverters was introduced [28]. The area is still being advanced by recent studies, which are increasingly focusing on sophisticated control algorithms for CMV suppression [96] and complicated hybrid and multi-port systems that incorporate energy storage [97]. Recent hybrid transformerless inverter families, for example, have completely eliminated leakage current in experimental setups [98], and validated prototypes using contemporary modulation and predictive control approaches have significantly reduced CMV [99,100]. AC- and DC-decoupled power devices on the positive and negative legs of a traditional inverter H6 setup make up the hybrid transformerless inverter arrangement. The benefits of reducing switching loss in a DC-decoupled topology and maintaining CMV fluctuations in an AC-decoupled topology are combined in this inverter arrangement. It can be implemented by two arrangements: non-NPC hybrid and NPC hybrid.

Figure 9d shows the hybrid transformerless arrangement II. The negative DC bus side of this architecture is linked to the decoupling circuit. In a balanced operational condition, this setup functions as a traditional H6 inverter. The Q₇ switch is on in this instance, but the Q₈ and Q₉ switches are off. The Q₇ will turn off in order to separate the source and grid when imbalanced conditions arise during a fault state or freewheeling period. Additionally, the switches Q₈ and Q₉ will be turned on to preserve the CMV fluctuations and provide the inverter setup with the capacity to flow current in both directions. Nevertheless, under balanced conditions, this arrangement has high conduction loss, and under freewheeling conditions, large switching loss. With a freewheeling circuit connected to the inverter’s three-phase output on the negative DC bus, this architecture combines both AC and DC side decoupling.

Table 10. The switching states and CMV of the non-NPC hybrid.

Collective	States	CMV (VCMV/Vdc)
1	222	1
2	221, 212, 122	5/6
3	220, 202, 022, 211, 121, 112	2/3
4	210, 201, 120, 102, 012, 021, 111	1/2
5	110, 101, 011, 200, 020, 002	1/3
6	100, 010, 001	1/6
7	000	0

lists this configuration’s switching states under both balanced and unbalanced scenarios. where 222 indicates that all upper switches are ON and freewheeling switches are ON, and 000 indicates that all upper switches are OFF and freewheeling switches are ON. With the Q₇ switch turned on, the inverter may operate in the following standard modes: 001, 010, 100, 210, 201, 102, 012, 021, and 112.

Additionally, during the freewheeling period (0 to V_d), this design exhibits significant changes across the DC link. In order to simplify power transmission, the inverter operates normally in the balanced condition, with Q₇ ON and Q₈ and Q₉ OFF. While Q₈ and Q₉ offer a bidirectional freewheeling channel to reduce leakage current and regulate CMV, Q₇ is turned off under imbalanced situations.

Figure 9e shows the ten active switches with the NPC hybrid transformerless configuration, which is based on antiparallel diodes. With less I_leak, this inverter arrangement offers bidirectional current flow capability, maintains half of the DC link voltage during balanced conditions, and reduces CMV fluctuations. Under balanced circumstances, the inverter functions as a typical setup, with Q₇ on and Q_n, Q₈, and Q₉ off. Sn will be ON, Q₇ separates the source and grid, and Q₈ and Q₉ supply the bidirectional current during the unbalanced or freewheeling phase. The NPC hybrid topology has more switches than other hybrid topologies, which results in larger power losses.

Table 11. The switching states and CMV of the NPC hybrid topology.

Collective	States	CMV (VCMV/Vdc)
1	222, 210, 201, 120, 102, 012, 021, 111, 000	1
2	221, 212, 122, 220, 202, 022, 211, 121, 112	2/3
3	110, 101, 011, 200, 020, 002, 100, 010, 001	1/3

lists this configuration’s switching states under both balanced and unbalanced scenarios. It demonstrates that during the freewheeling phase (V_d/3 to V_d), the NPC Hybrid Transformerless configuration I exhibits significant changes across the DC connection. Under balanced circumstances, this arrangement ensures consistent power transmission with less voltage stress by operating with Q₇ kept ON and Q₈, Q₉, and Q_n OFF. When Q₇ is not balanced, Q_n, Q₈, and Q₉ work together to create a freewheeling loop that enhances CMV and I_leak performance. The comparison of special 3-φ TL inverter topologies is demonstrated in

Table 12. A comparison of special 3-φ TL inverter topologies [47,96,97,100].

Topology	Number of Devices		PWM	CMV Variations		Performance Metrics (Typ.)	Decoupling	Merits and Demerits
	Q	D		Range	dv/dt
Four-Leg	8	0	RSPWM	Const. @ 1/2	1/3	Ileak: <10 mA THD (Unbalanced): <4%	AC	Improves handling of unbalanced loads and control of the neutral point while reducing CMV and leakage current. However, this requires more switches and gate drivers, which raises costs, control complexity, and losses. Consequently, despite their benefits in Ileak suppression and grid adaptability, higher hardware and control demands hinder widespread adoption compared to simpler TL designs.
ZVR	9	12	SPWM	Const.	0	Efficiency: ~97% Ileak: ~5 mA	AC	Eliminates the CMV during zero states, which greatly suppresses Ileak and improves electromagnetic compatibility. They also maintain good efficiency and reliability by avoiding extra high-frequency switches compared to some other Ileak reduction methods. However, it adds circuit complexity and more sophisticated modulation/control strategies, which slightly raise system cost.
DCM-232	10	0	SVPWM	Const.@ 0	0	Ileak: <7 mA	DC	Effectively suppresses CMV and Ileak by using a decoupled common-mode approach, which improves safety and reduces electromagnetic compatibility (EMI) issues in PV grid-connected systems. Their main drawbacks are higher circuit complexity and additional switching devices, which increase cost and control effort compared with simpler TL inverter topologies.
Non-NPC hybrid	9	0	MDPWM	1/3:2/3	1/6	Efficiency: 98–98.7% Ileak: <25 mA	AC	Reduces CMV dv/dt by ~50%, lowering leakage and EMI further. However, it is a more complex modulation and design and still requires more switches than the simplest structures.
NPC hybrid	9	0	MDPWM	Const.	1/6	Efficiency: 97.5–98.2% Ileak: <15 mA	hybrid	Better than a non-NPC hybrid. However, it is a more complex modulation and design and still requires more switches than the simplest structures.

.

Hybrid topologies (both non-NPC and NPC) intelligently combine AC and DC decoupling paths. Their core advantage is the strategic balancing of performance metrics: they maintain low CMV variation for reduced leakage current while also offering lower switching losses compared to purely DC-decoupled topologies. The significant drawback is very high circuit and control complexity due to the large number of active switches and unique modulation requirements. As a result, hybrid topologies are advanced, research-oriented solutions that offer a compelling performance compromise, but their practical implementation remains challenging and is best suited for high-power applications where efficiency is paramount.

Even while sophisticated hybrid and special topologies perform better in terms of efficiency and leakage current in research settings, there are now major obstacles preventing their wider commercial adoption and practical viability. The main obstacles are a greater number of components and a more complex system, which raise manufacturing costs and failure rates and make it hard to compete with the mass-produced, cost-optimized H6 and H8 inverters that rule the market [28,29]. Moreover, complex modulation and control techniques are needed to realize their advantages, necessitating more potent and costly digital processors. Additionally, implementation may be limited by patent issues [30]. As a result, these topologies are currently limited to specialized high-performance applications and scholarly research. Future advancements in semiconductor cost reduction, especially for wide-band gap (WBG) devices, and the creation of more straightforward, integrated control solutions will be necessary for these topologies to become more commercially viable.

3.2. Current-Source Topologies

Because it is often less expensive, smaller, and easier to manage, as well as having a little higher total conversion efficiency in common PV applications, VSI (transformerless) is the most popular commercial option for PV [101,102]. Although interest is rising, CSI (transformerless) is less prevalent in PV since it historically required large DC inductors and a more complicated PV-side interface. However, in some designs, it can deliver significantly lower CMV/leakage currents and has intrinsic short-circuit/regenerative benefits [101,103]. A comprehensive comparison between transformerless VSIs and transformerless CSIs used in PV grid-tied systems is given in

Table 13. A comprehensive comparison between TL-VSI and TL-CSIs used in PV grid-tied systems.

Factor	Typical % Difference (TL-VSI × TL-CSI)	Comments
Conversion efficiency (AC out/PV DC in)	TL-VSI is better by ~+1% to +4%	Modern transformerless TL-VSI topologies tend to reach slightly higher peak efficiencies because CSIs incur additional inductor conduction/switching losses and more complex commutation [104]
Cost (inverter + typical BOS impact)	TL-VSI is cheaper by ~10% to 40%	VSIs are mass-produced and simpler (no large DC inductor, simpler MPPT interfacing). TL-CSI’s bulky inductors raise hardware cost; some CSI implementations can reduce protection/BOS costs (but rarely enough to beat VSI at small/medium scale) [104]
Size & weight	TL-VSI is smaller/lighter by ~20% to 60%	CSI requires a relatively large DC-link inductor, which increases volume/mass; with wide-bandgap switches, this can shrink, but VSI typically remains more compact [105]
Leakage/common-mode (CM) current to ground	TL-CSI is better (lower leakage) by ~40% to 90% (i.e., TL-CSI reduces leakage compared to conventional boost/VSI baselines)	Several transformerless TL-CSI and modified boost/extended topologies explicitly target CM-current suppression—reported reductions vary widely (40–90% depending on design). This is a principal TL-CSI advantage in transformerless PV [106]
Power quality (THD, harmonic injection)	TL-VSI is slightly better by ~0% to +20% (topology dependent)	Multilevel TL-VSIs (NPC/T-type/ANPC, CHB) obtain very low THD; TL-CSIs can also achieve good waveforms but require different modulation and larger filter designs. The advantage size depends on the level count and control [107]
Control complexity & MPPT interfacing	TL-VSI is simpler (better) by ~+20% to +60% (qualitative)	PV arrays are naturally voltage-source-like; MPPT and DC-side control are straightforward with TL-VSIs. CSI requires converting PV voltage source behavior to behave like a controlled current source (extra interfacing/boost stages or hybrids), increasing control/auxiliary hardware complexity [101].
EMI/dv/dt and filtering needs	TL-CSI may be better for CM but needs larger filters: overall difference ~±10–30%	TL-CSI’s lower common-mode can reduce EMI related to leakage, but bulky inductors and switching can create other EMI challenges; VSIs use dv/dt mitigation and filters—the net advantage is topology dependent [108]
Reliability and fault behavior	CSI may be better by ~+5% to +20% for short-circuit/robustness	TL-CSI has inherent current-limiting behavior and a robust DC-link inductor (less dependency on electrolytic DC capacitors), providing some robustness and fault-tolerance advantages in certain installations [109,110,111]
Market adoption/maturity	TL-VSI is vastly ahead (TL-VSI “better” by >90% in market share)	Practically all residential/commercial transformerless PV inverters are TL-VSI-based; TL-CSIs are niche/research/commercial trials in PV [102]

. The topologies of the recent buck-TL-CSIs will be discussed in the following sections.

3.2.1. Traditional CSI Topology

The most basic arrangement for converting DC to AC is this kind. Figure 10a shows this converter’s 3-φ configuration. High gain, short circuit protection, one-stage power conversion, acceptable lifespan, and other general benefits of current source inverters are all benefited by this inverter.

This inverter has drawbacks in addition to its benefits, such as low efficiency and common-mode voltage generation that results in common-mode current leakage [105].

As indicated in Table 5, the leakage current for PV systems with CSIs has been limited by the DINVDE 0126-1-1 standards. According to [105], the traditional inverter’s harmonic components of leakage current exceed the upper limit. Therefore, it is not appropriate for a solar system that uses a grid power source. Additionally, the CSI switches need to be able to reserve a block, which may be accomplished by connecting the IGBTs in series with diodes (as seen in Figure 10a); as a result, the semiconductor losses rise. Nevertheless, the series diodes are not required since newly developed RB-IGBTs can block both forward and reverse voltages in their off states [105,106].

3.2.2. H7 CSI Topology or CH7

Figure 10b depicts a 3-φ CH7, which is described in [83]. To lower the leakage current, this arrangement makes use of an inverter bridge parallel switch. By decreasing the dv/dt, which is proportional to the amount of leakage current, switch Q₇ lowers the leakage current. According to [83], the common-mode condition in an experimental sample had a leakage current decrease of 200 mA. The efficiency range and conversion gain are not mentioned, although this structure and appropriate management lower losses, particularly conductance ones [83]. Preventing overvoltage is one of the additional benefits of the parallel switch (Q7). The parallel switch will be activated until the problem is fixed if there is an overvoltage.

Hard-switching CH7 has the disadvantage of causing high switching stress on parallel switches, as was previously described. soft-switching topologies have been designed to address these issues since switching loss increases in high-frequency operations [112,113]. Although a number of soft-switching VSIs have been released recently, the majority of them are more expensive and space-intensive than hard-switching VSIs. There are fewer species in soft switching CSI, on the other hand. Figure 10c illustrates the soft-switching H7 structure, which is described in [112]. The circuit features an auxiliary circuit for soft switching and benefits the Q₇ switch on the DC side. To provide soft-switching capabilities, the primary switch (Q₇) is aimed toward a resonant auxiliary switch (Q_r), as shown in Figure 10c. Together, the auxiliary switch, resonant capacitor C_r, and series-connected resonant inductance L_r form a resonant tank. The energy of L_r is released to output loads by diodes D₉, D₁₀, D₁₁, and D₁₂. Switch Q₇’s current reserve blocking capability will be enhanced with diode D7. Additionally, energy absorption is accomplished by capacitor C₁. Switch Q₇, therefore, switches on at zero current and off at zero voltage, and switching of Q₇ takes place at zero voltage. An analysis of a single waveform cycle reveals that the bridge-inverter’s six switches are switched at zero voltage. There is no information on VTR, size, or power density, but the efficiency is around 14% higher than the standard one.

3.2.3. Split-Capacitor Four-Wire CSI Topology

Figure 10d depicts the 3-φ structure of the split capacitor 4-wire CSI. By adding two series capacitors with their center points linked to the system’s coupling inductors and null, it lowers current leakage by raising the impedance of the current channel on the DC side. These capacitors also reduce DC current ripple. According to the topology circuit, the current flows from the capacitor’s intermediate location to the voltage zero points when both upstream and downstream switches are linked to a branch [110,114]. Additionally, this converter has two more switches than the traditional one; both inverters have similar power losses, and their efficiency is lower than the traditional one.

Ref. [115] describes the split-capacitor four-wire CSI topology and its equivalent circuit model. It also analyzes the common-mode circuit and derived expressions for CMV and the common-mode current (CMC). Furthermore, it discusses the impact of neutral line inductance on CMV and compares the CMV in the proposed CSI with that in traditional CSIs.

The split-capacitor four-wire CSI topology addresses the critical leakage current issue in transformerless PV systems by strategically modifying the CM path. This architecture incorporates two series DC-link capacitors, with their center tap connected to the grid’s neutral wire, thereby creating a high-impedance pathway for common-mode currents. During operation, this configuration effectively clamps the CMV, significantly reducing its magnitude and rate of change (dv/dt). Consequently, the primary driver for leakage current, which is the fluctuating CMV across the PV array’s parasitic capacitance, is substantially suppressed. While this design successfully lowers leakage currents to meet safety standards, it introduces trade-offs, including the need for additional capacitors and a more complex control strategy to manage the capacitor voltages and ensure stable system operation under varying grid conditions.

3.2.4. Four Leg CSI Topology

Figure 10e displays this converter’s usual architecture. Each of the eight IGBTs that make up this converter has a power diode linked in series with it. Two DC-link inductors are also necessary for the converter to function. The converter can execute sixteen distinct switching combinations, each of which simultaneously closes just two of the converter’s switches while preserving a steady current on the DC-link.

The relation between switching states and CMV is examined in [116], and it is shown that if a zero vector is present, the CMV peak value will be doubled; as a result, the common can be suppressed by avoiding the zero vector. It has been demonstrated, in [116], that employing fourth-arm switches and substituting neutral current for the preceding three zero vectors lowers the value of CMV. Bipolar current pulses and the modulation index range constraint are two examples of traditional active vector modulations that can be resolved using this technique [116]. This topology turns into a suitable substitute for distorted and unbalanced current correction. The converter is suggested as an active filter for imbalance and harmonic correction in [92]. Using a novel SVM methodology, the CSC has also been suggested for lowering the common-mode output voltage. This method efficiently reduces the CMV and gets rid of unwanted bipolar current pulses produced in 3L4W CSIs [116].

Because they use a DC-link inductor, current-source inverters are essentially different from VSIs. They are a great option for safety and electromagnetic interference (EMI) because of their inherent, superior leakage current suppression, which is caused by topological features that inherently limit CMV dynamics. The bigger size/weight, higher cost due to bulkier inductors, lower usual efficiency, and more complicated MPPT regulation are the main disadvantages. To sum up, CSIs are a specialized but very effective substitute in situations where leakage current is the top priority and system-level compromises in terms of size, cost, and maturity are tolerable.

3.3. Modulation Strategies for CMV and Leakage Current Suppression

When it comes to influencing the CMV behavior and, in turn, the leakage current in transformerless inverters, the modulation approach is just as important as the architecture. Two zero vectors (V₀, V₇) that clamp all phases to the same DC bus are among the eight switching vectors used in the standard space vector PWM (SVPWM) for a two-level VSI. These vectors usually produce the greatest CMV peaks. Therefore, avoiding or changing the utilization of these states is the main objective of specialized modulation. The following is a summary of the primary methods:

• Active Zero-Vector Modulation: This technique substitutes opposing active vectors that provide the same output voltage but a different CMV for the conventional zero vectors (V₀, V₇). For example, to synthesize a zero vector while keeping the CMV at a constant, lowered level, V₄ (110) and V₁ (100) can be utilized in combination rather than V₀ (000) [17,36]. Although very successful, this may result in higher switching losses.
• Near-State Modulation: This method effectively prevents big CMV jumps by limiting the selection of switching vectors to those that are adjacent to one another in the space vector hexagon. The dv/dt across the parasitic capacitance is directly limited by the peak-to-peak CMV, which is greatly decreased by never, for instance, changing from an “all-high” state to an “all-low” state [35].
• Discontinuous PWM (DPWM): For 120° intervals per basic cycle, the DPWM family, which includes particular variations like DPWM0, DPWM1, and DPWM2, intentionally clamps each phase to the positive or negative DC rail. When compared to continuous PWM, this clamping reduces the average switching frequency and, consequently, switches losses by up to 33% by eliminating all switching events during the clamped phase [28,29]. The particular clamping pattern affects the CMV spectrum even though it is largely a loss-reduction technique.
• Modified Discontinuous PWM (MDPWM): This sophisticated DPWM technique maximizes the clamping period for both CMV reduction and loss minimization. MDPWM can maintain the CMV within a narrower band (e.g., V_dc/3 to 2 V_dc/3) while maintaining its low-loss characteristics by carefully choosing the clamping instants based on the common-mode voltage of the active vectors. This makes it especially appropriate for high-efficiency transformerless PV applications [28,29].
• Randomized PWM (RPWM): RPWM distributes the harmonic energy of the CMV over a continuous band by randomizing the switching frequency rather than concentrating on the CMV magnitude. This “spread-spectrum” method lowers peak electromagnetic interference (EMI) and removes the high-frequency tonal noise that comes with fixed-frequency PWM, both of which are advantageous for meeting EMC regulations [20].

The choice of modulation involves a direct trade-off between CMV suppression, switching loss, output harmonic quality (THD), and implementation complexity. The optimal strategy is often tailored to the specific inverter topology and application requirements.

4. Conclusions

With an emphasis on the crucial problem of CMV and leakage current suppression, this paper has offered a thorough assessment and comparative analysis of three-phase two-level buck inverter topologies for transformerless grid-tied PV systems. A clear evaluation of the topologies’ performance trade-offs was made possible by the systematic classification of the topologies into VSIs and CSIs, as well as the compilation of their attributes.

The key findings from the comparative analysis are as follows:

• VSI Topologies: Although straightforward and reasonably priced, the traditional H6 inverter naturally generates large CMV fluctuations, which result in leakage currents that frequently fall short of safety requirements. Advanced topologies, like H8 and H10, exhibit better balance between complexity and performance, especially in their optimized configurations. These topologies successfully limit the CMV to a range of V_dc/3 to 2 V_dc/3 by incorporating extra switching states. They significantly reduce switching loss and leakage current when combined with sophisticated modulation techniques, particularly MDPWM, reducing the latter down to levels allowed by international standards.
• CSI Topologies: Because of their topological features, which inherently restrict CMV dynamics, transformerless CSIs have an intrinsic advantage in suppressing leakage current. They are therefore a strong option in terms of EMI and safety. Practical disadvantages, such as increased cost, increased size and weight because of the necessary DC-link inductors, and more complicated control and MPPT interfacing, offset this advantage. In contrast to the more established VSI alternatives, these issues have restricted their commercial penetration.
• Overall Trade-off: In the end, choosing the best topology involves a definite engineering trade-off. In terms of peak conversion efficiency, component maturity, and cost-effectiveness, VSI-based architectures are currently at the forefront. On the other hand, CSI-based architectures are superior in terms of fault tolerance, short-circuit protection, and leakage current suppression.

This analysis identifies several particular and encouraging avenues for further study:

• Intelligent Control and Modulation: To further optimize the trade-off between CMV suppression, switching loss, and output power quality, adaptive, real-time modulation techniques that can react dynamically to shifting grid conditions, PV array impedance, and component aging are being developed.
• Integration of WBG Semiconductors: SiC and GaN device research is essential, especially for high-frequency VSIs and CSIs. Complex, high-performance topologies can become more feasible with WBG technology’s ability to significantly lower switching losses, allow greater switching frequencies to reduce the bulk of passive components, and possibly push peak efficiency above 99%.
• Optimizing Multilevel and Hybrid Architectures: In order to better balance performance and the quantity of active components, future research should concentrate on improving the previously suggested hybrid and NPC-hybrid inverters. Additionally, with specialized modulation methods, the potential of four-leg topologies to manage unbalanced loads and deliver a constant CMV should be further explored.
• Expanded System-Level Analysis: This work should be expanded upon in future reviews by delving deeply into one-stage boost-derived topologies (such as Z-source and quasi-switched boost inverters), sophisticated soft-switching strategies to reduce losses, and the unique control difficulties associated with integrating these transformerless systems into distorted and weak grids.

The next generation of transformerless PV inverters may consolidate their place in the global renewable energy scene by tackling these directions and achieving even higher levels of efficiency, power density, dependability, and safety.