Article Versions Notes

Chowdary MK, Turaka R, Alabduallah B, Khan M, Babu JC, Kiran A. Low-Power Very-Large-Scale Integration Implementation of Fault-Tolerant Parallel Real Fast Fourier Transform Architectures Using Error Correction Codes and Algorithm-Based Fault-Tolerant Techniques. Processes. 2023; 11(8):2389. https://doi.org/10.3390/pr11082389

Chowdary, M. Kalpana, Rajasekhar Turaka, Bayan Alabduallah, Mudassir Khan, J. Chinna Babu, and Ajmeera Kiran. 2023. "Low-Power Very-Large-Scale Integration Implementation of Fault-Tolerant Parallel Real Fast Fourier Transform Architectures Using Error Correction Codes and Algorithm-Based Fault-Tolerant Techniques" Processes 11, no. 8: 2389. https://doi.org/10.3390/pr11082389

Chowdary, M. K., Turaka, R., Alabduallah, B., Khan, M., Babu, J. C., & Kiran, A. (2023). Low-Power Very-Large-Scale Integration Implementation of Fault-Tolerant Parallel Real Fast Fourier Transform Architectures Using Error Correction Codes and Algorithm-Based Fault-Tolerant Techniques. Processes, 11(8), 2389. https://doi.org/10.3390/pr11082389