#
Application and Analysis of Modified Metal-Oxide Memristor Models in Electronic Devices^{ †}

^{†}

## Abstract

**:**

## 1. Introduction

## 2. A Description of the Applied Memristor Models

_{ON}and R

_{OFF}—and the state variable x. In most cases, the state variable x is expressed as a ratio between the length of the doped region w and the whole memristor length D. The second one is the so-called state differential equation. It relates the time derivative of state variable x and the memristor current i (or voltage u). To derive the current–voltage and state–flux relationships, the initial value of the state variable x

_{0}and the excitation signal is used for the solution of the described system of equations.

#### 2.1. Classical Memristor Models

#### 2.1.1. Strukov-Williams Memristor Model [1]

#### 2.1.2. Joglekar Memristor Model [4]

#### 2.1.3. Biolek Memristor Model [34]

#### 2.1.4. Lehtonen-Laiho Memristor Model [35]

#### 2.2. Modified Memristor Models

#### 2.2.1. A Modified Memristor Model Based on Biolek and Lehtonen-Laiho Models (Model A_{11}) [17]

_{thr}is applied in the state differential equation. If the memristor voltage is lower than the activation threshold v

_{thr}, then the state variable does not alter, and the memristor behaves as a linear resistor. When the voltage exceeds the activation threshold, then the state variable changes in accordance with the equivalent flux linkage.

_{1}and k

_{2}are used for the adjustment of the memristor model. This model operates at higher frequencies, correctly representing the boundary effects. It has good accuracy. According to the standard Lehtonen-Laiho model, the discussed modified memristor model has a simplified structure and could be applied for the analysis of complex memristor-based electronic circuits and devices [17].

#### 2.2.2. A Modified Model Based on Lehtonen-Laiho Memristor Model A_{12}) (Model A_{12}) [15]

_{thr}for the separation of the operating modes of the memristor [15]. The coefficients k

_{1}, k

_{2}, k

_{3}, and k

_{4}are used for the adjustment of the memristor model, which is able to operate with high-frequency signals.

#### 2.2.3. A Modified Memristor Model Founded on Strukov-Williams and Lehtonen-Laiho Models (A_{13}) [19] (Model A_{13})

_{11}, A

_{12}, A

_{13}, Strukov-Williams, Joglekar, Biolek, and Lehtonen-Laiho models) are realized by comparison to the experimental current-voltage characteristics of metal-oxide-based memristors. Gradient descending and simulated annealing algorithms [19,42] are applied for the minimization of the root mean square error and to obtain the optimal values of the memristor models’ parameters.

_{13}for the representation of the processes of parameter estimation and obtaining the optimal values of the coefficients of the model. The trajectories of the memristor model parameters during the estimation procedure are presented in Figure 1a for the observation of their alteration. The derived optimal values of the memristor model parameters are applied to obtain the time diagrams of the memristor current and the corresponding current-voltage characteristics, which are presented in Figure 1b for comparison with the experimental memristor characteristics. The estimation procedures of the other considered memristor models are similar to the discussed one.

## 3. A Generation of LTSPICE Memristor Library Models

_{2}expresses the time derivative of the memristor state varies according to the corresponding state differential equation of the memristor model. The capacitor C

_{1}is connected in parallel to it for the integration of its current and to obtain the memristor state variable. Its voltage is proportional to the state variable. The resistor R

_{1}is connected in parallel to the capacitor C

_{1}and ensures a smooth change in the voltage across it. In this way, the resistor R

_{1}partially prevents convergence problems in the SPICE environment. The potential of the terminal Y is proportional to the memristor state variable. The memristor current is represented by the voltage-controlled current source G

_{1}[3,33,40].

- 1
- . subckt K
_{2}te be Y - 2
- . params ron = 100 roff = 16e3 k = 10e3 pp = 1
- 3
- C1 Y 0 1 IC = 0.3
- 4
- Rad Y 0 10G
- 5
- G2 0 Y value = {(k*V (te,be)*(1/(ron*(V(Y)) + roff*(1 − V(Y))))*(1 − pow((2*(V(Y)) − 1),(2*pp))))}
- 6
- G1 te be value = {V(te,be)*((1/(ron*(V(Y)) + roff*(1 − V(Y)))))}
- 7
- . ends K
_{2}

_{2}. The electrodes of the memristor element-te, be, and Y is also included. The memristor model parameters R

_{ON}, R

_{OFF}, k, and pp are included in the second row of the code. The capacitor C

_{1}, applied for integration of the time derivative of the state variable, is described in the third row, and its initial voltage, denoted by IC, is proportional to the initial value of the memristor state variable x

_{0}. The additional resistor Rad, attached in parallel to the capacitor C

_{1}, has a value of 10 GΩ and is expressed in the next row. The voltage-controlled dependent source G

_{2}is represented in the fifth row of the code. Its conductance is proportional to the time derivative of the memristor state variable and, in the present case, contains the constant k, the memristor voltage V(te,be), the memristance (1/(ron*(V(Y)) + roff*(1 − V(Y))), and the Joglekar window function, expressed as (1-pow((2*(V(Y)) − 1),(2*pp))). The sixth row represents the dependent source G

_{1}, which conductance is proportional to the memductance ((1/(ron*(V(Y)) + roff*(1 − V(Y))))). The description of the memristor model finishes with the command “ends”.

## 4. Memristor-Based Electronic Devices–Analysis in LTSPICE Environment

#### 4.1. A Passive Memristor Memory Crossbar

_{thr}, and the resistance of the memristor is not changed. In this way, the information stored in the memristor elements is not affected. The parasitic sneak paths in the memristor memory array do not significantly influence its normal operation due to the presence of high-resistance reversely biased memristors [24,33].

#### 4.2. A Hybrid Memory Crossbar

_{11}represents the lowest switching time and the highest switching speed, respectively [24,33].

#### 4.3. A Memristor-Based Neural Network

_{1}and x

_{2}. The neural net contains two hidden layers and an output layer. The first hidden layer is made of four neurons—N

_{11}, N

_{12}, N

_{13}, and N

_{14}with a nonlinear activation function, and the second one contains three neurons—N

_{21}, N

_{22}, and N

_{23}. The output layer contains a neuron with a linear activation function. The synaptic bonds between the neurons are memristor-based. Supervised learning is applied for the adjustment of the synaptic weights, which are founded on memristors [15,17,19]. The other elements of the artificial neural network are based on CMOS transistors.

_{2}; the second one contains the resistors R

_{1}and R

_{3}. The principle of operation for the considered synaptic circuit is based on a comparison of the voltage drops across the resistors R

_{2}and R

_{3}. The weight of the described synaptic circuit w as a function of the memristance M is [15]:

_{2}= R

_{3}, it is obtained that if R

_{1}= M, then the synaptic weight can be expressed as w = 0. Positive synaptic weights are derived if M > R

_{1}. When M < R

_{1}, then w < 0. The scaling of the weights is derived by changing the transfer coefficient k

_{v}of the operational amplifier. The input voltage signal is a sequence of negative and positive impulse packages. A pulse with a length of 1 µs and a level of 1 V leads to a change in the synaptic weight by 0.23. A negative polarity voltage signal is used for increasing the weights, while their decreasing positive pulses are used. The error signal is represented as a difference between the desired output signal and the respective actual output signal. The level of the error signal is many times lesser than those of the input logic signals. The proper functioning of the neural net and the appropriate convergence of the training procedures are established.

_{1}and x

_{2}for testing the neural net are presented in Figure 9a for the expression of the logic signals. They correspond to logic ones and zeros for the emulation of XOR logic operations. The input signals for training the neural net are very similar; they are shifted according to the testing signals to obtain more realistic results. The diagrams of the input signals of the synaptic circuit and its weight alteration are shown in Figure 9b for the description of its adjustment process. The input signals are a sequence of negative and positive packages of pulses.

#### 4.4. A Memristor-Based Amplifier

_{5}and R

_{6}represent the internal resistances of sources V

_{1}and V

_{2}. The resistors R

_{1}and R

_{2}are applied for the limitation of the collector currents of the transistors Q

_{1}and Q

_{2}. The output voltage signal is derived between the collectors of the elements Q

_{1}and Q

_{2}, and it is proportional to the difference between the input signals. In the present case, the memristor element operates in a soft-switching state. The tuning of its memristance by external voltage impulses leads to a change in the transfer coefficient of the amplifier.

#### 4.5. A Memristor-Based Generator

_{1}and the memristor U

_{1}: two comparators based on operational amplifiers, two sources of reference voltages (Vp and Vn), a logical AND gate (A

_{1}), an amplifier U

_{4}, and a shifting module U

_{2}.

_{1}-U

_{1}is equal to -1 V. The metal-oxide memristor U

_{1}is reversely biased, and the voltage across it leads to an increase in the state variable and a decrease in its memristance. Owing to this, the voltage drop across the memristor increases, and when its value is lower than the reference voltage Vp, then the comparator A

_{1}produces a logical unity. The output voltage of the generator jumps to 1 V. Then, the state variable of the memristor decreases, and its memristance increases, leading to the arising voltage drop across the memristor. This follows a new jump of the output signal, which becomes equal to -1. In this way, the considered memristor-based schematic produces rectangular impulses. The state variable changes in a comparatively broad range between 0.1 and 0.7, which corresponds to a soft-switching mode. The frequency of the output signal depends on the switching properties of the applied metal-oxide memristor. In the present case, the Lehtonen-Laiho memristor models, followed by the modified models A

_{11}, A

_{12}, and A

_{13}, represent better-switching properties than the Biolek and Joglekar memristor models.

#### 4.6. Memristor-Based Filters

_{low}[19,43]:

_{thr}.

_{1}and C

_{1}, while the high-pass filter module is made of the components C

_{2}and M

_{2}. In this circuit, the cut-off frequency of the low-pass filter flow is higher than those of the high-pass filter—f

_{high}—so the frequency band of the equivalent band-pass filter is [18,43]:

_{1}and C

_{1}, and the high-pass filter by C

_{2}and M

_{3}. The memristor M

_{2}is connected in series to the capacitor C

_{1}. It ensures a non-zero level of the output voltage for very high frequencies.

## 5. A Comparison of the Used Memristor Models

_{11}, A

_{13}, and A

_{12}are simpler compared to the standard Lehtonen-Laiho memristor model. The modified and improved models A

_{11}, A

_{13}, and A

_{12}have a high operating frequency and accuracy, very near to that of the classical Lehtonen-Laiho model. Due to their lower complexity, the modified models of A

_{11}, A

_{13}, and A

_{12}are suitable for the analysis of electronic devices and circuits with a large number of memristors.

_{11}, A

_{13}, and A

_{12}and the standard Joglekar and Biolek memristor models.

_{11}, A

_{13}, and A

_{12}and the standard Lehtonen-Laiho model. Due to this, the Joglekar, Biolek, A

_{11}, A

_{13}, and A

_{12}have a very high operating speed, followed by the classical Lehtonen-Laiho model.

_{11}, A

_{13}, and A

_{12}, and the standard Biolek and Joglekar memristor models.

_{11}, A

_{13}, A

_{12}, Biolek, and the Joglekar models.

_{11}, A

_{13}, A

_{12}, and the standard Biolek model.

## 6. Discussion

## 7. Conclusions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

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**Figure 1.**(

**a**) Parameter trajectories obtained during the memristor model parameters estimation; (

**b**) Time diagrams of the memristor voltage, experimental, and simulated currents according the modified model A

_{13}and the standard Lehtonen-Laiho model, denoted by K

_{5}, and the corresponding current–voltage relationships.

**Figure 4.**Time graphs of the voltage and state variable during writing and erasing information in a passive memristor crossbar, according to the described standard models–K

_{2}(Joglekar), K

_{3}(Biolek), K

_{5}(Lehtonen-Laiho), and modified memristor models A

_{11}, A

_{12}, and A

_{13}.

**Figure 6.**Time diagrams of the memristor voltage, memristance, and state variables according to the applied modified and standard metal-oxide memristor models.

**Figure 9.**(

**a**) Time diagrams of the input and output signals of the memristor neural network; (

**b**) Diagrams of the input signal of the synaptic circuit and the corresponding alteration of the weight.

**Figure 11.**Time diagrams of the input and output signals of the memristor-based amplifier presented in Figure 10.

**Figure 13.**Time diagrams of the output voltage of the generator, the state variable, and memristor voltage according to the considered standard and modified memristor models A

_{11}, A

_{12}, and A

_{13}.

**Figure 15.**(

**a**) Amplitude-frequency response (AFR) of a low-pass filter for x

_{0}= 0.3: (

**b**) AFR of a low-pass filter for x

_{0}= 0.95; (

**c**) AFR for the high-pass filter for x

_{0}= 0.3; (

**d**) AFR for the high-pass filter for x

_{0}= 0.95.

**Figure 17.**(

**a**) Amplitude-frequency response (AFR) of a band-pass filter for x

_{0}= 0.3: (

**b**) AFR of a band-pass filter for x

_{0}= 0.95; (

**c**) AFR for the band-stop filter for x

_{0}= 0.3; (

**d**) AFR for the band-stop filter for x

_{0}= 0.95.

**Table 1.**A comparison of the applied standard and modified memristor models according to several important criteria.

Model | Joglekar | Biolek | Lehtonen-Laiho | A_{11} | A_{12} | A_{13} |
---|---|---|---|---|---|---|

Complexity | low | low | high | low | low | low |

Operating Frequency | low | middle | high | high | high | high |

Simulation Time,ms | 16.42 | 16.74 | 18.65 | 17.23 | 17.34 | 17.28 |

Activation Thresholds | no | no | no | yes | yes | yes |

RMS Error | 6.24 | 5.87 | 3.63 | 3.75 | 3.68 | 3.72 |

Accuracy | low | middle | high | high | high | high |

Switching Properties | middle | middle | good | good | good | good |

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Mladenov, V. Application and Analysis of Modified Metal-Oxide Memristor Models in Electronic Devices. *Technologies* **2023**, *11*, 20.
https://doi.org/10.3390/technologies11010020

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Mladenov V. Application and Analysis of Modified Metal-Oxide Memristor Models in Electronic Devices. *Technologies*. 2023; 11(1):20.
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Mladenov, Valeri. 2023. "Application and Analysis of Modified Metal-Oxide Memristor Models in Electronic Devices" *Technologies* 11, no. 1: 20.
https://doi.org/10.3390/technologies11010020