In this section, we first illustrate the basic notation used to represent the data layer of the control network of a plant. Since the control channel is separated from the data channel, we kept the graph representation of the control channel out of the scope of this paper and assumed that each switch could reach the controller in single hop fashion using a secured and fast directly connected control channel. Now, we formulate the shortest path routing as the flow optimization problems in a network that is realized by the controller based on the discovered topology. Finally, we compute the model for determining optimal latency to reach the destination.

#### 3.1. Data Layer: Basic Notations

We represent our n-node data plane of the control network of a plant by an undirected graph, G = (S, L, X), where $S=\left\{{s}_{1},{s}_{2,\cdots ,}{s}_{n}\right\}$ is the set of switches, L is the set of links, and X is an n × n matrix defined by $\left\{{x}_{ij}|\left(i,j\right)\in L\right\}$, where each (i, j)-th entry, denoted by ${x}_{ij}$, represents the positive weight of a link (i, j) ∈ L. Due to the undirected nature of the graph, (i, j) and (j, i) designate the same link, i.e., ${x}_{ij}={x}_{ji}$. When (i, j) ∉ L, delineate ${x}_{ij}=0$ fabricating the weight matrix $X==\left[{x}_{ij}\right]$ into symmetric. We also define that X is a 0-1 matrix, i.e., all links have a unit weight, therefore, G refers to a simple graph and, X is the respective adjacency matrix.

Consider $d=\left[{s}_{1},{s}_{n}\right],{s}_{1},{s}_{n}\in S$ denotes the source-destination switch pair in the network G and ${F}^{d}:S\times S\to {\mathit{R}}^{+}$ function defines the amount of traffic (${f}^{\left(d\right)}$- unit) that traverse from ${s}_{1}$ (source) to ${s}_{n}$ (destination) subject to the following constraints:

(3) at source

${s}_{1}$:

relay node

$i\ne {s}_{1},\text{}{s}_{n}$:

(4) at destination

${s}_{n}$:

The constraint in Equation (1) ensures that for each link (i, j) ∉ L, ${F}_{ij}^{d}=0$ and in particular, for each undirected link (i, j) ∈ L, the constraint in Equation (2) says $\mathrm{if}\text{}{F}_{ij}^{d}0\text{}\mathrm{then}{F}_{ji}^{d}=0$ or $\mathrm{if}\text{}{F}_{ji}^{d}0\text{}\mathrm{then}{F}_{ij}^{d}=0$. The traffic constraints defined in Equations (3)–(5) state that the amount of ${f}^{\left(d\right)}$ unit traffic sent by source ${s}_{1}$ is received by destination ${s}_{n}$ at the exact number. The amount of traffic entering and leaving a relay switch is same.

Considering a set of intermediate or relay switches ${S}_{{F}^{\left(d\right)}}\subset S$ and a corresponding subset of links ${L}_{{F}^{\left(d\right)}}\subset L$ to carry the given ${f}^{\left(d\right)}$ unit traffic from source ${s}_{1}$ to destination ${s}_{n}$, we induce a directed (or oriented) sub-graph of G, ${G}_{{F}^{\left(d\right)}}=\left({S}_{{F}^{\left(d\right)}},{L}_{{F}^{\left(d\right)}}\right)$. ${G}_{{F}^{\left(d\right)}}$ is a directed acyclic graph (DAG, we refer to it as a routing graph) that routes the traffic from source ${s}_{1}$ to destination ${s}_{n}$. The traffic could split or merge across the nodes of ${G}_{{F}^{\left(d\right)}}$ to travel across multiple paths. We define ${F}^{{d}^{\prime}}$ to refer the collection of flows, in other words, all functions that satisfy the constraints in Equations (1)–(5).

In the following subsection, we derive the shortest path routing strategy by minimizing

${L}_{1}$-norm of traffic between a given source-destination pair. We build this model based on the fabrication of two well-known results [

24,

25] presented in [

26].

#### Shortest Path Routing (L_{1}-Norm Optimization)

For simplicity and clarity of notation, we assume that

${f}^{\left(d\right)}=1$,

${F}_{ij}$ equivalently specifies the traffic function

${F}^{\left(d\right)}$,

${s}_{1}=1$, and

${s}_{n}=n$. Therefore, we define the following

${L}_{1}$-norm (

${L}_{1}$ Primal) flow optimization problem that can be solved using linear programming (LP).

To comply with the constraints specified in Equations (1)–(5), (6) can more specifically be stated as

where,

${F}_{ij}\ge 0$ and

$1\le i,j\le n$.

Hence, the optimization problem presented in (6) minimized the weighted

${L}_{1}$-norm. Based on the flow conservation constraints presented in Equation (7), we consider the dual (

${L}_{1}$ Dual) of (6) in terms of Lagrange multipliers (

${U}_{i}$’s) to find the shortest path routing

Assuming

${F}^{*}$ and

${U}^{*}$ refer to the optimal traffic solution for the primal and dual problem respectively, we derive the following relations between

${{F}_{ij}^{*}}^{\prime}s$ and

${{U}_{i}^{*}}^{\prime}s$
and

Based on these relations, we can define the following properties of the optimal solution (${{U}_{i}^{*}}^{\prime}s)$ of the dual problem.

**Lemma 1.** Let${P}_{1}$and${P}_{2}$(alternative to${P}_{1}$) are two different paths from source (${s}_{1}$) to destination (${s}_{n}$) to carry the traffic. If for each link$\left(i,j\right)\in {P}_{1}$,${U}_{i}^{*}-{U}_{j}^{*}<{x}_{ij}$then${P}_{1}$is not the shortest path and${U}_{{s}_{1}}^{*}<{\displaystyle \sum}_{\left(i,j\right)\in {P}_{1}}{x}_{ij}$. On the other hand, the alternative path${P}_{2}$is a shortest path if for each link$\left(i,j\right)\in {P}_{2}$,${U}_{i}^{*}-{U}_{j}^{*}={x}_{ij}$and${U}_{{s}_{1}}^{*}={\displaystyle \sum}_{\left(i,j\right)\in {P}_{2}}{x}_{ij}$.

It is evident from the above Lemma that for any switch ${S}_{i}$ on a shortest path, ${U}_{{s}_{i}}^{*}$ is the shortest path distance from the switch ${S}_{i}$ to the destination ${S}_{n}$. All intermediate switches including ${S}_{i}$ and ${S}_{n}$ are the elements of ${S}_{{F}^{\left(d\right)}}^{*}$ that form the shortest routing graph ${G}_{{F}^{\left(d\right)}}^{*}$.

#### 3.2. Optimal Latency Model: Hybrid

In this subsection, we derive the optimal latency model for HFIS. In HFIS, a packet traverses across the shortest path to reach the destination switch.

Let

$\alpha $ denotes the total latency for a packet to reach from source

${S}_{1}$ to destination

${S}_{n}$,

${\alpha}_{in}$ refers to the inbound latency,

${\alpha}_{ou}$ is the outbound latency,

${\alpha}_{p}^{{S}_{k}}$ is the single hop propagation delay of a packet travelling from

${S}_{k}$ to

${S}_{k+1}$. We consider

$\gamma $ is the average time taken by a controller to process a Packet-In message and

$\beta $ is the control channel latency i.e., time taken by a Packet-In/Packet-Out message to travel between a switch and a controller. To this end, our target is to minimize the value of

$\alpha $, and therefore, the optimization model of latency can be stated as:

where,

m is the number of hops i.e., the total number of switches in the shortest routing graph

${G}_{{F}^{\left(d\right)}}^{*}$ and

${S}_{k}\in $ ${S}_{{F}^{\left(d\right)}}^{*}$, where

${S}_{{F}^{\left(d\right)}}^{*}=\left\{{S}_{i},{S}_{i+1},\dots \dots ,{S}_{i+m}\right\}$.

According to HFIS, only the first switch generates the packet event to the controller; then all switches, including the first switch, along the path receive and install the flow instruction. Therefore, there is only one inbound, one outbound, two control channels and one Packet-In resolution latency. Considering a consistent and deterministic link state and performance among all switches, we assume ${\alpha}_{P}^{{S}_{k}}\cong {\alpha}_{P}^{{S}_{k+1}}\cong {\alpha}_{P}^{{S}_{k+2}}\cdots \cong {\alpha}_{P}^{{S}_{k+m}}\cong {\alpha}_{p}$, where ${\alpha}_{p}$ is the average propagation delay, therefore, we can rewrite Equation (12) as follows

**Lemma 2.** During the lifetime of a packet, if it traverses across the shortest path, then latency$\alpha \propto {\alpha}_{p}$, i.e.,$\alpha =m\times {\alpha}_{p}+K$, where$K=$${\alpha}_{in}+{\alpha}_{ou}+2\times \beta +\gamma $.

Lemma 2 asserts that in the entire journey of a packet, there is no more than one table miss regardless of the number of hops across the path. Therefore, one table miss generates only one Packet-In event incurring single inbound (${\alpha}_{in})$ and outbound (${\alpha}_{ou})$ latency with the associated control channel $\left(\beta \right)$ and Packet-In processing time by controller $\left(\gamma \right)$.

#### 3.3. Optimal Latency Model: Pro-Active

According to the second solution, the controller will pro-actively offload the rule to all switches immediately after the deployment of an application. A network administrator deploys an application through the application plane. The application plane creates a particular flow and sends it to the controller in the control plane through the northbound interface. The controller then floods the flow across all the switches within the respective domain. The value of the associated

Idle timeout and

Hard timeout [

23], in this case, are set to zero i.e., Flow entry is considered permanent, and it does not timeout unless it is removed with a flow table modification message of type OFPFC_DELETE [

23]. When a switch receives a packet of this kind, the switch gets an obvious

table match and therefore, apply the action accordingly. This pre-offloading of flows eventually eradicates the control channel communication entirely during the lifetime of a packet in the data plane.

**Lemma 3.** With the PFIS, if a packet travels across the shortest path, then the latency is calculated as$\alpha \propto {\alpha}_{p}$i.e.,$\alpha =m\times {\alpha}_{p}+K$, where$K\cong $${\alpha}_{in}+{\alpha}_{ou}+2\times \beta +\gamma \cong 0$.

Lemma 3 asserts that in the entire journey of a packet, there is no table miss regardless of the number of hops across the path. Therefore, there is no Packet-In event, i.e., inbound (${\alpha}_{in})$ and outbound (${\alpha}_{ou})$ latency with the associated control channel $\left(\beta \right)$ and Packet-In processing time by the controller $\left(\gamma \right)$ are equivalent to zero.