Renteria-Cedano, J.; Rivera, J.; Sandoval-Ibarra, F.; Ortega-Cisneros, S.; Loo-Yau, R.
SoC Design Based on a FPGA for a Configurable Neural Network Trained by Means of an EKF. Electronics 2019, 8, 761.
https://doi.org/10.3390/electronics8070761
AMA Style
Renteria-Cedano J, Rivera J, Sandoval-Ibarra F, Ortega-Cisneros S, Loo-Yau R.
SoC Design Based on a FPGA for a Configurable Neural Network Trained by Means of an EKF. Electronics. 2019; 8(7):761.
https://doi.org/10.3390/electronics8070761
Chicago/Turabian Style
Renteria-Cedano, Juan, Jorge Rivera, F. Sandoval-Ibarra, Susana Ortega-Cisneros, and RaĂşl Loo-Yau.
2019. "SoC Design Based on a FPGA for a Configurable Neural Network Trained by Means of an EKF" Electronics 8, no. 7: 761.
https://doi.org/10.3390/electronics8070761
APA Style
Renteria-Cedano, J., Rivera, J., Sandoval-Ibarra, F., Ortega-Cisneros, S., & Loo-Yau, R.
(2019). SoC Design Based on a FPGA for a Configurable Neural Network Trained by Means of an EKF. Electronics, 8(7), 761.
https://doi.org/10.3390/electronics8070761