Next Article in Journal
Multi-Model Reliable Control for Variable Fault Systems under LQG Framework
Previous Article in Journal
Evaluation of a Straight-Ray Forward Model for Bayesian Inversion of Crosshole Ground Penetrating Radar Data
Open AccessFeature PaperArticle

Parallel Implementation on FPGA of Support Vector Machines Using Stochastic Gradient Descent

1
Laboratory of Machine Learning and Intelligent Instrumentation, Federal University of Rio Grande do Norte, Natal 59078-970, Brazil
2
INESC TEC and Faculty of Engineering, University of Porto, 4200-465 Porto, Portugal
3
Department of Computer and Automation Engineering, Federal University of Rio Grande do Norte, Natal 59078-970, Brazil
*
Author to whom correspondence should be addressed.
Electronics 2019, 8(6), 631; https://doi.org/10.3390/electronics8060631
Received: 6 May 2019 / Revised: 23 May 2019 / Accepted: 24 May 2019 / Published: 5 June 2019
(This article belongs to the Section Circuit and Signal Processing)
Sequential Minimal Optimization (SMO) is the traditional training algorithm for Support Vector Machines (SVMs). However, SMO does not scale well with the size of the training set. For that reason, Stochastic Gradient Descent (SGD) algorithms, which have better scalability, are a better option for massive data mining applications. Furthermore, even with the use of SGD, training times can become extremely large depending on the data set. For this reason, accelerators such as Field-programmable Gate Arrays (FPGAs) are used. This work describes an implementation in hardware, using FPGA, of a fully parallel SVM using Stochastic Gradient Descent. The proposed FPGA implementation of an SVM with SGD presents speedups of more than 10,000× relative to software implementations running on a quad-core processor and up to 319× compared to state-of-the-art FPGA implementations while requiring fewer hardware resources. The results show that the proposed architecture is a viable solution for highly demanding problems such as those present in big data analysis. View Full-Text
Keywords: reconfigurable computing; machine learning; FPGA; SVM; SGD reconfigurable computing; machine learning; FPGA; SVM; SGD
Show Figures

Figure 1

MDPI and ACS Style

Lopes, F.F.; Ferreira, J.C.; Fernandes, M.A.C. Parallel Implementation on FPGA of Support Vector Machines Using Stochastic Gradient Descent. Electronics 2019, 8, 631.

Show more citation formats Show less citations formats
Note that from the first issue of 2016, MDPI journals use article numbers instead of page numbers. See further details here.

Article Access Map by Country/Region

1
Back to TopTop