Next Article in Journal
SEE Sensitivity Evaluation for Commercial 16 nm SRAM-FPGA
Previous Article in Journal
Hardware-Based Single-Clock-Cycle Edge Detector for a PLC Central Processing Unit
 
 
Article

Article Versions Notes

Electronics 2019, 8(12), 1530; https://doi.org/10.3390/electronics8121530
Action Date Notes Link
article xml file uploaded 12 December 2019 11:14 CET Original file -
article xml uploaded. 12 December 2019 11:14 CET Update -
article pdf uploaded. 12 December 2019 11:14 CET Version of Record https://www.mdpi.com/2079-9292/8/12/1530/pdf-vor
article html file updated 12 December 2019 11:16 CET Original file -
article pdf uploaded. 25 December 2019 11:10 CET Updated version of record https://www.mdpi.com/2079-9292/8/12/1530/pdf-vor
article pdf uploaded. 26 December 2019 03:05 CET Updated version of record https://www.mdpi.com/2079-9292/8/12/1530/pdf
article xml uploaded. 26 December 2019 03:05 CET Update -
article xml uploaded. 26 December 2019 03:05 CET Update https://www.mdpi.com/2079-9292/8/12/1530/xml
article html file updated 26 December 2019 03:07 CET Update -
article html file updated 31 December 2019 16:27 CET Update -
article html file updated 14 February 2020 18:05 CET Update -
article html file updated 19 July 2022 21:52 CEST Update https://www.mdpi.com/2079-9292/8/12/1530/html
Back to TopTop