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Open AccessArticle

A Low-Power Spike-like Neural Network Design

Electrical and Computer Engineering Department, Oakland University, Rochester, MI 48309, USA
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Electronics 2019, 8(12), 1479; https://doi.org/10.3390/electronics8121479
Received: 19 October 2019 / Revised: 20 November 2019 / Accepted: 28 November 2019 / Published: 4 December 2019
Modern massively-parallel Graphics Processing Units (GPUs) and Machine Learning (ML) frameworks enable neural network implementations of unprecedented performance and sophistication. However, state-of-the-art GPU hardware platforms are extremely power-hungry, while microprocessors cannot achieve the performance requirements. Biologically-inspired Spiking Neural Networks (SNN) have inherent characteristics that lead to lower power consumption. We thus present a bit-serial SNN-like hardware architecture. By using counters, comparators, and an indexing scheme, the design effectively implements the sum-of-products inherent in neurons. In addition, we experimented with various strength-reduction methods to lower neural network resource usage. The proposed Spiking Hybrid Network (SHiNe), validated on an FPGA, has been found to achieve reasonable performance with a low resource utilization, with some trade-off with respect to hardware throughput and signal representation.
Keywords: spiking neural networks; bit-serial architectures; FPGA spiking neural networks; bit-serial architectures; FPGA
MDPI and ACS Style

Losh, M.; Llamocca, D. A Low-Power Spike-like Neural Network Design. Electronics 2019, 8, 1479.

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