A Power Calculation Algorithm for Single-Phase Droop-Operated-Inverters Considering Linear and Nonlinear Loads HIL-Assessed
Electric Engineering Department, Polytechnic University of Catalonia (EEBE-UPC), 08019 Barcelona, Spain
Energy Teknik Department, Aalborg University (ET-AAU), 9220 Aalborg, Denmark
Author to whom correspondence should be addressed.
Electronics 2019, 8(11), 1366; https://doi.org/10.3390/electronics8111366
Received: 30 September 2019 / Revised: 4 November 2019 / Accepted: 7 November 2019 / Published: 18 November 2019
(This article belongs to the Special Issue Hardware in the Loop for Electrical Systems: Techniques, Algorithm and Circuits)
The active and reactive powers, P and Q, are crucial variables in the parallel operation of single-phase inverters using the droop method, introducing proportional droops in the inverter output frequency and voltage amplitude references. P and Q, or P-Q, are calculated as the product of the inverter output voltage and its orthogonal version with the output current, respectively. However, when sharing nonlinear loads these powers, Pav and Qav, should be averaged by low-pass filters (LPFs) with a very low cut-off frequency to avoid the high distortion induced by these loads. This forces the droop method to operate at a very low dynamic velocity and degrades the system stability. Then, different solutions have been proposed in literature to increase the system velocity, but only considering linear loads. Therefore, this work presents a method to calculate Pav and Qav using second-order generalized integrators (SOGI) to face this problem with nonlinear loads. A double SOGI (DSOGI) approach is applied to filter the nonlinear load current and provide its fundamental component to the inverter, leading to a faster dynamic velocity of the droop-based load sharing capability and improving the stability. The proposed method is shown to be faster than others in the literature when considering nonlinear loads, while smoothly driving the system with low distortion levels. Simulations, hardware-in-loop (HIL) and experimental results are provided to validate this proposal.