This paper proposes a 16 bit subthreshold adder design using bootstrapped sense amplifier-based pass transistor logic (bootstrapped SAPTL) to overcome serious performance degradation and enhance the immunity to process variations in the subthreshold region. Through employing a bootstrapped sense amplifier including a voltage boosting part and adopting an adder architecture based on bootstrapped SAPTL, significant improvements in performance and energy efficiency can be achieved. A case study of 16 bit adders in SMIC 130 nm technology demonstrated that the proposed adder outperformed other works in terms of performance, energy consumption, and energy efficiency. Furthermore, the statistical results of the Monte Carlo analysis proved the proposed adder’s significant enhancement of robustness against process and temperature variations. At 0.3 V (TT corner, 25 °C), the proposed 16 bit adder achieved improvements of 72% in performance and 8% in energy savings, as well as a 74% reduction in energy-delay production as compared with the current design.
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